hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qapi/error.h"
  15 #include "hw/arm/pxa.h"
  16 #include "hw/arm/boot.h"
  17 #include "sysemu/runstate.h"
  18 #include "sysemu/sysemu.h"
  19 #include "hw/pcmcia.h"
  20 #include "hw/qdev-properties.h"
  21 #include "hw/i2c/i2c.h"
  22 #include "hw/irq.h"
  23 #include "hw/ssi/ssi.h"
  24 #include "hw/block/flash.h"
  25 #include "qemu/timer.h"
  26 #include "hw/arm/sharpsl.h"
  27 #include "ui/console.h"
  28 #include "hw/audio/wm8750.h"
  29 #include "audio/audio.h"
  30 #include "hw/boards.h"
  31 #include "hw/sysbus.h"
  32 #include "migration/vmstate.h"
  33 #include "exec/address-spaces.h"
  34 #include "cpu.h"
  35
  36 enum spitz_model_e { spitz, akita, borzoi, terrier };
  37
  38 typedef struct {
  39     MachineClass parent;
  40     enum spitz_model_e model;
  41     int arm_id;
  42 } SpitzMachineClass;
  43
  44 typedef struct {
  45     MachineState parent;
  46     PXA2xxState *mpu;
  47     DeviceState *mux;
  48     DeviceState *lcdtg;
  49     DeviceState *ads7846;
  50     DeviceState *max1111;
  51     DeviceState *scp0;
  52     DeviceState *scp1;
  53 } SpitzMachineState;
  54
  55 #define TYPE_SPITZ_MACHINE "spitz-common"
  56 #define SPITZ_MACHINE(obj) \
  57     OBJECT_CHECK(SpitzMachineState, obj, TYPE_SPITZ_MACHINE)
  58 #define SPITZ_MACHINE_GET_CLASS(obj) \
  59     OBJECT_GET_CLASS(SpitzMachineClass, obj, TYPE_SPITZ_MACHINE)
  60 #define SPITZ_MACHINE_CLASS(klass) \
  61     OBJECT_CLASS_CHECK(SpitzMachineClass, klass, TYPE_SPITZ_MACHINE)
  62
  63 #undef REG_FMT
  64 #define REG_FMT                         "0x%02lx"
  65
  66 /* Spitz Flash */
  67 #define FLASH_BASE              0x0c000000
  68 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  69 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  70 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  71 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  72 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  73 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  74 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  75
  76 #define FLASHCTL_CE0            (1 << 0)
  77 #define FLASHCTL_CLE            (1 << 1)
  78 #define FLASHCTL_ALE            (1 << 2)
  79 #define FLASHCTL_WP             (1 << 3)
  80 #define FLASHCTL_CE1            (1 << 4)
  81 #define FLASHCTL_RYBY           (1 << 5)
  82 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  83
  84 #define TYPE_SL_NAND "sl-nand"
  85 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  86
  87 typedef struct {
  88     SysBusDevice parent_obj;
  89
  90     MemoryRegion iomem;
  91     DeviceState *nand;
  92     uint8_t ctl;
  93     uint8_t manf_id;
  94     uint8_t chip_id;
  95     ECCState ecc;
  96 } SLNANDState;
  97
  98 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  99 {
 100     SLNANDState *s = (SLNANDState *) opaque;
 101     int ryby;
 102
 103     switch (addr) {
 104 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
 105     case FLASH_ECCLPLB:
 106         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
 107                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
 108
 109 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
 110     case FLASH_ECCLPUB:
 111         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
 112                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
 113
 114     case FLASH_ECCCP:
 115         return s->ecc.cp;
 116
 117     case FLASH_ECCCNTR:
 118         return s->ecc.count & 0xff;
 119
 120     case FLASH_FLASHCTL:
 121         nand_getpins(s->nand, &ryby);
 122         if (ryby)
 123             return s->ctl | FLASHCTL_RYBY;
 124         else
 125             return s->ctl;
 126
 127     case FLASH_FLASHIO:
 128         if (size == 4) {
 129             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
 130                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
 131         }
 132         return ecc_digest(&s->ecc, nand_getio(s->nand));
 133
 134     default:
 135         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 136     }
 137     return 0;
 138 }
 139
 140 static void sl_write(void *opaque, hwaddr addr,
 141                      uint64_t value, unsigned size)
 142 {
 143     SLNANDState *s = (SLNANDState *) opaque;
 144
 145     switch (addr) {
 146     case FLASH_ECCCLRR:
 147         /* Value is ignored.  */
 148         ecc_reset(&s->ecc);
 149         break;
 150
 151     case FLASH_FLASHCTL:
 152         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 153         nand_setpins(s->nand,
 154                         s->ctl & FLASHCTL_CLE,
 155                         s->ctl & FLASHCTL_ALE,
 156                         s->ctl & FLASHCTL_NCE,
 157                         s->ctl & FLASHCTL_WP,
 158                         0);
 159         break;
 160
 161     case FLASH_FLASHIO:
 162         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 163         break;
 164
 165     default:
 166         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 167     }
 168 }
 169
 170 enum {
 171     FLASH_128M,
 172     FLASH_1024M,
 173 };
 174
 175 static const MemoryRegionOps sl_ops = {
 176     .read = sl_read,
 177     .write = sl_write,
 178     .endianness = DEVICE_NATIVE_ENDIAN,
 179 };
 180
 181 static void sl_flash_register(PXA2xxState *cpu, int size)
 182 {
 183     DeviceState *dev;
 184
 185     dev = qdev_new(TYPE_SL_NAND);
 186
 187     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 188     if (size == FLASH_128M)
 189         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 190     else if (size == FLASH_1024M)
 191         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 192
 193     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 194     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 195 }
 196
 197 static void sl_nand_init(Object *obj)
 198 {
 199     SLNANDState *s = SL_NAND(obj);
 200     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 201
 202     s->ctl = 0;
 203
 204     memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
 205     sysbus_init_mmio(dev, &s->iomem);
 206 }
 207
 208 static void sl_nand_realize(DeviceState *dev, Error **errp)
 209 {
 210     SLNANDState *s = SL_NAND(dev);
 211     DriveInfo *nand;
 212
 213     /* FIXME use a qdev drive property instead of drive_get() */
 214     nand = drive_get(IF_MTD, 0, 0);
 215     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 216                         s->manf_id, s->chip_id);
 217 }
 218
 219 /* Spitz Keyboard */
 220
 221 #define SPITZ_KEY_STROBE_NUM    11
 222 #define SPITZ_KEY_SENSE_NUM     7
 223
 224 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 225     12, 17, 91, 34, 36, 38, 39
 226 };
 227
 228 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 229     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 230 };
 231
 232 /* Eighth additional row maps the special keys */
 233 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 234     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 235     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 236     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 237     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 238     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 239     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 240     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 241     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 242 };
 243
 244 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 245 #define SPITZ_GPIO_SYNC                 16      /* Sync button */
 246 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 247 #define SPITZ_GPIO_SWA          97      /* Lid */
 248 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 249
 250 /* The special buttons are mapped to unused keys */
 251 static const int spitz_gpiomap[5] = {
 252     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 253     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 254 };
 255
 256 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 257 #define SPITZ_KEYBOARD(obj) \
 258     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 259
 260 typedef struct {
 261     SysBusDevice parent_obj;
 262
 263     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 264     qemu_irq gpiomap[5];
 265     int keymap[0x80];
 266     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 267     uint16_t strobe_state;
 268     uint16_t sense_state;
 269
 270     uint16_t pre_map[0x100];
 271     uint16_t modifiers;
 272     uint16_t imodifiers;
 273     uint8_t fifo[16];
 274     int fifopos, fifolen;
 275     QEMUTimer *kbdtimer;
 276 } SpitzKeyboardState;
 277
 278 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 279 {
 280     int i;
 281     uint16_t strobe, sense = 0;
 282     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 283         strobe = s->keyrow[i] & s->strobe_state;
 284         if (strobe) {
 285             sense |= 1 << i;
 286             if (!(s->sense_state & (1 << i)))
 287                 qemu_irq_raise(s->sense[i]);
 288         } else if (s->sense_state & (1 << i))
 289             qemu_irq_lower(s->sense[i]);
 290     }
 291
 292     s->sense_state = sense;
 293 }
 294
 295 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 296 {
 297     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 298
 299     if (level)
 300         s->strobe_state |= 1 << line;
 301     else
 302         s->strobe_state &= ~(1 << line);
 303     spitz_keyboard_sense_update(s);
 304 }
 305
 306 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 307 {
 308     int spitz_keycode = s->keymap[keycode & 0x7f];
 309     if (spitz_keycode == -1)
 310         return;
 311
 312     /* Handle the additional keys */
 313     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 314         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 315         return;
 316     }
 317
 318     if (keycode & 0x80)
 319         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 320     else
 321         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 322
 323     spitz_keyboard_sense_update(s);
 324 }
 325
 326 #define SPITZ_MOD_SHIFT   (1 << 7)
 327 #define SPITZ_MOD_CTRL    (1 << 8)
 328 #define SPITZ_MOD_FN      (1 << 9)
 329
 330 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 331
 332 static void spitz_keyboard_handler(void *opaque, int keycode)
 333 {
 334     SpitzKeyboardState *s = opaque;
 335     uint16_t code;
 336     int mapcode;
 337     switch (keycode) {
 338     case 0x2a:  /* Left Shift */
 339         s->modifiers |= 1;
 340         break;
 341     case 0xaa:
 342         s->modifiers &= ~1;
 343         break;
 344     case 0x36:  /* Right Shift */
 345         s->modifiers |= 2;
 346         break;
 347     case 0xb6:
 348         s->modifiers &= ~2;
 349         break;
 350     case 0x1d:  /* Control */
 351         s->modifiers |= 4;
 352         break;
 353     case 0x9d:
 354         s->modifiers &= ~4;
 355         break;
 356     case 0x38:  /* Alt */
 357         s->modifiers |= 8;
 358         break;
 359     case 0xb8:
 360         s->modifiers &= ~8;
 361         break;
 362     }
 363
 364     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 365             (keycode | SPITZ_MOD_SHIFT) :
 366             (keycode & ~SPITZ_MOD_SHIFT))];
 367
 368     if (code != mapcode) {
 369 #if 0
 370         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 371             QUEUE_KEY(0x2a | (keycode & 0x80));
 372         }
 373         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 374             QUEUE_KEY(0x1d | (keycode & 0x80));
 375         }
 376         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 377             QUEUE_KEY(0x38 | (keycode & 0x80));
 378         }
 379         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 380             QUEUE_KEY(0x2a | (~keycode & 0x80));
 381         }
 382         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 383             QUEUE_KEY(0x36 | (~keycode & 0x80));
 384         }
 385 #else
 386         if (keycode & 0x80) {
 387             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 388                 QUEUE_KEY(0x2a | 0x80);
 389             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 390                 QUEUE_KEY(0x1d | 0x80);
 391             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 392                 QUEUE_KEY(0x38 | 0x80);
 393             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 394                 QUEUE_KEY(0x2a);
 395             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 396                 QUEUE_KEY(0x36);
 397             s->imodifiers = 0;
 398         } else {
 399             if ((code & SPITZ_MOD_SHIFT) &&
 400                 !((s->modifiers | s->imodifiers) & 1)) {
 401                 QUEUE_KEY(0x2a);
 402                 s->imodifiers |= 1;
 403             }
 404             if ((code & SPITZ_MOD_CTRL) &&
 405                 !((s->modifiers | s->imodifiers) & 4)) {
 406                 QUEUE_KEY(0x1d);
 407                 s->imodifiers |= 4;
 408             }
 409             if ((code & SPITZ_MOD_FN) &&
 410                 !((s->modifiers | s->imodifiers) & 8)) {
 411                 QUEUE_KEY(0x38);
 412                 s->imodifiers |= 8;
 413             }
 414             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 415                             !(s->imodifiers & 0x10)) {
 416                 QUEUE_KEY(0x2a | 0x80);
 417                 s->imodifiers |= 0x10;
 418             }
 419             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 420                             !(s->imodifiers & 0x20)) {
 421                 QUEUE_KEY(0x36 | 0x80);
 422                 s->imodifiers |= 0x20;
 423             }
 424         }
 425 #endif
 426     }
 427
 428     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 429 }
 430
 431 static void spitz_keyboard_tick(void *opaque)
 432 {
 433     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 434
 435     if (s->fifolen) {
 436         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 437         s->fifolen --;
 438         if (s->fifopos >= 16)
 439             s->fifopos = 0;
 440     }
 441
 442     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 443                    NANOSECONDS_PER_SECOND / 32);
 444 }
 445
 446 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 447 {
 448     int i;
 449     for (i = 0; i < 0x100; i ++)
 450         s->pre_map[i] = i;
 451     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 452     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 453     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 454     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 455     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 456     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 457     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 458     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 459     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 460     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 461     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 462     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 463     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 464     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 465     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 466     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 467     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 468     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 469     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 470     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 471     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 472     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 473     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 474     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 475     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 476     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 477     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 478     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 479     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 480     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 481     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 482     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 483
 484     s->modifiers = 0;
 485     s->imodifiers = 0;
 486     s->fifopos = 0;
 487     s->fifolen = 0;
 488 }
 489
 490 #undef SPITZ_MOD_SHIFT
 491 #undef SPITZ_MOD_CTRL
 492 #undef SPITZ_MOD_FN
 493
 494 static int spitz_keyboard_post_load(void *opaque, int version_id)
 495 {
 496     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 497
 498     /* Release all pressed keys */
 499     memset(s->keyrow, 0, sizeof(s->keyrow));
 500     spitz_keyboard_sense_update(s);
 501     s->modifiers = 0;
 502     s->imodifiers = 0;
 503     s->fifopos = 0;
 504     s->fifolen = 0;
 505
 506     return 0;
 507 }
 508
 509 static void spitz_keyboard_register(PXA2xxState *cpu)
 510 {
 511     int i;
 512     DeviceState *dev;
 513     SpitzKeyboardState *s;
 514
 515     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 516     s = SPITZ_KEYBOARD(dev);
 517
 518     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 519         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 520
 521     for (i = 0; i < 5; i ++)
 522         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 523
 524     if (!graphic_rotate)
 525         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 526
 527     for (i = 0; i < 5; i++)
 528         qemu_set_irq(s->gpiomap[i], 0);
 529
 530     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 531         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 532                 qdev_get_gpio_in(dev, i));
 533
 534     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 535
 536     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 537 }
 538
 539 static void spitz_keyboard_init(Object *obj)
 540 {
 541     DeviceState *dev = DEVICE(obj);
 542     SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
 543     int i, j;
 544
 545     for (i = 0; i < 0x80; i ++)
 546         s->keymap[i] = -1;
 547     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 548         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 549             if (spitz_keymap[i][j] != -1)
 550                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 551
 552     spitz_keyboard_pre_map(s);
 553
 554     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 555     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 556 }
 557
 558 static void spitz_keyboard_realize(DeviceState *dev, Error **errp)
 559 {
 560     SpitzKeyboardState *s = SPITZ_KEYBOARD(dev);
 561     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 562 }
 563
 564 /* LCD backlight controller */
 565
 566 #define LCDTG_RESCTL    0x00
 567 #define LCDTG_PHACTRL   0x01
 568 #define LCDTG_DUTYCTRL  0x02
 569 #define LCDTG_POWERREG0         0x03
 570 #define LCDTG_POWERREG1         0x04
 571 #define LCDTG_GPOR3     0x05
 572 #define LCDTG_PICTRL    0x06
 573 #define LCDTG_POLCTRL   0x07
 574
 575 typedef struct {
 576     SSISlave ssidev;
 577     uint32_t bl_intensity;
 578     uint32_t bl_power;
 579 } SpitzLCDTG;
 580
 581 static void spitz_bl_update(SpitzLCDTG *s)
 582 {
 583     if (s->bl_power && s->bl_intensity)
 584         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 585     else
 586         zaurus_printf("LCD Backlight now off\n");
 587 }
 588
 589 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 590 {
 591     SpitzLCDTG *s = opaque;
 592     int prev = s->bl_intensity;
 593
 594     if (level)
 595         s->bl_intensity &= ~0x20;
 596     else
 597         s->bl_intensity |= 0x20;
 598
 599     if (s->bl_power && prev != s->bl_intensity)
 600         spitz_bl_update(s);
 601 }
 602
 603 static inline void spitz_bl_power(void *opaque, int line, int level)
 604 {
 605     SpitzLCDTG *s = opaque;
 606     s->bl_power = !!level;
 607     spitz_bl_update(s);
 608 }
 609
 610 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 611 {
 612     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 613     int addr;
 614     addr = value >> 5;
 615     value &= 0x1f;
 616
 617     switch (addr) {
 618     case LCDTG_RESCTL:
 619         if (value)
 620             zaurus_printf("LCD in QVGA mode\n");
 621         else
 622             zaurus_printf("LCD in VGA mode\n");
 623         break;
 624
 625     case LCDTG_DUTYCTRL:
 626         s->bl_intensity &= ~0x1f;
 627         s->bl_intensity |= value;
 628         if (s->bl_power)
 629             spitz_bl_update(s);
 630         break;
 631
 632     case LCDTG_POWERREG0:
 633         /* Set common voltage to M62332FP */
 634         break;
 635     }
 636     return 0;
 637 }
 638
 639 static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp)
 640 {
 641     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, ssi);
 642     DeviceState *dev = DEVICE(s);
 643
 644     s->bl_power = 0;
 645     s->bl_intensity = 0x20;
 646
 647     qdev_init_gpio_in_named(dev, spitz_bl_bit5, "bl_bit5", 1);
 648     qdev_init_gpio_in_named(dev, spitz_bl_power, "bl_power", 1);
 649 }
 650
 651 /* SSP devices */
 652
 653 #define CORGI_SSP_PORT          2
 654
 655 #define SPITZ_GPIO_LCDCON_CS    53
 656 #define SPITZ_GPIO_ADS7846_CS   14
 657 #define SPITZ_GPIO_MAX1111_CS   20
 658 #define SPITZ_GPIO_TP_INT       11
 659
 660 static DeviceState *max1111;
 661
 662 /* "Demux" the signal based on current chipselect */
 663 typedef struct {
 664     SSISlave ssidev;
 665     SSIBus *bus[3];
 666     uint32_t enable[3];
 667 } CorgiSSPState;
 668
 669 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 670 {
 671     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 672     int i;
 673
 674     for (i = 0; i < 3; i++) {
 675         if (s->enable[i]) {
 676             return ssi_transfer(s->bus[i], value);
 677         }
 678     }
 679     return 0;
 680 }
 681
 682 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 683 {
 684     CorgiSSPState *s = (CorgiSSPState *)opaque;
 685     assert(line >= 0 && line < 3);
 686     s->enable[line] = !level;
 687 }
 688
 689 #define MAX1111_BATT_VOLT       1
 690 #define MAX1111_BATT_TEMP       2
 691 #define MAX1111_ACIN_VOLT       3
 692
 693 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 694 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 695 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 696
 697 static void spitz_adc_temp_on(void *opaque, int line, int level)
 698 {
 699     if (!max1111)
 700         return;
 701
 702     if (level)
 703         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 704     else
 705         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 706 }
 707
 708 static void corgi_ssp_realize(SSISlave *d, Error **errp)
 709 {
 710     DeviceState *dev = DEVICE(d);
 711     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
 712
 713     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 714     s->bus[0] = ssi_create_bus(dev, "ssi0");
 715     s->bus[1] = ssi_create_bus(dev, "ssi1");
 716     s->bus[2] = ssi_create_bus(dev, "ssi2");
 717 }
 718
 719 static void spitz_ssp_attach(SpitzMachineState *sms)
 720 {
 721     void *bus;
 722
 723     sms->mux = ssi_create_slave(sms->mpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 724
 725     bus = qdev_get_child_bus(sms->mux, "ssi0");
 726     sms->lcdtg = ssi_create_slave(bus, "spitz-lcdtg");
 727
 728     bus = qdev_get_child_bus(sms->mux, "ssi1");
 729     sms->ads7846 = ssi_create_slave(bus, "ads7846");
 730     qdev_connect_gpio_out(sms->ads7846, 0,
 731                           qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT));
 732
 733     bus = qdev_get_child_bus(sms->mux, "ssi2");
 734     sms->max1111 = qdev_new("max1111");
 735     max1111 = sms->max1111;
 736     qdev_prop_set_uint8(sms->max1111, "input1" /* BATT_VOLT */,
 737                         SPITZ_BATTERY_VOLT);
 738     qdev_prop_set_uint8(sms->max1111, "input2" /* BATT_TEMP */, 0);
 739     qdev_prop_set_uint8(sms->max1111, "input3" /* ACIN_VOLT */,
 740                         SPITZ_CHARGEON_ACIN);
 741     ssi_realize_and_unref(sms->max1111, bus, &error_fatal);
 742
 743     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS,
 744                         qdev_get_gpio_in(sms->mux, 0));
 745     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS,
 746                         qdev_get_gpio_in(sms->mux, 1));
 747     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS,
 748                         qdev_get_gpio_in(sms->mux, 2));
 749 }
 750
 751 /* CF Microdrive */
 752
 753 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 754 {
 755     PCMCIACardState *md;
 756     DriveInfo *dinfo;
 757
 758     dinfo = drive_get(IF_IDE, 0, 0);
 759     if (!dinfo || dinfo->media_cd)
 760         return;
 761     md = dscm1xxxx_init(dinfo);
 762     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 763 }
 764
 765 /* Wm8750 and Max7310 on I2C */
 766
 767 #define AKITA_MAX_ADDR  0x18
 768 #define SPITZ_WM_ADDRL  0x1b
 769 #define SPITZ_WM_ADDRH  0x1a
 770
 771 #define SPITZ_GPIO_WM   5
 772
 773 static void spitz_wm8750_addr(void *opaque, int line, int level)
 774 {
 775     I2CSlave *wm = (I2CSlave *) opaque;
 776     if (level)
 777         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 778     else
 779         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 780 }
 781
 782 static void spitz_i2c_setup(PXA2xxState *cpu)
 783 {
 784     /* Attach the CPU on one end of our I2C bus.  */
 785     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 786
 787     DeviceState *wm;
 788
 789     /* Attach a WM8750 to the bus */
 790     wm = i2c_create_slave(bus, TYPE_WM8750, 0);
 791
 792     spitz_wm8750_addr(wm, 0, 0);
 793     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 794                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 795     /* .. and to the sound interface.  */
 796     cpu->i2s->opaque = wm;
 797     cpu->i2s->codec_out = wm8750_dac_dat;
 798     cpu->i2s->codec_in = wm8750_adc_dat;
 799     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 800 }
 801
 802 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 803 {
 804     /* Attach a Max7310 to Akita I2C bus.  */
 805     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 806                      AKITA_MAX_ADDR);
 807 }
 808
 809 /* Other peripherals */
 810
 811 static void spitz_out_switch(void *opaque, int line, int level)
 812 {
 813     switch (line) {
 814     case 0:
 815         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 816         break;
 817     case 1:
 818         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 819         break;
 820     case 2:
 821         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 822         break;
 823     case 3:
 824         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 825         break;
 826     case 6:
 827         spitz_adc_temp_on(opaque, line, level);
 828         break;
 829     default:
 830         g_assert_not_reached();
 831     }
 832 }
 833
 834 #define SPITZ_SCP_LED_GREEN             1
 835 #define SPITZ_SCP_JK_B                  2
 836 #define SPITZ_SCP_CHRG_ON               3
 837 #define SPITZ_SCP_MUTE_L                4
 838 #define SPITZ_SCP_MUTE_R                5
 839 #define SPITZ_SCP_CF_POWER              6
 840 #define SPITZ_SCP_LED_ORANGE            7
 841 #define SPITZ_SCP_JK_A                  8
 842 #define SPITZ_SCP_ADC_TEMP_ON           9
 843 #define SPITZ_SCP2_IR_ON                1
 844 #define SPITZ_SCP2_AKIN_PULLUP          2
 845 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 846 #define SPITZ_SCP2_BACKLIGHT_ON                 8
 847 #define SPITZ_SCP2_MIC_BIAS             9
 848
 849 static void spitz_scoop_gpio_setup(SpitzMachineState *sms)
 850 {
 851     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, sms->mpu, 8);
 852
 853     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 854     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_JK_B, outsignals[1]);
 855     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 856     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 857
 858     if (sms->scp1) {
 859         qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_CONT,
 860                               qdev_get_gpio_in_named(sms->lcdtg, "bl_bit5", 0));
 861         qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_ON,
 862                               qdev_get_gpio_in_named(sms->lcdtg, "bl_power", 0));
 863     }
 864
 865     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 866 }
 867
 868 #define SPITZ_GPIO_HSYNC                22
 869 #define SPITZ_GPIO_SD_DETECT            9
 870 #define SPITZ_GPIO_SD_WP                81
 871 #define SPITZ_GPIO_ON_RESET             89
 872 #define SPITZ_GPIO_BAT_COVER            90
 873 #define SPITZ_GPIO_CF1_IRQ              105
 874 #define SPITZ_GPIO_CF1_CD               94
 875 #define SPITZ_GPIO_CF2_IRQ              106
 876 #define SPITZ_GPIO_CF2_CD               93
 877
 878 static int spitz_hsync;
 879
 880 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 881 {
 882     PXA2xxState *cpu = (PXA2xxState *) opaque;
 883     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 884     spitz_hsync ^= 1;
 885 }
 886
 887 static void spitz_reset(void *opaque, int line, int level)
 888 {
 889     if (level) {
 890         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 891     }
 892 }
 893
 894 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 895 {
 896     qemu_irq lcd_hsync;
 897     qemu_irq reset;
 898
 899     /*
 900      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 901      * read to satisfy broken guests that poll-wait for hsync.
 902      * Simulating a real hsync event would be less practical and
 903      * wouldn't guarantee that a guest ever exits the loop.
 904      */
 905     spitz_hsync = 0;
 906     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 907     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 908     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 909
 910     /* MMC/SD host */
 911     pxa2xx_mmci_handlers(cpu->mmc,
 912                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 913                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 914
 915     /* Battery lock always closed */
 916     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 917
 918     /* Handle reset */
 919     reset = qemu_allocate_irq(spitz_reset, cpu, 0);
 920     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
 921
 922     /* PCMCIA signals: card's IRQ and Card-Detect */
 923     if (slots >= 1)
 924         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 925                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 926                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 927     if (slots >= 2)
 928         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 929                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 930                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 931 }
 932
 933 /* Board init.  */
 934 #define SPITZ_RAM       0x04000000
 935 #define SPITZ_ROM       0x00800000
 936
 937 static struct arm_boot_info spitz_binfo = {
 938     .loader_start = PXA2XX_SDRAM_BASE,
 939     .ram_size = 0x04000000,
 940 };
 941
 942 static void spitz_common_init(MachineState *machine)
 943 {
 944     SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine);
 945     SpitzMachineState *sms = SPITZ_MACHINE(machine);
 946     enum spitz_model_e model = smc->model;
 947     PXA2xxState *mpu;
 948     MemoryRegion *address_space_mem = get_system_memory();
 949     MemoryRegion *rom = g_new(MemoryRegion, 1);
 950
 951     /* Setup CPU & memory */
 952     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
 953                       machine->cpu_type);
 954     sms->mpu = mpu;
 955
 956     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 957
 958     memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
 959     memory_region_add_subregion(address_space_mem, 0, rom);
 960
 961     /* Setup peripherals */
 962     spitz_keyboard_register(mpu);
 963
 964     spitz_ssp_attach(sms);
 965
 966     sms->scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 967     if (model != akita) {
 968         sms->scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 969     } else {
 970         sms->scp1 = NULL;
 971     }
 972
 973     spitz_scoop_gpio_setup(sms);
 974
 975     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 976
 977     spitz_i2c_setup(mpu);
 978
 979     if (model == akita)
 980         spitz_akita_i2c_setup(mpu);
 981
 982     if (model == terrier)
 983         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 984         spitz_microdrive_attach(mpu, 1);
 985     else if (model != akita)
 986         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 987         spitz_microdrive_attach(mpu, 0);
 988
 989     spitz_binfo.board_id = smc->arm_id;
 990     arm_load_kernel(mpu->cpu, machine, &spitz_binfo);
 991     sl_bootparam_write(SL_PXA_PARAM_BASE);
 992 }
 993
 994 static void spitz_common_class_init(ObjectClass *oc, void *data)
 995 {
 996     MachineClass *mc = MACHINE_CLASS(oc);
 997
 998     mc->block_default_type = IF_IDE;
 999     mc->ignore_memory_transaction_failures = true;
1000     mc->init = spitz_common_init;
1001 }
1002
1003 static const TypeInfo spitz_common_info = {
1004     .name = TYPE_SPITZ_MACHINE,
1005     .parent = TYPE_MACHINE,
1006     .abstract = true,
1007     .instance_size = sizeof(SpitzMachineState),
1008     .class_size = sizeof(SpitzMachineClass),
1009     .class_init = spitz_common_class_init,
1010 };
1011
1012 static void akitapda_class_init(ObjectClass *oc, void *data)
1013 {
1014     MachineClass *mc = MACHINE_CLASS(oc);
1015     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1016
1017     mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
1018     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1019     smc->model = akita;
1020     smc->arm_id = 0x2e8;
1021 }
1022
1023 static const TypeInfo akitapda_type = {
1024     .name = MACHINE_TYPE_NAME("akita"),
1025     .parent = TYPE_SPITZ_MACHINE,
1026     .class_init = akitapda_class_init,
1027 };
1028
1029 static void spitzpda_class_init(ObjectClass *oc, void *data)
1030 {
1031     MachineClass *mc = MACHINE_CLASS(oc);
1032     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1033
1034     mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
1035     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1036     smc->model = spitz;
1037     smc->arm_id = 0x2c9;
1038 }
1039
1040 static const TypeInfo spitzpda_type = {
1041     .name = MACHINE_TYPE_NAME("spitz"),
1042     .parent = TYPE_SPITZ_MACHINE,
1043     .class_init = spitzpda_class_init,
1044 };
1045
1046 static void borzoipda_class_init(ObjectClass *oc, void *data)
1047 {
1048     MachineClass *mc = MACHINE_CLASS(oc);
1049     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1050
1051     mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1052     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1053     smc->model = borzoi;
1054     smc->arm_id = 0x33f;
1055 }
1056
1057 static const TypeInfo borzoipda_type = {
1058     .name = MACHINE_TYPE_NAME("borzoi"),
1059     .parent = TYPE_SPITZ_MACHINE,
1060     .class_init = borzoipda_class_init,
1061 };
1062
1063 static void terrierpda_class_init(ObjectClass *oc, void *data)
1064 {
1065     MachineClass *mc = MACHINE_CLASS(oc);
1066     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1067
1068     mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1069     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
1070     smc->model = terrier;
1071     smc->arm_id = 0x33f;
1072 }
1073
1074 static const TypeInfo terrierpda_type = {
1075     .name = MACHINE_TYPE_NAME("terrier"),
1076     .parent = TYPE_SPITZ_MACHINE,
1077     .class_init = terrierpda_class_init,
1078 };
1079
1080 static void spitz_machine_init(void)
1081 {
1082     type_register_static(&spitz_common_info);
1083     type_register_static(&akitapda_type);
1084     type_register_static(&spitzpda_type);
1085     type_register_static(&borzoipda_type);
1086     type_register_static(&terrierpda_type);
1087 }
1088
1089 type_init(spitz_machine_init)
1090
1091 static bool is_version_0(void *opaque, int version_id)
1092 {
1093     return version_id == 0;
1094 }
1095
1096 static VMStateDescription vmstate_sl_nand_info = {
1097     .name = "sl-nand",
1098     .version_id = 0,
1099     .minimum_version_id = 0,
1100     .fields = (VMStateField[]) {
1101         VMSTATE_UINT8(ctl, SLNANDState),
1102         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1103         VMSTATE_END_OF_LIST(),
1104     },
1105 };
1106
1107 static Property sl_nand_properties[] = {
1108     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1109     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1110     DEFINE_PROP_END_OF_LIST(),
1111 };
1112
1113 static void sl_nand_class_init(ObjectClass *klass, void *data)
1114 {
1115     DeviceClass *dc = DEVICE_CLASS(klass);
1116
1117     dc->vmsd = &vmstate_sl_nand_info;
1118     device_class_set_props(dc, sl_nand_properties);
1119     dc->realize = sl_nand_realize;
1120     /* Reason: init() method uses drive_get() */
1121     dc->user_creatable = false;
1122 }
1123
1124 static const TypeInfo sl_nand_info = {
1125     .name          = TYPE_SL_NAND,
1126     .parent        = TYPE_SYS_BUS_DEVICE,
1127     .instance_size = sizeof(SLNANDState),
1128     .instance_init = sl_nand_init,
1129     .class_init    = sl_nand_class_init,
1130 };
1131
1132 static VMStateDescription vmstate_spitz_kbd = {
1133     .name = "spitz-keyboard",
1134     .version_id = 1,
1135     .minimum_version_id = 0,
1136     .post_load = spitz_keyboard_post_load,
1137     .fields = (VMStateField[]) {
1138         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1139         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1140         VMSTATE_UNUSED_TEST(is_version_0, 5),
1141         VMSTATE_END_OF_LIST(),
1142     },
1143 };
1144
1145 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1146 {
1147     DeviceClass *dc = DEVICE_CLASS(klass);
1148
1149     dc->vmsd = &vmstate_spitz_kbd;
1150     dc->realize = spitz_keyboard_realize;
1151 }
1152
1153 static const TypeInfo spitz_keyboard_info = {
1154     .name          = TYPE_SPITZ_KEYBOARD,
1155     .parent        = TYPE_SYS_BUS_DEVICE,
1156     .instance_size = sizeof(SpitzKeyboardState),
1157     .instance_init = spitz_keyboard_init,
1158     .class_init    = spitz_keyboard_class_init,
1159 };
1160
1161 static const VMStateDescription vmstate_corgi_ssp_regs = {
1162     .name = "corgi-ssp",
1163     .version_id = 2,
1164     .minimum_version_id = 2,
1165     .fields = (VMStateField[]) {
1166         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1167         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1168         VMSTATE_END_OF_LIST(),
1169     }
1170 };
1171
1172 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1173 {
1174     DeviceClass *dc = DEVICE_CLASS(klass);
1175     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1176
1177     k->realize = corgi_ssp_realize;
1178     k->transfer = corgi_ssp_transfer;
1179     dc->vmsd = &vmstate_corgi_ssp_regs;
1180 }
1181
1182 static const TypeInfo corgi_ssp_info = {
1183     .name          = "corgi-ssp",
1184     .parent        = TYPE_SSI_SLAVE,
1185     .instance_size = sizeof(CorgiSSPState),
1186     .class_init    = corgi_ssp_class_init,
1187 };
1188
1189 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1190     .name = "spitz-lcdtg",
1191     .version_id = 1,
1192     .minimum_version_id = 1,
1193     .fields = (VMStateField[]) {
1194         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1195         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1196         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1197         VMSTATE_END_OF_LIST(),
1198     }
1199 };
1200
1201 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1202 {
1203     DeviceClass *dc = DEVICE_CLASS(klass);
1204     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1205
1206     k->realize = spitz_lcdtg_realize;
1207     k->transfer = spitz_lcdtg_transfer;
1208     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1209 }
1210
1211 static const TypeInfo spitz_lcdtg_info = {
1212     .name          = "spitz-lcdtg",
1213     .parent        = TYPE_SSI_SLAVE,
1214     .instance_size = sizeof(SpitzLCDTG),
1215     .class_init    = spitz_lcdtg_class_init,
1216 };
1217
1218 static void spitz_register_types(void)
1219 {
1220     type_register_static(&corgi_ssp_info);
1221     type_register_static(&spitz_lcdtg_info);
1222     type_register_static(&spitz_keyboard_info);
1223     type_register_static(&sl_nand_info);
1224 }
1225
1226 type_init(spitz_register_types)