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memory: Split zones when do coalesced_io_del()
[qemu/armbru.git] / memory.c
blob7124274f49685b48e091d2531a4d5e10922ce230
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "cpu.h"
19 #include "exec/memory.h"
20 #include "exec/address-spaces.h"
21 #include "qapi/visitor.h"
22 #include "qemu/bitops.h"
23 #include "qemu/error-report.h"
24 #include "qemu/main-loop.h"
25 #include "qemu/qemu-print.h"
26 #include "qom/object.h"
27 #include "trace-root.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/runstate.h"
33 #include "sysemu/tcg.h"
34 #include "sysemu/accel.h"
35 #include "hw/boards.h"
36 #include "migration/vmstate.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 bool global_dirty_log;
44
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
137 if (_listener->_callback) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
176 {
177 if (int128_lt(a->addr.start, b->addr.start)) {
178 return true;
179 } else if (int128_gt(a->addr.start, b->addr.start)) {
180 return false;
181 } else if (int128_lt(a->addr.size, b->addr.size)) {
182 return true;
183 } else if (int128_gt(a->addr.size, b->addr.size)) {
184 return false;
185 } else if (a->match_data < b->match_data) {
186 return true;
187 } else if (a->match_data > b->match_data) {
188 return false;
189 } else if (a->match_data) {
190 if (a->data < b->data) {
191 return true;
192 } else if (a->data > b->data) {
193 return false;
194 }
195 }
196 if (a->e < b->e) {
197 return true;
198 } else if (a->e > b->e) {
199 return false;
200 }
201 return false;
202 }
203
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
206 {
207 return !memory_region_ioeventfd_before(a, b)
208 && !memory_region_ioeventfd_before(b, a);
209 }
210
211 /* Range of memory in the global map. Addresses are absolute. */
212 struct FlatRange {
213 MemoryRegion *mr;
214 hwaddr offset_in_region;
215 AddrRange addr;
216 uint8_t dirty_log_mask;
217 bool romd_mode;
218 bool readonly;
219 bool nonvolatile;
220 int has_coalesced_range;
221 };
222
223 #define FOR_EACH_FLAT_RANGE(var, view) \
224 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
225
226 static inline MemoryRegionSection
227 section_from_flat_range(FlatRange *fr, FlatView *fv)
228 {
229 return (MemoryRegionSection) {
230 .mr = fr->mr,
231 .fv = fv,
232 .offset_within_region = fr->offset_in_region,
233 .size = fr->addr.size,
234 .offset_within_address_space = int128_get64(fr->addr.start),
235 .readonly = fr->readonly,
236 .nonvolatile = fr->nonvolatile,
237 };
238 }
239
240 static bool flatrange_equal(FlatRange *a, FlatRange *b)
241 {
242 return a->mr == b->mr
243 && addrrange_equal(a->addr, b->addr)
244 && a->offset_in_region == b->offset_in_region
245 && a->romd_mode == b->romd_mode
246 && a->readonly == b->readonly
247 && a->nonvolatile == b->nonvolatile;
248 }
249
250 static FlatView *flatview_new(MemoryRegion *mr_root)
251 {
252 FlatView *view;
253
254 view = g_new0(FlatView, 1);
255 view->ref = 1;
256 view->root = mr_root;
257 memory_region_ref(mr_root);
258 trace_flatview_new(view, mr_root);
259
260 return view;
261 }
262
263 /* Insert a range into a given position. Caller is responsible for maintaining
264 * sorting order.
265 */
266 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
267 {
268 if (view->nr == view->nr_allocated) {
269 view->nr_allocated = MAX(2 * view->nr, 10);
270 view->ranges = g_realloc(view->ranges,
271 view->nr_allocated * sizeof(*view->ranges));
272 }
273 memmove(view->ranges + pos + 1, view->ranges + pos,
274 (view->nr - pos) * sizeof(FlatRange));
275 view->ranges[pos] = *range;
276 memory_region_ref(range->mr);
277 ++view->nr;
278 }
279
280 static void flatview_destroy(FlatView *view)
281 {
282 int i;
283
284 trace_flatview_destroy(view, view->root);
285 if (view->dispatch) {
286 address_space_dispatch_free(view->dispatch);
287 }
288 for (i = 0; i < view->nr; i++) {
289 memory_region_unref(view->ranges[i].mr);
290 }
291 g_free(view->ranges);
292 memory_region_unref(view->root);
293 g_free(view);
294 }
295
296 static bool flatview_ref(FlatView *view)
297 {
298 return atomic_fetch_inc_nonzero(&view->ref) > 0;
299 }
300
301 void flatview_unref(FlatView *view)
302 {
303 if (atomic_fetch_dec(&view->ref) == 1) {
304 trace_flatview_destroy_rcu(view, view->root);
305 assert(view->root);
306 call_rcu(view, flatview_destroy, rcu);
307 }
308 }
309
310 static bool can_merge(FlatRange *r1, FlatRange *r2)
311 {
312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
313 && r1->mr == r2->mr
314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
317 && r1->dirty_log_mask == r2->dirty_log_mask
318 && r1->romd_mode == r2->romd_mode
319 && r1->readonly == r2->readonly
320 && r1->nonvolatile == r2->nonvolatile;
321 }
322
323 /* Attempt to simplify a view by merging adjacent ranges */
324 static void flatview_simplify(FlatView *view)
325 {
326 unsigned i, j, k;
327
328 i = 0;
329 while (i < view->nr) {
330 j = i + 1;
331 while (j < view->nr
332 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
333 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
334 ++j;
335 }
336 ++i;
337 for (k = i; k < j; k++) {
338 memory_region_unref(view->ranges[k].mr);
339 }
340 memmove(&view->ranges[i], &view->ranges[j],
341 (view->nr - j) * sizeof(view->ranges[j]));
342 view->nr -= j - i;
343 }
344 }
345
346 static bool memory_region_big_endian(MemoryRegion *mr)
347 {
348 #ifdef TARGET_WORDS_BIGENDIAN
349 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
350 #else
351 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
352 #endif
353 }
354
355 static bool memory_region_wrong_endianness(MemoryRegion *mr)
356 {
357 #ifdef TARGET_WORDS_BIGENDIAN
358 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
359 #else
360 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
361 #endif
362 }
363
364 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
365 {
366 if (memory_region_wrong_endianness(mr)) {
367 switch (size) {
368 case 1:
369 break;
370 case 2:
371 *data = bswap16(*data);
372 break;
373 case 4:
374 *data = bswap32(*data);
375 break;
376 case 8:
377 *data = bswap64(*data);
378 break;
379 default:
380 abort();
381 }
382 }
383 }
384
385 static inline void memory_region_shift_read_access(uint64_t *value,
386 signed shift,
387 uint64_t mask,
388 uint64_t tmp)
389 {
390 if (shift >= 0) {
391 *value |= (tmp & mask) << shift;
392 } else {
393 *value |= (tmp & mask) >> -shift;
394 }
395 }
396
397 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
398 signed shift,
399 uint64_t mask)
400 {
401 uint64_t tmp;
402
403 if (shift >= 0) {
404 tmp = (*value >> shift) & mask;
405 } else {
406 tmp = (*value << -shift) & mask;
407 }
408
409 return tmp;
410 }
411
412 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
413 {
414 MemoryRegion *root;
415 hwaddr abs_addr = offset;
416
417 abs_addr += mr->addr;
418 for (root = mr; root->container; ) {
419 root = root->container;
420 abs_addr += root->addr;
421 }
422
423 return abs_addr;
424 }
425
426 static int get_cpu_index(void)
427 {
428 if (current_cpu) {
429 return current_cpu->cpu_index;
430 }
431 return -1;
432 }
433
434 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
435 hwaddr addr,
436 uint64_t *value,
437 unsigned size,
438 signed shift,
439 uint64_t mask,
440 MemTxAttrs attrs)
441 {
442 uint64_t tmp;
443
444 tmp = mr->ops->read(mr->opaque, addr, size);
445 if (mr->subpage) {
446 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
447 } else if (mr == &io_mem_notdirty) {
448 /* Accesses to code which has previously been translated into a TB show
449 * up in the MMIO path, as accesses to the io_mem_notdirty
450 * MemoryRegion. */
451 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
452 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
453 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
454 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
455 }
456 memory_region_shift_read_access(value, shift, mask, tmp);
457 return MEMTX_OK;
458 }
459
460 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
461 hwaddr addr,
462 uint64_t *value,
463 unsigned size,
464 signed shift,
465 uint64_t mask,
466 MemTxAttrs attrs)
467 {
468 uint64_t tmp = 0;
469 MemTxResult r;
470
471 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
472 if (mr->subpage) {
473 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
474 } else if (mr == &io_mem_notdirty) {
475 /* Accesses to code which has previously been translated into a TB show
476 * up in the MMIO path, as accesses to the io_mem_notdirty
477 * MemoryRegion. */
478 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
479 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
480 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
481 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
482 }
483 memory_region_shift_read_access(value, shift, mask, tmp);
484 return r;
485 }
486
487 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
488 hwaddr addr,
489 uint64_t *value,
490 unsigned size,
491 signed shift,
492 uint64_t mask,
493 MemTxAttrs attrs)
494 {
495 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
496
497 if (mr->subpage) {
498 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
499 } else if (mr == &io_mem_notdirty) {
500 /* Accesses to code which has previously been translated into a TB show
501 * up in the MMIO path, as accesses to the io_mem_notdirty
502 * MemoryRegion. */
503 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
504 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
505 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
506 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
507 }
508 mr->ops->write(mr->opaque, addr, tmp, size);
509 return MEMTX_OK;
510 }
511
512 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
513 hwaddr addr,
514 uint64_t *value,
515 unsigned size,
516 signed shift,
517 uint64_t mask,
518 MemTxAttrs attrs)
519 {
520 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
521
522 if (mr->subpage) {
523 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
524 } else if (mr == &io_mem_notdirty) {
525 /* Accesses to code which has previously been translated into a TB show
526 * up in the MMIO path, as accesses to the io_mem_notdirty
527 * MemoryRegion. */
528 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
529 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
530 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
531 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
532 }
533 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
534 }
535
536 static MemTxResult access_with_adjusted_size(hwaddr addr,
537 uint64_t *value,
538 unsigned size,
539 unsigned access_size_min,
540 unsigned access_size_max,
541 MemTxResult (*access_fn)
542 (MemoryRegion *mr,
543 hwaddr addr,
544 uint64_t *value,
545 unsigned size,
546 signed shift,
547 uint64_t mask,
548 MemTxAttrs attrs),
549 MemoryRegion *mr,
550 MemTxAttrs attrs)
551 {
552 uint64_t access_mask;
553 unsigned access_size;
554 unsigned i;
555 MemTxResult r = MEMTX_OK;
556
557 if (!access_size_min) {
558 access_size_min = 1;
559 }
560 if (!access_size_max) {
561 access_size_max = 4;
562 }
563
564 /* FIXME: support unaligned access? */
565 access_size = MAX(MIN(size, access_size_max), access_size_min);
566 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
567 if (memory_region_big_endian(mr)) {
568 for (i = 0; i < size; i += access_size) {
569 r |= access_fn(mr, addr + i, value, access_size,
570 (size - access_size - i) * 8, access_mask, attrs);
571 }
572 } else {
573 for (i = 0; i < size; i += access_size) {
574 r |= access_fn(mr, addr + i, value, access_size, i * 8,
575 access_mask, attrs);
576 }
577 }
578 return r;
579 }
580
581 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
582 {
583 AddressSpace *as;
584
585 while (mr->container) {
586 mr = mr->container;
587 }
588 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
589 if (mr == as->root) {
590 return as;
591 }
592 }
593 return NULL;
594 }
595
596 /* Render a memory region into the global view. Ranges in @view obscure
597 * ranges in @mr.
598 */
599 static void render_memory_region(FlatView *view,
600 MemoryRegion *mr,
601 Int128 base,
602 AddrRange clip,
603 bool readonly,
604 bool nonvolatile)
605 {
606 MemoryRegion *subregion;
607 unsigned i;
608 hwaddr offset_in_region;
609 Int128 remain;
610 Int128 now;
611 FlatRange fr;
612 AddrRange tmp;
613
614 if (!mr->enabled) {
615 return;
616 }
617
618 int128_addto(&base, int128_make64(mr->addr));
619 readonly |= mr->readonly;
620 nonvolatile |= mr->nonvolatile;
621
622 tmp = addrrange_make(base, mr->size);
623
624 if (!addrrange_intersects(tmp, clip)) {
625 return;
626 }
627
628 clip = addrrange_intersection(tmp, clip);
629
630 if (mr->alias) {
631 int128_subfrom(&base, int128_make64(mr->alias->addr));
632 int128_subfrom(&base, int128_make64(mr->alias_offset));
633 render_memory_region(view, mr->alias, base, clip,
634 readonly, nonvolatile);
635 return;
636 }
637
638 /* Render subregions in priority order. */
639 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
640 render_memory_region(view, subregion, base, clip,
641 readonly, nonvolatile);
642 }
643
644 if (!mr->terminates) {
645 return;
646 }
647
648 offset_in_region = int128_get64(int128_sub(clip.start, base));
649 base = clip.start;
650 remain = clip.size;
651
652 fr.mr = mr;
653 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
654 fr.romd_mode = mr->romd_mode;
655 fr.readonly = readonly;
656 fr.nonvolatile = nonvolatile;
657 fr.has_coalesced_range = 0;
658
659 /* Render the region itself into any gaps left by the current view. */
660 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
661 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
662 continue;
663 }
664 if (int128_lt(base, view->ranges[i].addr.start)) {
665 now = int128_min(remain,
666 int128_sub(view->ranges[i].addr.start, base));
667 fr.offset_in_region = offset_in_region;
668 fr.addr = addrrange_make(base, now);
669 flatview_insert(view, i, &fr);
670 ++i;
671 int128_addto(&base, now);
672 offset_in_region += int128_get64(now);
673 int128_subfrom(&remain, now);
674 }
675 now = int128_sub(int128_min(int128_add(base, remain),
676 addrrange_end(view->ranges[i].addr)),
677 base);
678 int128_addto(&base, now);
679 offset_in_region += int128_get64(now);
680 int128_subfrom(&remain, now);
681 }
682 if (int128_nz(remain)) {
683 fr.offset_in_region = offset_in_region;
684 fr.addr = addrrange_make(base, remain);
685 flatview_insert(view, i, &fr);
686 }
687 }
688
689 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
690 {
691 while (mr->enabled) {
692 if (mr->alias) {
693 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
694 /* The alias is included in its entirety. Use it as
695 * the "real" root, so that we can share more FlatViews.
696 */
697 mr = mr->alias;
698 continue;
699 }
700 } else if (!mr->terminates) {
701 unsigned int found = 0;
702 MemoryRegion *child, *next = NULL;
703 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
704 if (child->enabled) {
705 if (++found > 1) {
706 next = NULL;
707 break;
708 }
709 if (!child->addr && int128_ge(mr->size, child->size)) {
710 /* A child is included in its entirety. If it's the only
711 * enabled one, use it in the hope of finding an alias down the
712 * way. This will also let us share FlatViews.
713 */
714 next = child;
715 }
716 }
717 }
718 if (found == 0) {
719 return NULL;
720 }
721 if (next) {
722 mr = next;
723 continue;
724 }
725 }
726
727 return mr;
728 }
729
730 return NULL;
731 }
732
733 /* Render a memory topology into a list of disjoint absolute ranges. */
734 static FlatView *generate_memory_topology(MemoryRegion *mr)
735 {
736 int i;
737 FlatView *view;
738
739 view = flatview_new(mr);
740
741 if (mr) {
742 render_memory_region(view, mr, int128_zero(),
743 addrrange_make(int128_zero(), int128_2_64()),
744 false, false);
745 }
746 flatview_simplify(view);
747
748 view->dispatch = address_space_dispatch_new(view);
749 for (i = 0; i < view->nr; i++) {
750 MemoryRegionSection mrs =
751 section_from_flat_range(&view->ranges[i], view);
752 flatview_add_to_dispatch(view, &mrs);
753 }
754 address_space_dispatch_compact(view->dispatch);
755 g_hash_table_replace(flat_views, mr, view);
756
757 return view;
758 }
759
760 static void address_space_add_del_ioeventfds(AddressSpace *as,
761 MemoryRegionIoeventfd *fds_new,
762 unsigned fds_new_nb,
763 MemoryRegionIoeventfd *fds_old,
764 unsigned fds_old_nb)
765 {
766 unsigned iold, inew;
767 MemoryRegionIoeventfd *fd;
768 MemoryRegionSection section;
769
770 /* Generate a symmetric difference of the old and new fd sets, adding
771 * and deleting as necessary.
772 */
773
774 iold = inew = 0;
775 while (iold < fds_old_nb || inew < fds_new_nb) {
776 if (iold < fds_old_nb
777 && (inew == fds_new_nb
778 || memory_region_ioeventfd_before(&fds_old[iold],
779 &fds_new[inew]))) {
780 fd = &fds_old[iold];
781 section = (MemoryRegionSection) {
782 .fv = address_space_to_flatview(as),
783 .offset_within_address_space = int128_get64(fd->addr.start),
784 .size = fd->addr.size,
785 };
786 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
787 fd->match_data, fd->data, fd->e);
788 ++iold;
789 } else if (inew < fds_new_nb
790 && (iold == fds_old_nb
791 || memory_region_ioeventfd_before(&fds_new[inew],
792 &fds_old[iold]))) {
793 fd = &fds_new[inew];
794 section = (MemoryRegionSection) {
795 .fv = address_space_to_flatview(as),
796 .offset_within_address_space = int128_get64(fd->addr.start),
797 .size = fd->addr.size,
798 };
799 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
800 fd->match_data, fd->data, fd->e);
801 ++inew;
802 } else {
803 ++iold;
804 ++inew;
805 }
806 }
807 }
808
809 FlatView *address_space_get_flatview(AddressSpace *as)
810 {
811 FlatView *view;
812
813 rcu_read_lock();
814 do {
815 view = address_space_to_flatview(as);
816 /* If somebody has replaced as->current_map concurrently,
817 * flatview_ref returns false.
818 */
819 } while (!flatview_ref(view));
820 rcu_read_unlock();
821 return view;
822 }
823
824 static void address_space_update_ioeventfds(AddressSpace *as)
825 {
826 FlatView *view;
827 FlatRange *fr;
828 unsigned ioeventfd_nb = 0;
829 MemoryRegionIoeventfd *ioeventfds = NULL;
830 AddrRange tmp;
831 unsigned i;
832
833 view = address_space_get_flatview(as);
834 FOR_EACH_FLAT_RANGE(fr, view) {
835 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
836 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
837 int128_sub(fr->addr.start,
838 int128_make64(fr->offset_in_region)));
839 if (addrrange_intersects(fr->addr, tmp)) {
840 ++ioeventfd_nb;
841 ioeventfds = g_realloc(ioeventfds,
842 ioeventfd_nb * sizeof(*ioeventfds));
843 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
844 ioeventfds[ioeventfd_nb-1].addr = tmp;
845 }
846 }
847 }
848
849 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
850 as->ioeventfds, as->ioeventfd_nb);
851
852 g_free(as->ioeventfds);
853 as->ioeventfds = ioeventfds;
854 as->ioeventfd_nb = ioeventfd_nb;
855 flatview_unref(view);
856 }
857
858 /*
859 * Notify the memory listeners about the coalesced IO change events of
860 * range `cmr'. Only the part that has intersection of the specified
861 * FlatRange will be sent.
862 */
863 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
864 CoalescedMemoryRange *cmr, bool add)
865 {
866 AddrRange tmp;
867
868 tmp = addrrange_shift(cmr->addr,
869 int128_sub(fr->addr.start,
870 int128_make64(fr->offset_in_region)));
871 if (!addrrange_intersects(tmp, fr->addr)) {
872 return;
873 }
874 tmp = addrrange_intersection(tmp, fr->addr);
875
876 if (add) {
877 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
878 int128_get64(tmp.start),
879 int128_get64(tmp.size));
880 } else {
881 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
882 int128_get64(tmp.start),
883 int128_get64(tmp.size));
884 }
885 }
886
887 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
888 {
889 CoalescedMemoryRange *cmr;
890
891 if (!fr->has_coalesced_range) {
892 return;
893 }
894
895 if (--fr->has_coalesced_range > 0) {
896 return;
897 }
898
899 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
900 flat_range_coalesced_io_notify(fr, as, cmr, false);
901 }
902 }
903
904 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
905 {
906 MemoryRegion *mr = fr->mr;
907 CoalescedMemoryRange *cmr;
908
909 if (QTAILQ_EMPTY(&mr->coalesced)) {
910 return;
911 }
912
913 if (fr->has_coalesced_range++) {
914 return;
915 }
916
917 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
918 flat_range_coalesced_io_notify(fr, as, cmr, true);
919 }
920 }
921
922 static void address_space_update_topology_pass(AddressSpace *as,
923 const FlatView *old_view,
924 const FlatView *new_view,
925 bool adding)
926 {
927 unsigned iold, inew;
928 FlatRange *frold, *frnew;
929
930 /* Generate a symmetric difference of the old and new memory maps.
931 * Kill ranges in the old map, and instantiate ranges in the new map.
932 */
933 iold = inew = 0;
934 while (iold < old_view->nr || inew < new_view->nr) {
935 if (iold < old_view->nr) {
936 frold = &old_view->ranges[iold];
937 } else {
938 frold = NULL;
939 }
940 if (inew < new_view->nr) {
941 frnew = &new_view->ranges[inew];
942 } else {
943 frnew = NULL;
944 }
945
946 if (frold
947 && (!frnew
948 || int128_lt(frold->addr.start, frnew->addr.start)
949 || (int128_eq(frold->addr.start, frnew->addr.start)
950 && !flatrange_equal(frold, frnew)))) {
951 /* In old but not in new, or in both but attributes changed. */
952
953 if (!adding) {
954 flat_range_coalesced_io_del(frold, as);
955 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
956 }
957
958 ++iold;
959 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
960 /* In both and unchanged (except logging may have changed) */
961
962 if (adding) {
963 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
964 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
965 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
966 frold->dirty_log_mask,
967 frnew->dirty_log_mask);
968 }
969 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
970 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
971 frold->dirty_log_mask,
972 frnew->dirty_log_mask);
973 }
974 }
975
976 ++iold;
977 ++inew;
978 } else {
979 /* In new */
980
981 if (adding) {
982 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
983 flat_range_coalesced_io_add(frnew, as);
984 }
985
986 ++inew;
987 }
988 }
989 }
990
991 static void flatviews_init(void)
992 {
993 static FlatView *empty_view;
994
995 if (flat_views) {
996 return;
997 }
998
999 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
1000 (GDestroyNotify) flatview_unref);
1001 if (!empty_view) {
1002 empty_view = generate_memory_topology(NULL);
1003 /* We keep it alive forever in the global variable. */
1004 flatview_ref(empty_view);
1005 } else {
1006 g_hash_table_replace(flat_views, NULL, empty_view);
1007 flatview_ref(empty_view);
1008 }
1009 }
1010
1011 static void flatviews_reset(void)
1012 {
1013 AddressSpace *as;
1014
1015 if (flat_views) {
1016 g_hash_table_unref(flat_views);
1017 flat_views = NULL;
1018 }
1019 flatviews_init();
1020
1021 /* Render unique FVs */
1022 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1023 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1024
1025 if (g_hash_table_lookup(flat_views, physmr)) {
1026 continue;
1027 }
1028
1029 generate_memory_topology(physmr);
1030 }
1031 }
1032
1033 static void address_space_set_flatview(AddressSpace *as)
1034 {
1035 FlatView *old_view = address_space_to_flatview(as);
1036 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1037 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1038
1039 assert(new_view);
1040
1041 if (old_view == new_view) {
1042 return;
1043 }
1044
1045 if (old_view) {
1046 flatview_ref(old_view);
1047 }
1048
1049 flatview_ref(new_view);
1050
1051 if (!QTAILQ_EMPTY(&as->listeners)) {
1052 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1053
1054 if (!old_view2) {
1055 old_view2 = &tmpview;
1056 }
1057 address_space_update_topology_pass(as, old_view2, new_view, false);
1058 address_space_update_topology_pass(as, old_view2, new_view, true);
1059 }
1060
1061 /* Writes are protected by the BQL. */
1062 atomic_rcu_set(&as->current_map, new_view);
1063 if (old_view) {
1064 flatview_unref(old_view);
1065 }
1066
1067 /* Note that all the old MemoryRegions are still alive up to this
1068 * point. This relieves most MemoryListeners from the need to
1069 * ref/unref the MemoryRegions they get---unless they use them
1070 * outside the iothread mutex, in which case precise reference
1071 * counting is necessary.
1072 */
1073 if (old_view) {
1074 flatview_unref(old_view);
1075 }
1076 }
1077
1078 static void address_space_update_topology(AddressSpace *as)
1079 {
1080 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1081
1082 flatviews_init();
1083 if (!g_hash_table_lookup(flat_views, physmr)) {
1084 generate_memory_topology(physmr);
1085 }
1086 address_space_set_flatview(as);
1087 }
1088
1089 void memory_region_transaction_begin(void)
1090 {
1091 qemu_flush_coalesced_mmio_buffer();
1092 ++memory_region_transaction_depth;
1093 }
1094
1095 void memory_region_transaction_commit(void)
1096 {
1097 AddressSpace *as;
1098
1099 assert(memory_region_transaction_depth);
1100 assert(qemu_mutex_iothread_locked());
1101
1102 --memory_region_transaction_depth;
1103 if (!memory_region_transaction_depth) {
1104 if (memory_region_update_pending) {
1105 flatviews_reset();
1106
1107 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1108
1109 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1110 address_space_set_flatview(as);
1111 address_space_update_ioeventfds(as);
1112 }
1113 memory_region_update_pending = false;
1114 ioeventfd_update_pending = false;
1115 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1116 } else if (ioeventfd_update_pending) {
1117 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1118 address_space_update_ioeventfds(as);
1119 }
1120 ioeventfd_update_pending = false;
1121 }
1122 }
1123 }
1124
1125 static void memory_region_destructor_none(MemoryRegion *mr)
1126 {
1127 }
1128
1129 static void memory_region_destructor_ram(MemoryRegion *mr)
1130 {
1131 qemu_ram_free(mr->ram_block);
1132 }
1133
1134 static bool memory_region_need_escape(char c)
1135 {
1136 return c == '/' || c == '[' || c == '\\' || c == ']';
1137 }
1138
1139 static char *memory_region_escape_name(const char *name)
1140 {
1141 const char *p;
1142 char *escaped, *q;
1143 uint8_t c;
1144 size_t bytes = 0;
1145
1146 for (p = name; *p; p++) {
1147 bytes += memory_region_need_escape(*p) ? 4 : 1;
1148 }
1149 if (bytes == p - name) {
1150 return g_memdup(name, bytes + 1);
1151 }
1152
1153 escaped = g_malloc(bytes + 1);
1154 for (p = name, q = escaped; *p; p++) {
1155 c = *p;
1156 if (unlikely(memory_region_need_escape(c))) {
1157 *q++ = '\\';
1158 *q++ = 'x';
1159 *q++ = "0123456789abcdef"[c >> 4];
1160 c = "0123456789abcdef"[c & 15];
1161 }
1162 *q++ = c;
1163 }
1164 *q = 0;
1165 return escaped;
1166 }
1167
1168 static void memory_region_do_init(MemoryRegion *mr,
1169 Object *owner,
1170 const char *name,
1171 uint64_t size)
1172 {
1173 mr->size = int128_make64(size);
1174 if (size == UINT64_MAX) {
1175 mr->size = int128_2_64();
1176 }
1177 mr->name = g_strdup(name);
1178 mr->owner = owner;
1179 mr->ram_block = NULL;
1180
1181 if (name) {
1182 char *escaped_name = memory_region_escape_name(name);
1183 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1184
1185 if (!owner) {
1186 owner = container_get(qdev_get_machine(), "/unattached");
1187 }
1188
1189 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1190 object_unref(OBJECT(mr));
1191 g_free(name_array);
1192 g_free(escaped_name);
1193 }
1194 }
1195
1196 void memory_region_init(MemoryRegion *mr,
1197 Object *owner,
1198 const char *name,
1199 uint64_t size)
1200 {
1201 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1202 memory_region_do_init(mr, owner, name, size);
1203 }
1204
1205 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1206 void *opaque, Error **errp)
1207 {
1208 MemoryRegion *mr = MEMORY_REGION(obj);
1209 uint64_t value = mr->addr;
1210
1211 visit_type_uint64(v, name, &value, errp);
1212 }
1213
1214 static void memory_region_get_container(Object *obj, Visitor *v,
1215 const char *name, void *opaque,
1216 Error **errp)
1217 {
1218 MemoryRegion *mr = MEMORY_REGION(obj);
1219 gchar *path = (gchar *)"";
1220
1221 if (mr->container) {
1222 path = object_get_canonical_path(OBJECT(mr->container));
1223 }
1224 visit_type_str(v, name, &path, errp);
1225 if (mr->container) {
1226 g_free(path);
1227 }
1228 }
1229
1230 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1231 const char *part)
1232 {
1233 MemoryRegion *mr = MEMORY_REGION(obj);
1234
1235 return OBJECT(mr->container);
1236 }
1237
1238 static void memory_region_get_priority(Object *obj, Visitor *v,
1239 const char *name, void *opaque,
1240 Error **errp)
1241 {
1242 MemoryRegion *mr = MEMORY_REGION(obj);
1243 int32_t value = mr->priority;
1244
1245 visit_type_int32(v, name, &value, errp);
1246 }
1247
1248 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1249 void *opaque, Error **errp)
1250 {
1251 MemoryRegion *mr = MEMORY_REGION(obj);
1252 uint64_t value = memory_region_size(mr);
1253
1254 visit_type_uint64(v, name, &value, errp);
1255 }
1256
1257 static void memory_region_initfn(Object *obj)
1258 {
1259 MemoryRegion *mr = MEMORY_REGION(obj);
1260 ObjectProperty *op;
1261
1262 mr->ops = &unassigned_mem_ops;
1263 mr->enabled = true;
1264 mr->romd_mode = true;
1265 mr->global_locking = true;
1266 mr->destructor = memory_region_destructor_none;
1267 QTAILQ_INIT(&mr->subregions);
1268 QTAILQ_INIT(&mr->coalesced);
1269
1270 op = object_property_add(OBJECT(mr), "container",
1271 "link<" TYPE_MEMORY_REGION ">",
1272 memory_region_get_container,
1273 NULL, /* memory_region_set_container */
1274 NULL, NULL, &error_abort);
1275 op->resolve = memory_region_resolve_container;
1276
1277 object_property_add(OBJECT(mr), "addr", "uint64",
1278 memory_region_get_addr,
1279 NULL, /* memory_region_set_addr */
1280 NULL, NULL, &error_abort);
1281 object_property_add(OBJECT(mr), "priority", "uint32",
1282 memory_region_get_priority,
1283 NULL, /* memory_region_set_priority */
1284 NULL, NULL, &error_abort);
1285 object_property_add(OBJECT(mr), "size", "uint64",
1286 memory_region_get_size,
1287 NULL, /* memory_region_set_size, */
1288 NULL, NULL, &error_abort);
1289 }
1290
1291 static void iommu_memory_region_initfn(Object *obj)
1292 {
1293 MemoryRegion *mr = MEMORY_REGION(obj);
1294
1295 mr->is_iommu = true;
1296 }
1297
1298 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1299 unsigned size)
1300 {
1301 #ifdef DEBUG_UNASSIGNED
1302 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1303 #endif
1304 if (current_cpu != NULL) {
1305 bool is_exec = current_cpu->mem_io_access_type == MMU_INST_FETCH;
1306 cpu_unassigned_access(current_cpu, addr, false, is_exec, 0, size);
1307 }
1308 return 0;
1309 }
1310
1311 static void unassigned_mem_write(void *opaque, hwaddr addr,
1312 uint64_t val, unsigned size)
1313 {
1314 #ifdef DEBUG_UNASSIGNED
1315 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1316 #endif
1317 if (current_cpu != NULL) {
1318 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1319 }
1320 }
1321
1322 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1323 unsigned size, bool is_write,
1324 MemTxAttrs attrs)
1325 {
1326 return false;
1327 }
1328
1329 const MemoryRegionOps unassigned_mem_ops = {
1330 .valid.accepts = unassigned_mem_accepts,
1331 .endianness = DEVICE_NATIVE_ENDIAN,
1332 };
1333
1334 static uint64_t memory_region_ram_device_read(void *opaque,
1335 hwaddr addr, unsigned size)
1336 {
1337 MemoryRegion *mr = opaque;
1338 uint64_t data = (uint64_t)~0;
1339
1340 switch (size) {
1341 case 1:
1342 data = *(uint8_t *)(mr->ram_block->host + addr);
1343 break;
1344 case 2:
1345 data = *(uint16_t *)(mr->ram_block->host + addr);
1346 break;
1347 case 4:
1348 data = *(uint32_t *)(mr->ram_block->host + addr);
1349 break;
1350 case 8:
1351 data = *(uint64_t *)(mr->ram_block->host + addr);
1352 break;
1353 }
1354
1355 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1356
1357 return data;
1358 }
1359
1360 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1361 uint64_t data, unsigned size)
1362 {
1363 MemoryRegion *mr = opaque;
1364
1365 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1366
1367 switch (size) {
1368 case 1:
1369 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1370 break;
1371 case 2:
1372 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1373 break;
1374 case 4:
1375 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1376 break;
1377 case 8:
1378 *(uint64_t *)(mr->ram_block->host + addr) = data;
1379 break;
1380 }
1381 }
1382
1383 static const MemoryRegionOps ram_device_mem_ops = {
1384 .read = memory_region_ram_device_read,
1385 .write = memory_region_ram_device_write,
1386 .endianness = DEVICE_HOST_ENDIAN,
1387 .valid = {
1388 .min_access_size = 1,
1389 .max_access_size = 8,
1390 .unaligned = true,
1391 },
1392 .impl = {
1393 .min_access_size = 1,
1394 .max_access_size = 8,
1395 .unaligned = true,
1396 },
1397 };
1398
1399 bool memory_region_access_valid(MemoryRegion *mr,
1400 hwaddr addr,
1401 unsigned size,
1402 bool is_write,
1403 MemTxAttrs attrs)
1404 {
1405 int access_size_min, access_size_max;
1406 int access_size, i;
1407
1408 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1409 return false;
1410 }
1411
1412 if (!mr->ops->valid.accepts) {
1413 return true;
1414 }
1415
1416 access_size_min = mr->ops->valid.min_access_size;
1417 if (!mr->ops->valid.min_access_size) {
1418 access_size_min = 1;
1419 }
1420
1421 access_size_max = mr->ops->valid.max_access_size;
1422 if (!mr->ops->valid.max_access_size) {
1423 access_size_max = 4;
1424 }
1425
1426 access_size = MAX(MIN(size, access_size_max), access_size_min);
1427 for (i = 0; i < size; i += access_size) {
1428 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1429 is_write, attrs)) {
1430 return false;
1431 }
1432 }
1433
1434 return true;
1435 }
1436
1437 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1438 hwaddr addr,
1439 uint64_t *pval,
1440 unsigned size,
1441 MemTxAttrs attrs)
1442 {
1443 *pval = 0;
1444
1445 if (mr->ops->read) {
1446 return access_with_adjusted_size(addr, pval, size,
1447 mr->ops->impl.min_access_size,
1448 mr->ops->impl.max_access_size,
1449 memory_region_read_accessor,
1450 mr, attrs);
1451 } else {
1452 return access_with_adjusted_size(addr, pval, size,
1453 mr->ops->impl.min_access_size,
1454 mr->ops->impl.max_access_size,
1455 memory_region_read_with_attrs_accessor,
1456 mr, attrs);
1457 }
1458 }
1459
1460 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1461 hwaddr addr,
1462 uint64_t *pval,
1463 unsigned size,
1464 MemTxAttrs attrs)
1465 {
1466 MemTxResult r;
1467
1468 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1469 *pval = unassigned_mem_read(mr, addr, size);
1470 return MEMTX_DECODE_ERROR;
1471 }
1472
1473 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1474 adjust_endianness(mr, pval, size);
1475 return r;
1476 }
1477
1478 /* Return true if an eventfd was signalled */
1479 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1480 hwaddr addr,
1481 uint64_t data,
1482 unsigned size,
1483 MemTxAttrs attrs)
1484 {
1485 MemoryRegionIoeventfd ioeventfd = {
1486 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1487 .data = data,
1488 };
1489 unsigned i;
1490
1491 for (i = 0; i < mr->ioeventfd_nb; i++) {
1492 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1493 ioeventfd.e = mr->ioeventfds[i].e;
1494
1495 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1496 event_notifier_set(ioeventfd.e);
1497 return true;
1498 }
1499 }
1500
1501 return false;
1502 }
1503
1504 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1505 hwaddr addr,
1506 uint64_t data,
1507 unsigned size,
1508 MemTxAttrs attrs)
1509 {
1510 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1511 unassigned_mem_write(mr, addr, data, size);
1512 return MEMTX_DECODE_ERROR;
1513 }
1514
1515 adjust_endianness(mr, &data, size);
1516
1517 if ((!kvm_eventfds_enabled()) &&
1518 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1519 return MEMTX_OK;
1520 }
1521
1522 if (mr->ops->write) {
1523 return access_with_adjusted_size(addr, &data, size,
1524 mr->ops->impl.min_access_size,
1525 mr->ops->impl.max_access_size,
1526 memory_region_write_accessor, mr,
1527 attrs);
1528 } else {
1529 return
1530 access_with_adjusted_size(addr, &data, size,
1531 mr->ops->impl.min_access_size,
1532 mr->ops->impl.max_access_size,
1533 memory_region_write_with_attrs_accessor,
1534 mr, attrs);
1535 }
1536 }
1537
1538 void memory_region_init_io(MemoryRegion *mr,
1539 Object *owner,
1540 const MemoryRegionOps *ops,
1541 void *opaque,
1542 const char *name,
1543 uint64_t size)
1544 {
1545 memory_region_init(mr, owner, name, size);
1546 mr->ops = ops ? ops : &unassigned_mem_ops;
1547 mr->opaque = opaque;
1548 mr->terminates = true;
1549 }
1550
1551 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1552 Object *owner,
1553 const char *name,
1554 uint64_t size,
1555 Error **errp)
1556 {
1557 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1558 }
1559
1560 void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1561 Object *owner,
1562 const char *name,
1563 uint64_t size,
1564 bool share,
1565 Error **errp)
1566 {
1567 Error *err = NULL;
1568 memory_region_init(mr, owner, name, size);
1569 mr->ram = true;
1570 mr->terminates = true;
1571 mr->destructor = memory_region_destructor_ram;
1572 mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
1573 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1574 if (err) {
1575 mr->size = int128_zero();
1576 object_unparent(OBJECT(mr));
1577 error_propagate(errp, err);
1578 }
1579 }
1580
1581 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1582 Object *owner,
1583 const char *name,
1584 uint64_t size,
1585 uint64_t max_size,
1586 void (*resized)(const char*,
1587 uint64_t length,
1588 void *host),
1589 Error **errp)
1590 {
1591 Error *err = NULL;
1592 memory_region_init(mr, owner, name, size);
1593 mr->ram = true;
1594 mr->terminates = true;
1595 mr->destructor = memory_region_destructor_ram;
1596 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1597 mr, &err);
1598 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1599 if (err) {
1600 mr->size = int128_zero();
1601 object_unparent(OBJECT(mr));
1602 error_propagate(errp, err);
1603 }
1604 }
1605
1606 #ifdef CONFIG_POSIX
1607 void memory_region_init_ram_from_file(MemoryRegion *mr,
1608 struct Object *owner,
1609 const char *name,
1610 uint64_t size,
1611 uint64_t align,
1612 uint32_t ram_flags,
1613 const char *path,
1614 Error **errp)
1615 {
1616 Error *err = NULL;
1617 memory_region_init(mr, owner, name, size);
1618 mr->ram = true;
1619 mr->terminates = true;
1620 mr->destructor = memory_region_destructor_ram;
1621 mr->align = align;
1622 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
1623 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1624 if (err) {
1625 mr->size = int128_zero();
1626 object_unparent(OBJECT(mr));
1627 error_propagate(errp, err);
1628 }
1629 }
1630
1631 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1632 struct Object *owner,
1633 const char *name,
1634 uint64_t size,
1635 bool share,
1636 int fd,
1637 Error **errp)
1638 {
1639 Error *err = NULL;
1640 memory_region_init(mr, owner, name, size);
1641 mr->ram = true;
1642 mr->terminates = true;
1643 mr->destructor = memory_region_destructor_ram;
1644 mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
1645 share ? RAM_SHARED : 0,
1646 fd, &err);
1647 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1648 if (err) {
1649 mr->size = int128_zero();
1650 object_unparent(OBJECT(mr));
1651 error_propagate(errp, err);
1652 }
1653 }
1654 #endif
1655
1656 void memory_region_init_ram_ptr(MemoryRegion *mr,
1657 Object *owner,
1658 const char *name,
1659 uint64_t size,
1660 void *ptr)
1661 {
1662 memory_region_init(mr, owner, name, size);
1663 mr->ram = true;
1664 mr->terminates = true;
1665 mr->destructor = memory_region_destructor_ram;
1666 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1667
1668 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1669 assert(ptr != NULL);
1670 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1671 }
1672
1673 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1674 Object *owner,
1675 const char *name,
1676 uint64_t size,
1677 void *ptr)
1678 {
1679 memory_region_init(mr, owner, name, size);
1680 mr->ram = true;
1681 mr->terminates = true;
1682 mr->ram_device = true;
1683 mr->ops = &ram_device_mem_ops;
1684 mr->opaque = mr;
1685 mr->destructor = memory_region_destructor_ram;
1686 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1687 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1688 assert(ptr != NULL);
1689 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1690 }
1691
1692 void memory_region_init_alias(MemoryRegion *mr,
1693 Object *owner,
1694 const char *name,
1695 MemoryRegion *orig,
1696 hwaddr offset,
1697 uint64_t size)
1698 {
1699 memory_region_init(mr, owner, name, size);
1700 mr->alias = orig;
1701 mr->alias_offset = offset;
1702 }
1703
1704 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1705 struct Object *owner,
1706 const char *name,
1707 uint64_t size,
1708 Error **errp)
1709 {
1710 Error *err = NULL;
1711 memory_region_init(mr, owner, name, size);
1712 mr->ram = true;
1713 mr->readonly = true;
1714 mr->terminates = true;
1715 mr->destructor = memory_region_destructor_ram;
1716 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1717 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1718 if (err) {
1719 mr->size = int128_zero();
1720 object_unparent(OBJECT(mr));
1721 error_propagate(errp, err);
1722 }
1723 }
1724
1725 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1726 Object *owner,
1727 const MemoryRegionOps *ops,
1728 void *opaque,
1729 const char *name,
1730 uint64_t size,
1731 Error **errp)
1732 {
1733 Error *err = NULL;
1734 assert(ops);
1735 memory_region_init(mr, owner, name, size);
1736 mr->ops = ops;
1737 mr->opaque = opaque;
1738 mr->terminates = true;
1739 mr->rom_device = true;
1740 mr->destructor = memory_region_destructor_ram;
1741 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1742 if (err) {
1743 mr->size = int128_zero();
1744 object_unparent(OBJECT(mr));
1745 error_propagate(errp, err);
1746 }
1747 }
1748
1749 void memory_region_init_iommu(void *_iommu_mr,
1750 size_t instance_size,
1751 const char *mrtypename,
1752 Object *owner,
1753 const char *name,
1754 uint64_t size)
1755 {
1756 struct IOMMUMemoryRegion *iommu_mr;
1757 struct MemoryRegion *mr;
1758
1759 object_initialize(_iommu_mr, instance_size, mrtypename);
1760 mr = MEMORY_REGION(_iommu_mr);
1761 memory_region_do_init(mr, owner, name, size);
1762 iommu_mr = IOMMU_MEMORY_REGION(mr);
1763 mr->terminates = true; /* then re-forwards */
1764 QLIST_INIT(&iommu_mr->iommu_notify);
1765 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1766 }
1767
1768 static void memory_region_finalize(Object *obj)
1769 {
1770 MemoryRegion *mr = MEMORY_REGION(obj);
1771
1772 assert(!mr->container);
1773
1774 /* We know the region is not visible in any address space (it
1775 * does not have a container and cannot be a root either because
1776 * it has no references, so we can blindly clear mr->enabled.
1777 * memory_region_set_enabled instead could trigger a transaction
1778 * and cause an infinite loop.
1779 */
1780 mr->enabled = false;
1781 memory_region_transaction_begin();
1782 while (!QTAILQ_EMPTY(&mr->subregions)) {
1783 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1784 memory_region_del_subregion(mr, subregion);
1785 }
1786 memory_region_transaction_commit();
1787
1788 mr->destructor(mr);
1789 memory_region_clear_coalescing(mr);
1790 g_free((char *)mr->name);
1791 g_free(mr->ioeventfds);
1792 }
1793
1794 Object *memory_region_owner(MemoryRegion *mr)
1795 {
1796 Object *obj = OBJECT(mr);
1797 return obj->parent;
1798 }
1799
1800 void memory_region_ref(MemoryRegion *mr)
1801 {
1802 /* MMIO callbacks most likely will access data that belongs
1803 * to the owner, hence the need to ref/unref the owner whenever
1804 * the memory region is in use.
1805 *
1806 * The memory region is a child of its owner. As long as the
1807 * owner doesn't call unparent itself on the memory region,
1808 * ref-ing the owner will also keep the memory region alive.
1809 * Memory regions without an owner are supposed to never go away;
1810 * we do not ref/unref them because it slows down DMA sensibly.
1811 */
1812 if (mr && mr->owner) {
1813 object_ref(mr->owner);
1814 }
1815 }
1816
1817 void memory_region_unref(MemoryRegion *mr)
1818 {
1819 if (mr && mr->owner) {
1820 object_unref(mr->owner);
1821 }
1822 }
1823
1824 uint64_t memory_region_size(MemoryRegion *mr)
1825 {
1826 if (int128_eq(mr->size, int128_2_64())) {
1827 return UINT64_MAX;
1828 }
1829 return int128_get64(mr->size);
1830 }
1831
1832 const char *memory_region_name(const MemoryRegion *mr)
1833 {
1834 if (!mr->name) {
1835 ((MemoryRegion *)mr)->name =
1836 object_get_canonical_path_component(OBJECT(mr));
1837 }
1838 return mr->name;
1839 }
1840
1841 bool memory_region_is_ram_device(MemoryRegion *mr)
1842 {
1843 return mr->ram_device;
1844 }
1845
1846 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1847 {
1848 uint8_t mask = mr->dirty_log_mask;
1849 if (global_dirty_log && mr->ram_block) {
1850 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1851 }
1852 return mask;
1853 }
1854
1855 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1856 {
1857 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1858 }
1859
1860 static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1861 {
1862 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1863 IOMMUNotifier *iommu_notifier;
1864 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1865
1866 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1867 flags |= iommu_notifier->notifier_flags;
1868 }
1869
1870 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1871 imrc->notify_flag_changed(iommu_mr,
1872 iommu_mr->iommu_notify_flags,
1873 flags);
1874 }
1875
1876 iommu_mr->iommu_notify_flags = flags;
1877 }
1878
1879 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1880 IOMMUNotifier *n)
1881 {
1882 IOMMUMemoryRegion *iommu_mr;
1883
1884 if (mr->alias) {
1885 memory_region_register_iommu_notifier(mr->alias, n);
1886 return;
1887 }
1888
1889 /* We need to register for at least one bitfield */
1890 iommu_mr = IOMMU_MEMORY_REGION(mr);
1891 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1892 assert(n->start <= n->end);
1893 assert(n->iommu_idx >= 0 &&
1894 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1895
1896 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1897 memory_region_update_iommu_notify_flags(iommu_mr);
1898 }
1899
1900 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1901 {
1902 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1903
1904 if (imrc->get_min_page_size) {
1905 return imrc->get_min_page_size(iommu_mr);
1906 }
1907 return TARGET_PAGE_SIZE;
1908 }
1909
1910 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1911 {
1912 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1913 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1914 hwaddr addr, granularity;
1915 IOMMUTLBEntry iotlb;
1916
1917 /* If the IOMMU has its own replay callback, override */
1918 if (imrc->replay) {
1919 imrc->replay(iommu_mr, n);
1920 return;
1921 }
1922
1923 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1924
1925 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1926 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1927 if (iotlb.perm != IOMMU_NONE) {
1928 n->notify(n, &iotlb);
1929 }
1930
1931 /* if (2^64 - MR size) < granularity, it's possible to get an
1932 * infinite loop here. This should catch such a wraparound */
1933 if ((addr + granularity) < addr) {
1934 break;
1935 }
1936 }
1937 }
1938
1939 void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1940 {
1941 IOMMUNotifier *notifier;
1942
1943 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1944 memory_region_iommu_replay(iommu_mr, notifier);
1945 }
1946 }
1947
1948 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1949 IOMMUNotifier *n)
1950 {
1951 IOMMUMemoryRegion *iommu_mr;
1952
1953 if (mr->alias) {
1954 memory_region_unregister_iommu_notifier(mr->alias, n);
1955 return;
1956 }
1957 QLIST_REMOVE(n, node);
1958 iommu_mr = IOMMU_MEMORY_REGION(mr);
1959 memory_region_update_iommu_notify_flags(iommu_mr);
1960 }
1961
1962 void memory_region_notify_one(IOMMUNotifier *notifier,
1963 IOMMUTLBEntry *entry)
1964 {
1965 IOMMUNotifierFlag request_flags;
1966 hwaddr entry_end = entry->iova + entry->addr_mask;
1967
1968 /*
1969 * Skip the notification if the notification does not overlap
1970 * with registered range.
1971 */
1972 if (notifier->start > entry_end || notifier->end < entry->iova) {
1973 return;
1974 }
1975
1976 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1977
1978 if (entry->perm & IOMMU_RW) {
1979 request_flags = IOMMU_NOTIFIER_MAP;
1980 } else {
1981 request_flags = IOMMU_NOTIFIER_UNMAP;
1982 }
1983
1984 if (notifier->notifier_flags & request_flags) {
1985 notifier->notify(notifier, entry);
1986 }
1987 }
1988
1989 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1990 int iommu_idx,
1991 IOMMUTLBEntry entry)
1992 {
1993 IOMMUNotifier *iommu_notifier;
1994
1995 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1996
1997 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1998 if (iommu_notifier->iommu_idx == iommu_idx) {
1999 memory_region_notify_one(iommu_notifier, &entry);
2000 }
2001 }
2002 }
2003
2004 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2005 enum IOMMUMemoryRegionAttr attr,
2006 void *data)
2007 {
2008 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2009
2010 if (!imrc->get_attr) {
2011 return -EINVAL;
2012 }
2013
2014 return imrc->get_attr(iommu_mr, attr, data);
2015 }
2016
2017 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2018 MemTxAttrs attrs)
2019 {
2020 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2021
2022 if (!imrc->attrs_to_index) {
2023 return 0;
2024 }
2025
2026 return imrc->attrs_to_index(iommu_mr, attrs);
2027 }
2028
2029 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2030 {
2031 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2032
2033 if (!imrc->num_indexes) {
2034 return 1;
2035 }
2036
2037 return imrc->num_indexes(iommu_mr);
2038 }
2039
2040 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2041 {
2042 uint8_t mask = 1 << client;
2043 uint8_t old_logging;
2044
2045 assert(client == DIRTY_MEMORY_VGA);
2046 old_logging = mr->vga_logging_count;
2047 mr->vga_logging_count += log ? 1 : -1;
2048 if (!!old_logging == !!mr->vga_logging_count) {
2049 return;
2050 }
2051
2052 memory_region_transaction_begin();
2053 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2054 memory_region_update_pending |= mr->enabled;
2055 memory_region_transaction_commit();
2056 }
2057
2058 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2059 hwaddr size)
2060 {
2061 assert(mr->ram_block);
2062 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2063 size,
2064 memory_region_get_dirty_log_mask(mr));
2065 }
2066
2067 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2068 {
2069 MemoryListener *listener;
2070 AddressSpace *as;
2071 FlatView *view;
2072 FlatRange *fr;
2073
2074 /* If the same address space has multiple log_sync listeners, we
2075 * visit that address space's FlatView multiple times. But because
2076 * log_sync listeners are rare, it's still cheaper than walking each
2077 * address space once.
2078 */
2079 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2080 if (!listener->log_sync) {
2081 continue;
2082 }
2083 as = listener->address_space;
2084 view = address_space_get_flatview(as);
2085 FOR_EACH_FLAT_RANGE(fr, view) {
2086 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2087 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2088 listener->log_sync(listener, &mrs);
2089 }
2090 }
2091 flatview_unref(view);
2092 }
2093 }
2094
2095 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2096 hwaddr len)
2097 {
2098 MemoryRegionSection mrs;
2099 MemoryListener *listener;
2100 AddressSpace *as;
2101 FlatView *view;
2102 FlatRange *fr;
2103 hwaddr sec_start, sec_end, sec_size;
2104
2105 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2106 if (!listener->log_clear) {
2107 continue;
2108 }
2109 as = listener->address_space;
2110 view = address_space_get_flatview(as);
2111 FOR_EACH_FLAT_RANGE(fr, view) {
2112 if (!fr->dirty_log_mask || fr->mr != mr) {
2113 /*
2114 * Clear dirty bitmap operation only applies to those
2115 * regions whose dirty logging is at least enabled
2116 */
2117 continue;
2118 }
2119
2120 mrs = section_from_flat_range(fr, view);
2121
2122 sec_start = MAX(mrs.offset_within_region, start);
2123 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2124 sec_end = MIN(sec_end, start + len);
2125
2126 if (sec_start >= sec_end) {
2127 /*
2128 * If this memory region section has no intersection
2129 * with the requested range, skip.
2130 */
2131 continue;
2132 }
2133
2134 /* Valid case; shrink the section if needed */
2135 mrs.offset_within_address_space +=
2136 sec_start - mrs.offset_within_region;
2137 mrs.offset_within_region = sec_start;
2138 sec_size = sec_end - sec_start;
2139 mrs.size = int128_make64(sec_size);
2140 listener->log_clear(listener, &mrs);
2141 }
2142 flatview_unref(view);
2143 }
2144 }
2145
2146 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2147 hwaddr addr,
2148 hwaddr size,
2149 unsigned client)
2150 {
2151 DirtyBitmapSnapshot *snapshot;
2152 assert(mr->ram_block);
2153 memory_region_sync_dirty_bitmap(mr);
2154 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2155 memory_global_after_dirty_log_sync();
2156 return snapshot;
2157 }
2158
2159 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2160 hwaddr addr, hwaddr size)
2161 {
2162 assert(mr->ram_block);
2163 return cpu_physical_memory_snapshot_get_dirty(snap,
2164 memory_region_get_ram_addr(mr) + addr, size);
2165 }
2166
2167 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2168 {
2169 if (mr->readonly != readonly) {
2170 memory_region_transaction_begin();
2171 mr->readonly = readonly;
2172 memory_region_update_pending |= mr->enabled;
2173 memory_region_transaction_commit();
2174 }
2175 }
2176
2177 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2178 {
2179 if (mr->nonvolatile != nonvolatile) {
2180 memory_region_transaction_begin();
2181 mr->nonvolatile = nonvolatile;
2182 memory_region_update_pending |= mr->enabled;
2183 memory_region_transaction_commit();
2184 }
2185 }
2186
2187 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2188 {
2189 if (mr->romd_mode != romd_mode) {
2190 memory_region_transaction_begin();
2191 mr->romd_mode = romd_mode;
2192 memory_region_update_pending |= mr->enabled;
2193 memory_region_transaction_commit();
2194 }
2195 }
2196
2197 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2198 hwaddr size, unsigned client)
2199 {
2200 assert(mr->ram_block);
2201 cpu_physical_memory_test_and_clear_dirty(
2202 memory_region_get_ram_addr(mr) + addr, size, client);
2203 }
2204
2205 int memory_region_get_fd(MemoryRegion *mr)
2206 {
2207 int fd;
2208
2209 rcu_read_lock();
2210 while (mr->alias) {
2211 mr = mr->alias;
2212 }
2213 fd = mr->ram_block->fd;
2214 rcu_read_unlock();
2215
2216 return fd;
2217 }
2218
2219 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2220 {
2221 void *ptr;
2222 uint64_t offset = 0;
2223
2224 rcu_read_lock();
2225 while (mr->alias) {
2226 offset += mr->alias_offset;
2227 mr = mr->alias;
2228 }
2229 assert(mr->ram_block);
2230 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2231 rcu_read_unlock();
2232
2233 return ptr;
2234 }
2235
2236 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2237 {
2238 RAMBlock *block;
2239
2240 block = qemu_ram_block_from_host(ptr, false, offset);
2241 if (!block) {
2242 return NULL;
2243 }
2244
2245 return block->mr;
2246 }
2247
2248 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2249 {
2250 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2251 }
2252
2253 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2254 {
2255 assert(mr->ram_block);
2256
2257 qemu_ram_resize(mr->ram_block, newsize, errp);
2258 }
2259
2260 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
2261 {
2262 FlatView *view;
2263 FlatRange *fr;
2264
2265 view = address_space_get_flatview(as);
2266 FOR_EACH_FLAT_RANGE(fr, view) {
2267 if (fr->mr == mr) {
2268 flat_range_coalesced_io_del(fr, as);
2269 flat_range_coalesced_io_add(fr, as);
2270 }
2271 }
2272 flatview_unref(view);
2273 }
2274
2275 static void memory_region_update_coalesced_range(MemoryRegion *mr)
2276 {
2277 AddressSpace *as;
2278
2279 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2280 memory_region_update_coalesced_range_as(mr, as);
2281 }
2282 }
2283
2284 void memory_region_set_coalescing(MemoryRegion *mr)
2285 {
2286 memory_region_clear_coalescing(mr);
2287 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2288 }
2289
2290 void memory_region_add_coalescing(MemoryRegion *mr,
2291 hwaddr offset,
2292 uint64_t size)
2293 {
2294 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2295
2296 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2297 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2298 memory_region_update_coalesced_range(mr);
2299 memory_region_set_flush_coalesced(mr);
2300 }
2301
2302 void memory_region_clear_coalescing(MemoryRegion *mr)
2303 {
2304 CoalescedMemoryRange *cmr;
2305
2306 if (QTAILQ_EMPTY(&mr->coalesced)) {
2307 return;
2308 }
2309
2310 qemu_flush_coalesced_mmio_buffer();
2311 mr->flush_coalesced_mmio = false;
2312
2313 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2314 cmr = QTAILQ_FIRST(&mr->coalesced);
2315 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2316 g_free(cmr);
2317 }
2318
2319 memory_region_update_coalesced_range(mr);
2320 }
2321
2322 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2323 {
2324 mr->flush_coalesced_mmio = true;
2325 }
2326
2327 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2328 {
2329 qemu_flush_coalesced_mmio_buffer();
2330 if (QTAILQ_EMPTY(&mr->coalesced)) {
2331 mr->flush_coalesced_mmio = false;
2332 }
2333 }
2334
2335 void memory_region_clear_global_locking(MemoryRegion *mr)
2336 {
2337 mr->global_locking = false;
2338 }
2339
2340 static bool userspace_eventfd_warning;
2341
2342 void memory_region_add_eventfd(MemoryRegion *mr,
2343 hwaddr addr,
2344 unsigned size,
2345 bool match_data,
2346 uint64_t data,
2347 EventNotifier *e)
2348 {
2349 MemoryRegionIoeventfd mrfd = {
2350 .addr.start = int128_make64(addr),
2351 .addr.size = int128_make64(size),
2352 .match_data = match_data,
2353 .data = data,
2354 .e = e,
2355 };
2356 unsigned i;
2357
2358 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2359 userspace_eventfd_warning))) {
2360 userspace_eventfd_warning = true;
2361 error_report("Using eventfd without MMIO binding in KVM. "
2362 "Suboptimal performance expected");
2363 }
2364
2365 if (size) {
2366 adjust_endianness(mr, &mrfd.data, size);
2367 }
2368 memory_region_transaction_begin();
2369 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2370 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2371 break;
2372 }
2373 }
2374 ++mr->ioeventfd_nb;
2375 mr->ioeventfds = g_realloc(mr->ioeventfds,
2376 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2377 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2378 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2379 mr->ioeventfds[i] = mrfd;
2380 ioeventfd_update_pending |= mr->enabled;
2381 memory_region_transaction_commit();
2382 }
2383
2384 void memory_region_del_eventfd(MemoryRegion *mr,
2385 hwaddr addr,
2386 unsigned size,
2387 bool match_data,
2388 uint64_t data,
2389 EventNotifier *e)
2390 {
2391 MemoryRegionIoeventfd mrfd = {
2392 .addr.start = int128_make64(addr),
2393 .addr.size = int128_make64(size),
2394 .match_data = match_data,
2395 .data = data,
2396 .e = e,
2397 };
2398 unsigned i;
2399
2400 if (size) {
2401 adjust_endianness(mr, &mrfd.data, size);
2402 }
2403 memory_region_transaction_begin();
2404 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2405 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2406 break;
2407 }
2408 }
2409 assert(i != mr->ioeventfd_nb);
2410 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2411 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2412 --mr->ioeventfd_nb;
2413 mr->ioeventfds = g_realloc(mr->ioeventfds,
2414 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2415 ioeventfd_update_pending |= mr->enabled;
2416 memory_region_transaction_commit();
2417 }
2418
2419 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2420 {
2421 MemoryRegion *mr = subregion->container;
2422 MemoryRegion *other;
2423
2424 memory_region_transaction_begin();
2425
2426 memory_region_ref(subregion);
2427 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2428 if (subregion->priority >= other->priority) {
2429 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2430 goto done;
2431 }
2432 }
2433 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2434 done:
2435 memory_region_update_pending |= mr->enabled && subregion->enabled;
2436 memory_region_transaction_commit();
2437 }
2438
2439 static void memory_region_add_subregion_common(MemoryRegion *mr,
2440 hwaddr offset,
2441 MemoryRegion *subregion)
2442 {
2443 assert(!subregion->container);
2444 subregion->container = mr;
2445 subregion->addr = offset;
2446 memory_region_update_container_subregions(subregion);
2447 }
2448
2449 void memory_region_add_subregion(MemoryRegion *mr,
2450 hwaddr offset,
2451 MemoryRegion *subregion)
2452 {
2453 subregion->priority = 0;
2454 memory_region_add_subregion_common(mr, offset, subregion);
2455 }
2456
2457 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2458 hwaddr offset,
2459 MemoryRegion *subregion,
2460 int priority)
2461 {
2462 subregion->priority = priority;
2463 memory_region_add_subregion_common(mr, offset, subregion);
2464 }
2465
2466 void memory_region_del_subregion(MemoryRegion *mr,
2467 MemoryRegion *subregion)
2468 {
2469 memory_region_transaction_begin();
2470 assert(subregion->container == mr);
2471 subregion->container = NULL;
2472 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2473 memory_region_unref(subregion);
2474 memory_region_update_pending |= mr->enabled && subregion->enabled;
2475 memory_region_transaction_commit();
2476 }
2477
2478 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2479 {
2480 if (enabled == mr->enabled) {
2481 return;
2482 }
2483 memory_region_transaction_begin();
2484 mr->enabled = enabled;
2485 memory_region_update_pending = true;
2486 memory_region_transaction_commit();
2487 }
2488
2489 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2490 {
2491 Int128 s = int128_make64(size);
2492
2493 if (size == UINT64_MAX) {
2494 s = int128_2_64();
2495 }
2496 if (int128_eq(s, mr->size)) {
2497 return;
2498 }
2499 memory_region_transaction_begin();
2500 mr->size = s;
2501 memory_region_update_pending = true;
2502 memory_region_transaction_commit();
2503 }
2504
2505 static void memory_region_readd_subregion(MemoryRegion *mr)
2506 {
2507 MemoryRegion *container = mr->container;
2508
2509 if (container) {
2510 memory_region_transaction_begin();
2511 memory_region_ref(mr);
2512 memory_region_del_subregion(container, mr);
2513 mr->container = container;
2514 memory_region_update_container_subregions(mr);
2515 memory_region_unref(mr);
2516 memory_region_transaction_commit();
2517 }
2518 }
2519
2520 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2521 {
2522 if (addr != mr->addr) {
2523 mr->addr = addr;
2524 memory_region_readd_subregion(mr);
2525 }
2526 }
2527
2528 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2529 {
2530 assert(mr->alias);
2531
2532 if (offset == mr->alias_offset) {
2533 return;
2534 }
2535
2536 memory_region_transaction_begin();
2537 mr->alias_offset = offset;
2538 memory_region_update_pending |= mr->enabled;
2539 memory_region_transaction_commit();
2540 }
2541
2542 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2543 {
2544 return mr->align;
2545 }
2546
2547 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2548 {
2549 const AddrRange *addr = addr_;
2550 const FlatRange *fr = fr_;
2551
2552 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2553 return -1;
2554 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2555 return 1;
2556 }
2557 return 0;
2558 }
2559
2560 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2561 {
2562 return bsearch(&addr, view->ranges, view->nr,
2563 sizeof(FlatRange), cmp_flatrange_addr);
2564 }
2565
2566 bool memory_region_is_mapped(MemoryRegion *mr)
2567 {
2568 return mr->container ? true : false;
2569 }
2570
2571 /* Same as memory_region_find, but it does not add a reference to the
2572 * returned region. It must be called from an RCU critical section.
2573 */
2574 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2575 hwaddr addr, uint64_t size)
2576 {
2577 MemoryRegionSection ret = { .mr = NULL };
2578 MemoryRegion *root;
2579 AddressSpace *as;
2580 AddrRange range;
2581 FlatView *view;
2582 FlatRange *fr;
2583
2584 addr += mr->addr;
2585 for (root = mr; root->container; ) {
2586 root = root->container;
2587 addr += root->addr;
2588 }
2589
2590 as = memory_region_to_address_space(root);
2591 if (!as) {
2592 return ret;
2593 }
2594 range = addrrange_make(int128_make64(addr), int128_make64(size));
2595
2596 view = address_space_to_flatview(as);
2597 fr = flatview_lookup(view, range);
2598 if (!fr) {
2599 return ret;
2600 }
2601
2602 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2603 --fr;
2604 }
2605
2606 ret.mr = fr->mr;
2607 ret.fv = view;
2608 range = addrrange_intersection(range, fr->addr);
2609 ret.offset_within_region = fr->offset_in_region;
2610 ret.offset_within_region += int128_get64(int128_sub(range.start,
2611 fr->addr.start));
2612 ret.size = range.size;
2613 ret.offset_within_address_space = int128_get64(range.start);
2614 ret.readonly = fr->readonly;
2615 ret.nonvolatile = fr->nonvolatile;
2616 return ret;
2617 }
2618
2619 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2620 hwaddr addr, uint64_t size)
2621 {
2622 MemoryRegionSection ret;
2623 rcu_read_lock();
2624 ret = memory_region_find_rcu(mr, addr, size);
2625 if (ret.mr) {
2626 memory_region_ref(ret.mr);
2627 }
2628 rcu_read_unlock();
2629 return ret;
2630 }
2631
2632 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2633 {
2634 MemoryRegion *mr;
2635
2636 rcu_read_lock();
2637 mr = memory_region_find_rcu(container, addr, 1).mr;
2638 rcu_read_unlock();
2639 return mr && mr != container;
2640 }
2641
2642 void memory_global_dirty_log_sync(void)
2643 {
2644 memory_region_sync_dirty_bitmap(NULL);
2645 }
2646
2647 void memory_global_after_dirty_log_sync(void)
2648 {
2649 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2650 }
2651
2652 static VMChangeStateEntry *vmstate_change;
2653
2654 void memory_global_dirty_log_start(void)
2655 {
2656 if (vmstate_change) {
2657 qemu_del_vm_change_state_handler(vmstate_change);
2658 vmstate_change = NULL;
2659 }
2660
2661 global_dirty_log = true;
2662
2663 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2664
2665 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2666 memory_region_transaction_begin();
2667 memory_region_update_pending = true;
2668 memory_region_transaction_commit();
2669 }
2670
2671 static void memory_global_dirty_log_do_stop(void)
2672 {
2673 global_dirty_log = false;
2674
2675 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2676 memory_region_transaction_begin();
2677 memory_region_update_pending = true;
2678 memory_region_transaction_commit();
2679
2680 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2681 }
2682
2683 static void memory_vm_change_state_handler(void *opaque, int running,
2684 RunState state)
2685 {
2686 if (running) {
2687 memory_global_dirty_log_do_stop();
2688
2689 if (vmstate_change) {
2690 qemu_del_vm_change_state_handler(vmstate_change);
2691 vmstate_change = NULL;
2692 }
2693 }
2694 }
2695
2696 void memory_global_dirty_log_stop(void)
2697 {
2698 if (!runstate_is_running()) {
2699 if (vmstate_change) {
2700 return;
2701 }
2702 vmstate_change = qemu_add_vm_change_state_handler(
2703 memory_vm_change_state_handler, NULL);
2704 return;
2705 }
2706
2707 memory_global_dirty_log_do_stop();
2708 }
2709
2710 static void listener_add_address_space(MemoryListener *listener,
2711 AddressSpace *as)
2712 {
2713 FlatView *view;
2714 FlatRange *fr;
2715
2716 if (listener->begin) {
2717 listener->begin(listener);
2718 }
2719 if (global_dirty_log) {
2720 if (listener->log_global_start) {
2721 listener->log_global_start(listener);
2722 }
2723 }
2724
2725 view = address_space_get_flatview(as);
2726 FOR_EACH_FLAT_RANGE(fr, view) {
2727 MemoryRegionSection section = section_from_flat_range(fr, view);
2728
2729 if (listener->region_add) {
2730 listener->region_add(listener, &section);
2731 }
2732 if (fr->dirty_log_mask && listener->log_start) {
2733 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2734 }
2735 }
2736 if (listener->commit) {
2737 listener->commit(listener);
2738 }
2739 flatview_unref(view);
2740 }
2741
2742 static void listener_del_address_space(MemoryListener *listener,
2743 AddressSpace *as)
2744 {
2745 FlatView *view;
2746 FlatRange *fr;
2747
2748 if (listener->begin) {
2749 listener->begin(listener);
2750 }
2751 view = address_space_get_flatview(as);
2752 FOR_EACH_FLAT_RANGE(fr, view) {
2753 MemoryRegionSection section = section_from_flat_range(fr, view);
2754
2755 if (fr->dirty_log_mask && listener->log_stop) {
2756 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2757 }
2758 if (listener->region_del) {
2759 listener->region_del(listener, &section);
2760 }
2761 }
2762 if (listener->commit) {
2763 listener->commit(listener);
2764 }
2765 flatview_unref(view);
2766 }
2767
2768 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2769 {
2770 MemoryListener *other = NULL;
2771
2772 listener->address_space = as;
2773 if (QTAILQ_EMPTY(&memory_listeners)
2774 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2775 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2776 } else {
2777 QTAILQ_FOREACH(other, &memory_listeners, link) {
2778 if (listener->priority < other->priority) {
2779 break;
2780 }
2781 }
2782 QTAILQ_INSERT_BEFORE(other, listener, link);
2783 }
2784
2785 if (QTAILQ_EMPTY(&as->listeners)
2786 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2787 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2788 } else {
2789 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2790 if (listener->priority < other->priority) {
2791 break;
2792 }
2793 }
2794 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2795 }
2796
2797 listener_add_address_space(listener, as);
2798 }
2799
2800 void memory_listener_unregister(MemoryListener *listener)
2801 {
2802 if (!listener->address_space) {
2803 return;
2804 }
2805
2806 listener_del_address_space(listener, listener->address_space);
2807 QTAILQ_REMOVE(&memory_listeners, listener, link);
2808 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2809 listener->address_space = NULL;
2810 }
2811
2812 void address_space_remove_listeners(AddressSpace *as)
2813 {
2814 while (!QTAILQ_EMPTY(&as->listeners)) {
2815 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2816 }
2817 }
2818
2819 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2820 {
2821 memory_region_ref(root);
2822 as->root = root;
2823 as->current_map = NULL;
2824 as->ioeventfd_nb = 0;
2825 as->ioeventfds = NULL;
2826 QTAILQ_INIT(&as->listeners);
2827 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2828 as->name = g_strdup(name ? name : "anonymous");
2829 address_space_update_topology(as);
2830 address_space_update_ioeventfds(as);
2831 }
2832
2833 static void do_address_space_destroy(AddressSpace *as)
2834 {
2835 assert(QTAILQ_EMPTY(&as->listeners));
2836
2837 flatview_unref(as->current_map);
2838 g_free(as->name);
2839 g_free(as->ioeventfds);
2840 memory_region_unref(as->root);
2841 }
2842
2843 void address_space_destroy(AddressSpace *as)
2844 {
2845 MemoryRegion *root = as->root;
2846
2847 /* Flush out anything from MemoryListeners listening in on this */
2848 memory_region_transaction_begin();
2849 as->root = NULL;
2850 memory_region_transaction_commit();
2851 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2852
2853 /* At this point, as->dispatch and as->current_map are dummy
2854 * entries that the guest should never use. Wait for the old
2855 * values to expire before freeing the data.
2856 */
2857 as->root = root;
2858 call_rcu(as, do_address_space_destroy, rcu);
2859 }
2860
2861 static const char *memory_region_type(MemoryRegion *mr)
2862 {
2863 if (memory_region_is_ram_device(mr)) {
2864 return "ramd";
2865 } else if (memory_region_is_romd(mr)) {
2866 return "romd";
2867 } else if (memory_region_is_rom(mr)) {
2868 return "rom";
2869 } else if (memory_region_is_ram(mr)) {
2870 return "ram";
2871 } else {
2872 return "i/o";
2873 }
2874 }
2875
2876 typedef struct MemoryRegionList MemoryRegionList;
2877
2878 struct MemoryRegionList {
2879 const MemoryRegion *mr;
2880 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2881 };
2882
2883 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2884
2885 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2886 int128_sub((size), int128_one())) : 0)
2887 #define MTREE_INDENT " "
2888
2889 static void mtree_expand_owner(const char *label, Object *obj)
2890 {
2891 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2892
2893 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
2894 if (dev && dev->id) {
2895 qemu_printf(" id=%s", dev->id);
2896 } else {
2897 gchar *canonical_path = object_get_canonical_path(obj);
2898 if (canonical_path) {
2899 qemu_printf(" path=%s", canonical_path);
2900 g_free(canonical_path);
2901 } else {
2902 qemu_printf(" type=%s", object_get_typename(obj));
2903 }
2904 }
2905 qemu_printf("}");
2906 }
2907
2908 static void mtree_print_mr_owner(const MemoryRegion *mr)
2909 {
2910 Object *owner = mr->owner;
2911 Object *parent = memory_region_owner((MemoryRegion *)mr);
2912
2913 if (!owner && !parent) {
2914 qemu_printf(" orphan");
2915 return;
2916 }
2917 if (owner) {
2918 mtree_expand_owner("owner", owner);
2919 }
2920 if (parent && parent != owner) {
2921 mtree_expand_owner("parent", parent);
2922 }
2923 }
2924
2925 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
2926 hwaddr base,
2927 MemoryRegionListHead *alias_print_queue,
2928 bool owner)
2929 {
2930 MemoryRegionList *new_ml, *ml, *next_ml;
2931 MemoryRegionListHead submr_print_queue;
2932 const MemoryRegion *submr;
2933 unsigned int i;
2934 hwaddr cur_start, cur_end;
2935
2936 if (!mr) {
2937 return;
2938 }
2939
2940 for (i = 0; i < level; i++) {
2941 qemu_printf(MTREE_INDENT);
2942 }
2943
2944 cur_start = base + mr->addr;
2945 cur_end = cur_start + MR_SIZE(mr->size);
2946
2947 /*
2948 * Try to detect overflow of memory region. This should never
2949 * happen normally. When it happens, we dump something to warn the
2950 * user who is observing this.
2951 */
2952 if (cur_start < base || cur_end < cur_start) {
2953 qemu_printf("[DETECTED OVERFLOW!] ");
2954 }
2955
2956 if (mr->alias) {
2957 MemoryRegionList *ml;
2958 bool found = false;
2959
2960 /* check if the alias is already in the queue */
2961 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2962 if (ml->mr == mr->alias) {
2963 found = true;
2964 }
2965 }
2966
2967 if (!found) {
2968 ml = g_new(MemoryRegionList, 1);
2969 ml->mr = mr->alias;
2970 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2971 }
2972 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2973 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
2974 "-" TARGET_FMT_plx "%s",
2975 cur_start, cur_end,
2976 mr->priority,
2977 mr->nonvolatile ? "nv-" : "",
2978 memory_region_type((MemoryRegion *)mr),
2979 memory_region_name(mr),
2980 memory_region_name(mr->alias),
2981 mr->alias_offset,
2982 mr->alias_offset + MR_SIZE(mr->size),
2983 mr->enabled ? "" : " [disabled]");
2984 if (owner) {
2985 mtree_print_mr_owner(mr);
2986 }
2987 } else {
2988 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2989 " (prio %d, %s%s): %s%s",
2990 cur_start, cur_end,
2991 mr->priority,
2992 mr->nonvolatile ? "nv-" : "",
2993 memory_region_type((MemoryRegion *)mr),
2994 memory_region_name(mr),
2995 mr->enabled ? "" : " [disabled]");
2996 if (owner) {
2997 mtree_print_mr_owner(mr);
2998 }
2999 }
3000 qemu_printf("\n");
3001
3002 QTAILQ_INIT(&submr_print_queue);
3003
3004 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3005 new_ml = g_new(MemoryRegionList, 1);
3006 new_ml->mr = submr;
3007 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3008 if (new_ml->mr->addr < ml->mr->addr ||
3009 (new_ml->mr->addr == ml->mr->addr &&
3010 new_ml->mr->priority > ml->mr->priority)) {
3011 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3012 new_ml = NULL;
3013 break;
3014 }
3015 }
3016 if (new_ml) {
3017 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3018 }
3019 }
3020
3021 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3022 mtree_print_mr(ml->mr, level + 1, cur_start,
3023 alias_print_queue, owner);
3024 }
3025
3026 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3027 g_free(ml);
3028 }
3029 }
3030
3031 struct FlatViewInfo {
3032 int counter;
3033 bool dispatch_tree;
3034 bool owner;
3035 AccelClass *ac;
3036 const char *ac_name;
3037 };
3038
3039 static void mtree_print_flatview(gpointer key, gpointer value,
3040 gpointer user_data)
3041 {
3042 FlatView *view = key;
3043 GArray *fv_address_spaces = value;
3044 struct FlatViewInfo *fvi = user_data;
3045 FlatRange *range = &view->ranges[0];
3046 MemoryRegion *mr;
3047 int n = view->nr;
3048 int i;
3049 AddressSpace *as;
3050
3051 qemu_printf("FlatView #%d\n", fvi->counter);
3052 ++fvi->counter;
3053
3054 for (i = 0; i < fv_address_spaces->len; ++i) {
3055 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3056 qemu_printf(" AS \"%s\", root: %s",
3057 as->name, memory_region_name(as->root));
3058 if (as->root->alias) {
3059 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3060 }
3061 qemu_printf("\n");
3062 }
3063
3064 qemu_printf(" Root memory region: %s\n",
3065 view->root ? memory_region_name(view->root) : "(none)");
3066
3067 if (n <= 0) {
3068 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3069 return;
3070 }
3071
3072 while (n--) {
3073 mr = range->mr;
3074 if (range->offset_in_region) {
3075 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3076 " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3077 int128_get64(range->addr.start),
3078 int128_get64(range->addr.start)
3079 + MR_SIZE(range->addr.size),
3080 mr->priority,
3081 range->nonvolatile ? "nv-" : "",
3082 range->readonly ? "rom" : memory_region_type(mr),
3083 memory_region_name(mr),
3084 range->offset_in_region);
3085 } else {
3086 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3087 " (prio %d, %s%s): %s",
3088 int128_get64(range->addr.start),
3089 int128_get64(range->addr.start)
3090 + MR_SIZE(range->addr.size),
3091 mr->priority,
3092 range->nonvolatile ? "nv-" : "",
3093 range->readonly ? "rom" : memory_region_type(mr),
3094 memory_region_name(mr));
3095 }
3096 if (fvi->owner) {
3097 mtree_print_mr_owner(mr);
3098 }
3099
3100 if (fvi->ac) {
3101 for (i = 0; i < fv_address_spaces->len; ++i) {
3102 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3103 if (fvi->ac->has_memory(current_machine, as,
3104 int128_get64(range->addr.start),
3105 MR_SIZE(range->addr.size) + 1)) {
3106 qemu_printf(" %s", fvi->ac_name);
3107 }
3108 }
3109 }
3110 qemu_printf("\n");
3111 range++;
3112 }
3113
3114 #if !defined(CONFIG_USER_ONLY)
3115 if (fvi->dispatch_tree && view->root) {
3116 mtree_print_dispatch(view->dispatch, view->root);
3117 }
3118 #endif
3119
3120 qemu_printf("\n");
3121 }
3122
3123 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3124 gpointer user_data)
3125 {
3126 FlatView *view = key;
3127 GArray *fv_address_spaces = value;
3128
3129 g_array_unref(fv_address_spaces);
3130 flatview_unref(view);
3131
3132 return true;
3133 }
3134
3135 void mtree_info(bool flatview, bool dispatch_tree, bool owner)
3136 {
3137 MemoryRegionListHead ml_head;
3138 MemoryRegionList *ml, *ml2;
3139 AddressSpace *as;
3140
3141 if (flatview) {
3142 FlatView *view;
3143 struct FlatViewInfo fvi = {
3144 .counter = 0,
3145 .dispatch_tree = dispatch_tree,
3146 .owner = owner,
3147 };
3148 GArray *fv_address_spaces;
3149 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3150 AccelClass *ac = ACCEL_GET_CLASS(current_machine->accelerator);
3151
3152 if (ac->has_memory) {
3153 fvi.ac = ac;
3154 fvi.ac_name = current_machine->accel ? current_machine->accel :
3155 object_class_get_name(OBJECT_CLASS(ac));
3156 }
3157
3158 /* Gather all FVs in one table */
3159 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3160 view = address_space_get_flatview(as);
3161
3162 fv_address_spaces = g_hash_table_lookup(views, view);
3163 if (!fv_address_spaces) {
3164 fv_address_spaces = g_array_new(false, false, sizeof(as));
3165 g_hash_table_insert(views, view, fv_address_spaces);
3166 }
3167
3168 g_array_append_val(fv_address_spaces, as);
3169 }
3170
3171 /* Print */
3172 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3173
3174 /* Free */
3175 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3176 g_hash_table_unref(views);
3177
3178 return;
3179 }
3180
3181 QTAILQ_INIT(&ml_head);
3182
3183 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3184 qemu_printf("address-space: %s\n", as->name);
3185 mtree_print_mr(as->root, 1, 0, &ml_head, owner);
3186 qemu_printf("\n");
3187 }
3188
3189 /* print aliased regions */
3190 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3191 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3192 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner);
3193 qemu_printf("\n");
3194 }
3195
3196 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3197 g_free(ml);
3198 }
3199 }
3200
3201 void memory_region_init_ram(MemoryRegion *mr,
3202 struct Object *owner,
3203 const char *name,
3204 uint64_t size,
3205 Error **errp)
3206 {
3207 DeviceState *owner_dev;
3208 Error *err = NULL;
3209
3210 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3211 if (err) {
3212 error_propagate(errp, err);
3213 return;
3214 }
3215 /* This will assert if owner is neither NULL nor a DeviceState.
3216 * We only want the owner here for the purposes of defining a
3217 * unique name for migration. TODO: Ideally we should implement
3218 * a naming scheme for Objects which are not DeviceStates, in
3219 * which case we can relax this restriction.
3220 */
3221 owner_dev = DEVICE(owner);
3222 vmstate_register_ram(mr, owner_dev);
3223 }
3224
3225 void memory_region_init_rom(MemoryRegion *mr,
3226 struct Object *owner,
3227 const char *name,
3228 uint64_t size,
3229 Error **errp)
3230 {
3231 DeviceState *owner_dev;
3232 Error *err = NULL;
3233
3234 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3235 if (err) {
3236 error_propagate(errp, err);
3237 return;
3238 }
3239 /* This will assert if owner is neither NULL nor a DeviceState.
3240 * We only want the owner here for the purposes of defining a
3241 * unique name for migration. TODO: Ideally we should implement
3242 * a naming scheme for Objects which are not DeviceStates, in
3243 * which case we can relax this restriction.
3244 */
3245 owner_dev = DEVICE(owner);
3246 vmstate_register_ram(mr, owner_dev);
3247 }
3248
3249 void memory_region_init_rom_device(MemoryRegion *mr,
3250 struct Object *owner,
3251 const MemoryRegionOps *ops,
3252 void *opaque,
3253 const char *name,
3254 uint64_t size,
3255 Error **errp)
3256 {
3257 DeviceState *owner_dev;
3258 Error *err = NULL;
3259
3260 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3261 name, size, &err);
3262 if (err) {
3263 error_propagate(errp, err);
3264 return;
3265 }
3266 /* This will assert if owner is neither NULL nor a DeviceState.
3267 * We only want the owner here for the purposes of defining a
3268 * unique name for migration. TODO: Ideally we should implement
3269 * a naming scheme for Objects which are not DeviceStates, in
3270 * which case we can relax this restriction.
3271 */
3272 owner_dev = DEVICE(owner);
3273 vmstate_register_ram(mr, owner_dev);
3274 }
3275
3276 static const TypeInfo memory_region_info = {
3277 .parent = TYPE_OBJECT,
3278 .name = TYPE_MEMORY_REGION,
3279 .class_size = sizeof(MemoryRegionClass),
3280 .instance_size = sizeof(MemoryRegion),
3281 .instance_init = memory_region_initfn,
3282 .instance_finalize = memory_region_finalize,
3283 };
3284
3285 static const TypeInfo iommu_memory_region_info = {
3286 .parent = TYPE_MEMORY_REGION,
3287 .name = TYPE_IOMMU_MEMORY_REGION,
3288 .class_size = sizeof(IOMMUMemoryRegionClass),
3289 .instance_size = sizeof(IOMMUMemoryRegion),
3290 .instance_init = iommu_memory_region_initfn,
3291 .abstract = true,
3292 };
3293
3294 static void memory_register_types(void)
3295 {
3296 type_register_static(&memory_region_info);
3297 type_register_static(&iommu_memory_region_info);
3298 }
3299
3300 type_init(memory_register_types)
armbru's QEMU hackery