2 * Target-specific parts of semihosting/arm-compat-semi.c.
4 * Copyright (c) 2005, 2007 CodeSourcery.
5 * Copyright (c) 2019, 2022 Linaro
7 * SPDX-License-Identifier: GPL-2.0-or-later
10 #ifndef TARGET_ARM_COMMON_SEMI_TARGET_H
11 #define TARGET_ARM_COMMON_SEMI_TARGET_H
13 #ifndef CONFIG_USER_ONLY
14 #include "hw/arm/boot.h"
17 static inline target_ulong
common_semi_arg(CPUState
*cs
, int argno
)
19 ARMCPU
*cpu
= ARM_CPU(cs
);
20 CPUARMState
*env
= &cpu
->env
;
22 return env
->xregs
[argno
];
24 return env
->regs
[argno
];
28 static inline void common_semi_set_ret(CPUState
*cs
, target_ulong ret
)
30 ARMCPU
*cpu
= ARM_CPU(cs
);
31 CPUARMState
*env
= &cpu
->env
;
39 static inline bool common_semi_sys_exit_extended(CPUState
*cs
, int nr
)
41 return (nr
== TARGET_SYS_EXIT_EXTENDED
|| is_a64(cs
->env_ptr
));
44 static inline bool is_64bit_semihosting(CPUArchState
*env
)
49 static inline target_ulong
common_semi_stack_bottom(CPUState
*cs
)
51 ARMCPU
*cpu
= ARM_CPU(cs
);
52 CPUARMState
*env
= &cpu
->env
;
53 return is_a64(env
) ? env
->xregs
[31] : env
->regs
[13];
56 static inline bool common_semi_has_synccache(CPUArchState
*env
)
58 /* Ok for A64, invalid for A32/T32 */