vmxnet3: Reset packet state after emptying Tx queue
[qemu/armbru.git] / hw / net / vmxnet3_defs.h
blob64034af6d574f39e6aa0a0fbb69a302f1e241612
1 /*
2 * QEMU VMWARE VMXNET3 paravirtual NIC
4 * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com)
6 * Developed by Daynix Computing LTD (http://www.daynix.com)
8 * Authors:
9 * Dmitry Fleytman <dmitry@daynix.com>
10 * Tamir Shomer <tamirs@daynix.com>
11 * Yan Vugenfirer <yan@daynix.com>
13 * This work is licensed under the terms of the GNU GPL, version 2.
14 * See the COPYING file in the top-level directory.
17 #ifndef HW_NET_VMXNET3_DEFS_H
18 #define HW_NET_VMXNET3_DEFS_H
20 #include "net/net.h"
21 #include "hw/net/vmxnet3.h"
22 #include "hw/pci/pci_device.h"
24 #define TYPE_VMXNET3 "vmxnet3"
25 typedef struct VMXNET3State VMXNET3State;
26 DECLARE_INSTANCE_CHECKER(VMXNET3State, VMXNET3,
27 TYPE_VMXNET3)
29 /* Device state and helper functions */
30 #define VMXNET3_RX_RINGS_PER_QUEUE (2)
32 /* Cyclic ring abstraction */
33 typedef struct {
34 hwaddr pa;
35 uint32_t size;
36 uint32_t cell_size;
37 uint32_t next;
38 uint8_t gen;
39 } Vmxnet3Ring;
41 typedef struct {
42 Vmxnet3Ring tx_ring;
43 Vmxnet3Ring comp_ring;
45 uint8_t intr_idx;
46 hwaddr tx_stats_pa;
47 struct UPT1_TxStats txq_stats;
48 } Vmxnet3TxqDescr;
50 typedef struct {
51 Vmxnet3Ring rx_ring[VMXNET3_RX_RINGS_PER_QUEUE];
52 Vmxnet3Ring comp_ring;
53 uint8_t intr_idx;
54 hwaddr rx_stats_pa;
55 struct UPT1_RxStats rxq_stats;
56 } Vmxnet3RxqDescr;
58 typedef struct {
59 bool is_masked;
60 bool is_pending;
61 bool is_asserted;
62 } Vmxnet3IntState;
64 struct VMXNET3State {
65 PCIDevice parent_obj;
66 NICState *nic;
67 NICConf conf;
68 MemoryRegion bar0;
69 MemoryRegion bar1;
70 MemoryRegion msix_bar;
72 Vmxnet3RxqDescr rxq_descr[VMXNET3_DEVICE_MAX_RX_QUEUES];
73 Vmxnet3TxqDescr txq_descr[VMXNET3_DEVICE_MAX_TX_QUEUES];
75 /* Whether MSI-X support was installed successfully */
76 bool msix_used;
77 hwaddr drv_shmem;
78 hwaddr temp_shared_guest_driver_memory;
80 uint8_t txq_num;
82 /* This boolean tells whether RX packet being indicated has to */
83 /* be split into head and body chunks from different RX rings */
84 bool rx_packets_compound;
86 bool rx_vlan_stripping;
87 bool lro_supported;
89 uint8_t rxq_num;
91 /* Network MTU */
92 uint32_t mtu;
94 /* Maximum number of fragments for indicated TX packets */
95 uint32_t max_tx_frags;
97 /* Maximum number of fragments for indicated RX packets */
98 uint16_t max_rx_frags;
100 /* Index for events interrupt */
101 uint8_t event_int_idx;
103 /* Whether automatic interrupts masking enabled */
104 bool auto_int_masking;
106 bool peer_has_vhdr;
108 /* TX packets to QEMU interface */
109 struct NetTxPkt *tx_pkt;
110 uint32_t offload_mode;
111 uint32_t cso_or_gso_size;
112 uint16_t tci;
113 bool needs_vlan;
115 struct NetRxPkt *rx_pkt;
117 bool tx_sop;
118 bool skip_current_tx_pkt;
120 uint32_t device_active;
121 uint32_t last_command;
123 uint32_t link_status_and_speed;
125 Vmxnet3IntState interrupt_states[VMXNET3_MAX_INTRS];
127 uint32_t temp_mac; /* To store the low part first */
129 MACAddr perm_mac;
130 uint32_t vlan_table[VMXNET3_VFT_SIZE];
131 uint32_t rx_mode;
132 MACAddr *mcast_list;
133 uint32_t mcast_list_len;
134 uint32_t mcast_list_buff_size; /* needed for live migration. */
136 /* Compatibility flags for migration */
137 uint32_t compat_flags;
140 #endif