2 * PowerMac NVRAM emulation
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #include "qemu/osdep.h"
27 #include "qapi/error.h"
28 #include "hw/nvram/chrp_nvram.h"
29 #include "hw/nvram/mac_nvram.h"
30 #include "hw/qdev-properties.h"
31 #include "hw/qdev-properties-system.h"
32 #include "sysemu/block-backend.h"
33 #include "migration/vmstate.h"
34 #include "qemu/cutils.h"
35 #include "qemu/module.h"
39 #define DEF_SYSTEM_SIZE 0xc10
41 /* macio style NVRAM device */
42 static void macio_nvram_writeb(void *opaque
, hwaddr addr
,
43 uint64_t value
, unsigned size
)
45 MacIONVRAMState
*s
= opaque
;
47 addr
= (addr
>> s
->it_shift
) & (s
->size
- 1);
48 trace_macio_nvram_write(addr
, value
);
49 s
->data
[addr
] = value
;
51 blk_pwrite(s
->blk
, addr
, 1, &s
->data
[addr
], 0);
55 static uint64_t macio_nvram_readb(void *opaque
, hwaddr addr
,
58 MacIONVRAMState
*s
= opaque
;
61 addr
= (addr
>> s
->it_shift
) & (s
->size
- 1);
62 value
= s
->data
[addr
];
63 trace_macio_nvram_read(addr
, value
);
68 static const MemoryRegionOps macio_nvram_ops
= {
69 .read
= macio_nvram_readb
,
70 .write
= macio_nvram_writeb
,
71 .valid
.min_access_size
= 1,
72 .valid
.max_access_size
= 4,
73 .impl
.min_access_size
= 1,
74 .impl
.max_access_size
= 1,
75 .endianness
= DEVICE_BIG_ENDIAN
,
78 static const VMStateDescription vmstate_macio_nvram
= {
79 .name
= "macio_nvram",
81 .minimum_version_id
= 1,
82 .fields
= (const VMStateField
[]) {
83 VMSTATE_VBUFFER_UINT32(data
, MacIONVRAMState
, 0, NULL
, size
),
89 static void macio_nvram_reset(DeviceState
*dev
)
93 static void macio_nvram_realizefn(DeviceState
*dev
, Error
**errp
)
95 SysBusDevice
*d
= SYS_BUS_DEVICE(dev
);
96 MacIONVRAMState
*s
= MACIO_NVRAM(dev
);
98 s
->data
= g_malloc0(s
->size
);
101 int64_t len
= blk_getlength(s
->blk
);
103 error_setg_errno(errp
, -len
,
104 "could not get length of nvram backing image");
106 } else if (len
!= s
->size
) {
107 error_setg_errno(errp
, -len
,
108 "invalid size nvram backing image");
111 if (blk_set_perm(s
->blk
, BLK_PERM_CONSISTENT_READ
| BLK_PERM_WRITE
,
112 BLK_PERM_ALL
, errp
) < 0) {
115 if (blk_pread(s
->blk
, 0, s
->size
, s
->data
, 0) < 0) {
116 error_setg(errp
, "can't read-nvram contents");
121 memory_region_init_io(&s
->mem
, OBJECT(s
), &macio_nvram_ops
, s
,
122 "macio-nvram", s
->size
<< s
->it_shift
);
123 sysbus_init_mmio(d
, &s
->mem
);
126 static void macio_nvram_unrealizefn(DeviceState
*dev
)
128 MacIONVRAMState
*s
= MACIO_NVRAM(dev
);
133 static Property macio_nvram_properties
[] = {
134 DEFINE_PROP_UINT32("size", MacIONVRAMState
, size
, 0),
135 DEFINE_PROP_UINT32("it_shift", MacIONVRAMState
, it_shift
, 0),
136 DEFINE_PROP_DRIVE("drive", MacIONVRAMState
, blk
),
137 DEFINE_PROP_END_OF_LIST()
140 static void macio_nvram_class_init(ObjectClass
*oc
, void *data
)
142 DeviceClass
*dc
= DEVICE_CLASS(oc
);
144 dc
->realize
= macio_nvram_realizefn
;
145 dc
->unrealize
= macio_nvram_unrealizefn
;
146 dc
->reset
= macio_nvram_reset
;
147 dc
->vmsd
= &vmstate_macio_nvram
;
148 device_class_set_props(dc
, macio_nvram_properties
);
149 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
152 static const TypeInfo macio_nvram_type_info
= {
153 .name
= TYPE_MACIO_NVRAM
,
154 .parent
= TYPE_SYS_BUS_DEVICE
,
155 .instance_size
= sizeof(MacIONVRAMState
),
156 .class_init
= macio_nvram_class_init
,
159 static void macio_nvram_register_types(void)
161 type_register_static(&macio_nvram_type_info
);
164 /* Set up a system OpenBIOS NVRAM partition */
165 static void pmac_format_nvram_partition_of(MacIONVRAMState
*nvr
, int off
,
170 /* OpenBIOS nvram variables partition */
171 sysp_end
= chrp_nvram_create_system_partition(&nvr
->data
[off
],
172 DEF_SYSTEM_SIZE
, len
) + off
;
174 /* Free space partition */
175 chrp_nvram_create_free_partition(&nvr
->data
[sysp_end
], len
- sysp_end
);
178 #define OSX_NVRAM_SIGNATURE (0x5A)
180 /* Set up a Mac OS X NVRAM partition */
181 static void pmac_format_nvram_partition_osx(MacIONVRAMState
*nvr
, int off
,
184 uint32_t start
= off
;
185 ChrpNvramPartHdr
*part_header
;
186 unsigned char *data
= &nvr
->data
[start
];
188 /* empty partition */
189 part_header
= (ChrpNvramPartHdr
*)data
;
190 part_header
->signature
= OSX_NVRAM_SIGNATURE
;
191 pstrcpy(part_header
->name
, sizeof(part_header
->name
), "wwwwwwwwwwww");
193 chrp_nvram_finish_partition(part_header
, len
);
196 stl_be_p(&data
[20], 2);
198 /* Adler32 checksum */
199 stl_be_p(&data
[16], adler32(0, &data
[20], len
- 20));
202 /* Set up NVRAM with OF and OSX partitions */
203 void pmac_format_nvram_partition(MacIONVRAMState
*nvr
, int len
)
206 * Mac OS X expects side "B" of the flash at the second half of NVRAM,
207 * so we use half of the chip for OF and the other half for a free OSX
210 pmac_format_nvram_partition_of(nvr
, 0, len
/ 2);
211 pmac_format_nvram_partition_osx(nvr
, len
/ 2, len
/ 2);
213 type_init(macio_nvram_register_types
)