2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include "qemu/osdep.h"
30 #include "chardev/char-fe.h"
31 #include "exec/helper-proto.h"
32 #include "exec/semihost.h"
33 #include "qapi/error.h"
35 #include "sysemu/sysemu.h"
43 TARGET_SYS_lseek
= 19,
44 TARGET_SYS_select_one
= 29,
46 TARGET_SYS_argc
= 1000,
47 TARGET_SYS_argv_sz
= 1001,
48 TARGET_SYS_argv
= 1002,
49 TARGET_SYS_memset
= 1004,
55 SELECT_ONE_EXCEPT
= 3,
97 static uint32_t errno_h2g(int host_errno
)
99 static const uint32_t guest_errno
[] = {
100 [EPERM
] = TARGET_EPERM
,
101 [ENOENT
] = TARGET_ENOENT
,
102 [ESRCH
] = TARGET_ESRCH
,
103 [EINTR
] = TARGET_EINTR
,
105 [ENXIO
] = TARGET_ENXIO
,
106 [E2BIG
] = TARGET_E2BIG
,
107 [ENOEXEC
] = TARGET_ENOEXEC
,
108 [EBADF
] = TARGET_EBADF
,
109 [ECHILD
] = TARGET_ECHILD
,
110 [EAGAIN
] = TARGET_EAGAIN
,
111 [ENOMEM
] = TARGET_ENOMEM
,
112 [EACCES
] = TARGET_EACCES
,
113 [EFAULT
] = TARGET_EFAULT
,
115 [ENOTBLK
] = TARGET_ENOTBLK
,
117 [EBUSY
] = TARGET_EBUSY
,
118 [EEXIST
] = TARGET_EEXIST
,
119 [EXDEV
] = TARGET_EXDEV
,
120 [ENODEV
] = TARGET_ENODEV
,
121 [ENOTDIR
] = TARGET_ENOTDIR
,
122 [EISDIR
] = TARGET_EISDIR
,
123 [EINVAL
] = TARGET_EINVAL
,
124 [ENFILE
] = TARGET_ENFILE
,
125 [EMFILE
] = TARGET_EMFILE
,
126 [ENOTTY
] = TARGET_ENOTTY
,
128 [ETXTBSY
] = TARGET_ETXTBSY
,
130 [EFBIG
] = TARGET_EFBIG
,
131 [ENOSPC
] = TARGET_ENOSPC
,
132 [ESPIPE
] = TARGET_ESPIPE
,
133 [EROFS
] = TARGET_EROFS
,
134 [EMLINK
] = TARGET_EMLINK
,
135 [EPIPE
] = TARGET_EPIPE
,
136 [EDOM
] = TARGET_EDOM
,
137 [ERANGE
] = TARGET_ERANGE
,
138 [ENOSYS
] = TARGET_ENOSYS
,
140 [ELOOP
] = TARGET_ELOOP
,
144 if (host_errno
== 0) {
146 } else if (host_errno
> 0 && host_errno
< ARRAY_SIZE(guest_errno
) &&
147 guest_errno
[host_errno
]) {
148 return guest_errno
[host_errno
];
150 return TARGET_EINVAL
;
154 typedef struct XtensaSimConsole
{
162 static XtensaSimConsole
*sim_console
;
164 static IOCanReadHandler sim_console_can_read
;
165 static int sim_console_can_read(void *opaque
)
167 XtensaSimConsole
*p
= opaque
;
169 return sizeof(p
->input
.buffer
) - p
->input
.offset
;
172 static IOReadHandler sim_console_read
;
173 static void sim_console_read(void *opaque
, const uint8_t *buf
, int size
)
175 XtensaSimConsole
*p
= opaque
;
176 size_t copy
= sizeof(p
->input
.buffer
) - p
->input
.offset
;
181 memcpy(p
->input
.buffer
+ p
->input
.offset
, buf
, copy
);
182 p
->input
.offset
+= copy
;
185 void xtensa_sim_open_console(Chardev
*chr
)
187 static XtensaSimConsole console
;
189 qemu_chr_fe_init(&console
.be
, chr
, &error_abort
);
190 qemu_chr_fe_set_handlers(&console
.be
,
191 sim_console_can_read
,
193 NULL
, NULL
, &console
,
195 sim_console
= &console
;
198 void HELPER(simcall
)(CPUXtensaState
*env
)
200 CPUState
*cs
= CPU(xtensa_env_get_cpu(env
));
201 uint32_t *regs
= env
->regs
;
204 case TARGET_SYS_exit
:
208 case TARGET_SYS_read
:
209 case TARGET_SYS_write
:
211 bool is_write
= regs
[2] == TARGET_SYS_write
;
212 uint32_t fd
= regs
[3];
213 uint32_t vaddr
= regs
[4];
214 uint32_t len
= regs
[5];
215 uint32_t len_done
= 0;
218 hwaddr paddr
= cpu_get_phys_page_debug(cs
, vaddr
);
220 TARGET_PAGE_SIZE
- (vaddr
& (TARGET_PAGE_SIZE
- 1));
221 uint32_t io_sz
= page_left
< len
? page_left
: len
;
223 void *buf
= cpu_physical_memory_map(paddr
, &sz
, !is_write
);
230 if (fd
< 3 && sim_console
) {
231 if (is_write
&& (fd
== 1 || fd
== 2)) {
232 io_done
= qemu_chr_fe_write_all(&sim_console
->be
,
234 regs
[3] = errno_h2g(errno
);
235 } else if (!is_write
&& fd
== 0) {
236 if (sim_console
->input
.offset
) {
237 io_done
= sim_console
->input
.offset
;
238 if (io_sz
< io_done
) {
241 memcpy(buf
, sim_console
->input
.buffer
, io_done
);
242 memmove(sim_console
->input
.buffer
,
243 sim_console
->input
.buffer
+ io_done
,
244 sim_console
->input
.offset
- io_done
);
245 sim_console
->input
.offset
-= io_done
;
246 qemu_chr_fe_accept_input(&sim_console
->be
);
249 regs
[3] = TARGET_EAGAIN
;
252 qemu_log_mask(LOG_GUEST_ERROR
,
253 "%s fd %d is not supported with chardev console\n",
255 "writing to" : "reading from", fd
);
257 regs
[3] = TARGET_EBADF
;
261 write(fd
, buf
, io_sz
) :
262 read(fd
, buf
, io_sz
);
263 regs
[3] = errno_h2g(errno
);
269 cpu_physical_memory_unmap(buf
, sz
, !is_write
, io_done
);
272 regs
[3] = TARGET_EINVAL
;
282 if (io_done
< io_sz
) {
290 case TARGET_SYS_open
:
296 for (i
= 0; i
< ARRAY_SIZE(name
); ++i
) {
297 rc
= cpu_memory_rw_debug(cs
, regs
[3] + i
,
298 (uint8_t *)name
+ i
, 1, 0);
299 if (rc
!= 0 || name
[i
] == 0) {
304 if (rc
== 0 && i
< ARRAY_SIZE(name
)) {
305 regs
[2] = open(name
, regs
[4], regs
[5]);
306 regs
[3] = errno_h2g(errno
);
309 regs
[3] = TARGET_EINVAL
;
314 case TARGET_SYS_close
:
316 regs
[2] = regs
[3] = 0;
318 regs
[2] = close(regs
[3]);
319 regs
[3] = errno_h2g(errno
);
323 case TARGET_SYS_lseek
:
324 regs
[2] = lseek(regs
[3], (off_t
)(int32_t)regs
[4], regs
[5]);
325 regs
[3] = errno_h2g(errno
);
328 case TARGET_SYS_select_one
:
330 uint32_t fd
= regs
[3];
331 uint32_t rq
= regs
[4];
332 uint32_t target_tv
= regs
[5];
333 uint32_t target_tvv
[2];
335 struct timeval tv
= {0};
338 cpu_memory_rw_debug(cs
, target_tv
,
339 (uint8_t *)target_tvv
, sizeof(target_tvv
), 0);
340 tv
.tv_sec
= (int32_t)tswap32(target_tvv
[0]);
341 tv
.tv_usec
= (int32_t)tswap32(target_tvv
[1]);
343 if (fd
< 3 && sim_console
) {
344 if ((fd
== 1 || fd
== 2) && rq
== SELECT_ONE_WRITE
) {
346 } else if (fd
== 0 && rq
== SELECT_ONE_READ
) {
347 regs
[2] = sim_console
->input
.offset
> 0;
357 regs
[2] = select(fd
+ 1,
358 rq
== SELECT_ONE_READ
? &fdset
: NULL
,
359 rq
== SELECT_ONE_WRITE
? &fdset
: NULL
,
360 rq
== SELECT_ONE_EXCEPT
? &fdset
: NULL
,
361 target_tv
? &tv
: NULL
);
362 regs
[3] = errno_h2g(errno
);
367 case TARGET_SYS_argc
:
368 regs
[2] = semihosting_get_argc();
372 case TARGET_SYS_argv_sz
:
374 int argc
= semihosting_get_argc();
375 int sz
= (argc
+ 1) * sizeof(uint32_t);
378 for (i
= 0; i
< argc
; ++i
) {
379 sz
+= 1 + strlen(semihosting_get_arg(i
));
386 case TARGET_SYS_argv
:
388 int argc
= semihosting_get_argc();
389 int str_offset
= (argc
+ 1) * sizeof(uint32_t);
393 for (i
= 0; i
< argc
; ++i
) {
394 const char *str
= semihosting_get_arg(i
);
395 int str_size
= strlen(str
) + 1;
397 argptr
= tswap32(regs
[3] + str_offset
);
399 cpu_memory_rw_debug(cs
,
400 regs
[3] + i
* sizeof(uint32_t),
401 (uint8_t *)&argptr
, sizeof(argptr
), 1);
402 cpu_memory_rw_debug(cs
,
403 regs
[3] + str_offset
,
404 (uint8_t *)str
, str_size
, 1);
405 str_offset
+= str_size
;
408 cpu_memory_rw_debug(cs
,
409 regs
[3] + i
* sizeof(uint32_t),
410 (uint8_t *)&argptr
, sizeof(argptr
), 1);
415 case TARGET_SYS_memset
:
417 uint32_t base
= regs
[3];
418 uint32_t sz
= regs
[5];
422 void *buf
= cpu_physical_memory_map(base
, &len
, 1);
425 memset(buf
, regs
[4], len
);
426 cpu_physical_memory_unmap(buf
, len
, 1, len
);
439 qemu_log_mask(LOG_GUEST_ERROR
, "%s(%d): not implemented\n", __func__
, regs
[2]);
441 regs
[3] = TARGET_ENOSYS
;