riscv/sifive_u: Fix up file ordering
[qemu/ar7.git] / scripts / simplebench / 
tree1e1471f75f9d6a042b5014736660eae068d0437d
drwxr-xr-x   ..
-rw-r--r-- 2447 bench-example.py
-rwxr-xr-x 3963 bench_block_job.py
-rw-r--r-- 4615 simplebench.py