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target-mips: Fix formatting in `decode_extended_mips16_opc'
2014-12-16
Maciej W
.
Rozyc
k
i
targ
e
t-
m
ips: Fix f
o
rmatting i
n
`decod
e
_ex
t
ended_mips16_opc'
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-12-16
M
a
c
i
ej W
.
R
o
zycki
target-mips
:
Enable vecto
r
ed interrupt support fo
r
.
.
.
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
targ
e
t-mips: A
d
d M14K and
M1
4
K
c MI
P
S32r2
microMIPS
.
.
.
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-12-16
M
aciej
W
.
Rozycki
t
a
r
get-m
i
ps: Make CP0
.
Co
n
fig4 and C
P
0
.
Conf
i
g5 registers
.
.
.
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-12-16
Maciej
W
.
Rozycki
target-mips: Add 5KEc and 5KEf
MIPS64r
2
processors
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-12-16
Mac
i
ej W
.
Rozy
c
ki
targ
e
t-mips:
M
a
k
e CP1
.
FIR read-o
n
ly here too
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
ta
r
get-mips: Correct t
h
e handling of regist
e
r #72
on
.
.
.
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-11-07
M
a
ciej W
.
Ro
z
ycki
mips: Ensur
e
PC u
p
d
ate with
M
TC0 single-stepping
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-11-07
Maciej W
.
R
ozycki
m
ips: Set the CP0
.
Config3
.
DSP and CP0
.
Con
f
ig3
.
D
S
P2P
.
.
.
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-11-07
Mac
i
ej W
.
R
ozycki
m
i
ps: Add macr
o
s for CP0
.
Config3 and C
P
0
.
Config4 bits
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-11-07
Ma
c
iej W
.
Roz
y
c
k
i
mips: Respect C
P
0
.
Status
.
CU1 for microMIPS FP branches
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2014-11-07
Maciej W
.
Rozycki
mips: Remov
e
C
ONF
I
G_V
T
82C
6
86 from non
-
Fulong configs
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree
2012-09-07
Maciej
W
.
Ro
z
ycki
MI
P
S/user: Fix reset CPU
state initialization
Signed-off-by:
Maciej W. Rozycki
<macro@codesourcery.com>
commit
|
commitdiff
|
tree