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hw/riscv/virt.c: fix typo in 'aia' description
2023-07-08 Daniel Henrique... hw/riscv/virt.c: fix typo in 'aia' description
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv: rework write_misa()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230517135714.211809-12-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv/cpu.c: remove cfg setup from riscv_cpu_init()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230517135714.211809-11-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv/cpu.c: validate extensions before riscv_timer_i...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230517135714.211809-10-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv/cpu.c: add riscv_cpu_validate_misa_mxl()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230517135714.211809-9-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv/cpu.c: add priv_spec validate/disable_exts...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230517135714.211809-8-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv: add PRIV_VERSION_LATEST
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230517135714.211809-5-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv/cpu.c: remove set_priv_version()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230517135714.211809-4-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv/cpu.c: remove set_vext_version()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230517135714.211809-3-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv/cpu.c: add riscv_cpu_validate_v()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230517135714.211809-2-dbarboza@ventanamicro.com>
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2023-06-13 Daniel Henrique... target/riscv/vector_helper.c: skip set tail when vta...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230427205708.246679-2-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: add TYPE_RISCV_DYNAMIC_CPU
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230411183511.189632-4-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: add query-cpy-definitions support
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230411183511.189632-3-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: add CPU QOM header
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230411183511.189632-2-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv/cpu.c: redesign register_cpu_props()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-21-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: add RVG and remove cpu->cfg.ext_g
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-20-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cfg.ext_g setup from rv64_thead_c906_cp...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-19-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove riscv_cpu_sync_misa_cfg()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-18-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_v
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-17-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_j
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-16-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_h
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-15-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_u
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-14-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_s
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-13-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_m
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-12-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_e
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-11-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_i
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230406180351.570807-10-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_f
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230406180351.570807-9-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_d
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230406180351.570807-8-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_c
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230406180351.570807-7-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_a
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230406180351.570807-6-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: introduce riscv_cpu_add_misa_properties()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230406180351.570807-5-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv/cpu.c: remove 'multi_letter' from isa_ext_data
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230406180351.570807-4-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: remove MISA properties from isa_edata_arr[]
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230406180351.570807-3-dbarboza@ventanamicro.com>
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2023-05-05 Daniel Henrique... target/riscv: sync env->misa_ext* with cpu->cfg in...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230406180351.570807-2-dbarboza@ventanamicro.com>
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2023-03-02 Daniel Henrique... target/riscv/vector_helper.c: avoid env_archcpu() when...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230226170514.588071-3-dbarboza@ventanamicro.com>
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2023-03-02 Daniel Henrique... target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230226170514.588071-2-dbarboza@ventanamicro.com>
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2023-03-02 Daniel Henrique... target/riscv/csr.c: avoid env_archcpu() usages when...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230224174520.92490-5-dbarboza@ventanamicro.com>
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2023-03-02 Daniel Henrique... target/riscv/csr.c: use riscv_cpu_cfg() to avoid env_cpu...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230224174520.92490-4-dbarboza@ventanamicro.com>
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2023-03-02 Daniel Henrique... target/riscv/csr.c: simplify mctr()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230224174520.92490-3-dbarboza@ventanamicro.com>
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2023-03-02 Daniel Henrique... target/riscv/csr.c: use env_archcpu() in ctr()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230224174520.92490-2-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv/cpu: remove CPUArchState::features and...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230222185205.355361-11-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv: remove RISCV_FEATURE_MMU
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230222185205.355361-10-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230222185205.355361-9-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv: remove RISCV_FEATURE_PMP
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230222185205.355361-8-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv: remove RISCV_FEATURE_EPMP
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230222185205.355361-7-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv/cpu.c: error out if EPMP is enabled without PMP
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230222185205.355361-6-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv: remove RISCV_FEATURE_DEBUG
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230222185205.355361-5-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv: allow MISA writes as experimental
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230222185205.355361-4-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv: do not mask unsupported QEMU extensions...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230222185205.355361-3-dbarboza@ventanamicro.com>
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2023-03-01 Daniel Henrique... target/riscv: introduce riscv_cpu_cfg()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230222185205.355361-2-dbarboza@ventanamicro.com>
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2023-02-28 Daniel Henrique... accel/tcg: Add 'size' param to probe_access_flags()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230223234427.521114-2-dbarboza@ventanamicro.com>
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2023-02-23 Daniel Henrique... target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...ID: <20230210123836.506286-1-dbarboza@ventanamicro.com>
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2023-02-16 Daniel Henrique... hw/riscv/boot.c: make riscv_load_initrd() static
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230206140022.2748401-4-dbarboza@ventanamicro.com>
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2023-02-16 Daniel Henrique... hw/riscv/boot.c: consolidate all kernel init in riscv_load_k...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230206140022.2748401-3-dbarboza@ventanamicro.com>
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2023-02-16 Daniel Henrique... hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230206140022.2748401-2-dbarboza@ventanamicro.com>
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2023-02-06 Daniel Henrique... hw/riscv: change riscv_compute_fdt_addr() semantics
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230201171212.1219375-4-dbarboza@ventanamicro.com>
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2023-02-06 Daniel Henrique... hw/riscv: split fdt address calculation from fdt load
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230201171212.1219375-3-dbarboza@ventanamicro.com>
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2023-02-06 Daniel Henrique... hw/riscv/boot.c: calculate fdt size after fdt_pack()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
... <20230201171212.1219375-2-dbarboza@ventanamicro.com>
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2023-02-06 Daniel Henrique... hw/riscv/spike.c: rename MachineState 'mc' pointers...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230124212234.412630-4-dbarboza@ventanamicro.com>
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2023-02-06 Daniel Henrique... hw/riscv/virt.c: rename MachineState 'mc' pointers...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230124212234.412630-3-dbarboza@ventanamicro.com>
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2023-02-06 Daniel Henrique... hw/riscv/virt.c: calculate socket count once in create_fdt_i...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230124212234.412630-2-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_i...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230117132751.229738-2-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_mat...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230111170948.316276-7-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230111170948.316276-6-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_so...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230111170948.316276-5-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/sifive_u.c: simplify create_fdt()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230111170948.316276-4-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/virt.c: simplify create_fdt()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230111170948.316276-3-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/spike.c: simplify create_fdt()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230111170948.316276-2-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... target/riscv/cpu.c: do not skip misa logic in riscv_cpu_real...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230113175230.473975-3-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... target/riscv/cpu: set cpu->cfg in register_cpu_props()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230113175230.473975-2-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/boot.c: use MachineState in riscv_load_kernel()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-10-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/boot.c: use MachineState in riscv_load_initrd()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-9-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-8-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-7-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/spike.c: load initrd right after riscv_load_kernel()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-6-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/boot.c: exit early if filename is NULL in...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-5-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/sifive_u: use 'fdt' from MachineState
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-4-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/spike: use 'fdt' from MachineState
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-3-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... tests/avocado: add RISC-V OpenSBI boot test
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230102115241.25733-2-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/boot.c: introduce riscv_default_firmware_name()
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20221221182300.307900-6-dbarboza@ventanamicro.com>
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2023-01-20 Daniel Henrique... hw/riscv/boot.c: make riscv_find_firmware() static
 ...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20221221182300.307900-5-dbarboza@ventanamicro.com>
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2023-01-13 Daniel Henrique... hw/mips/boston: Rename MachineState 'mc' pointer to...
...by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
...Id: <20230111172133.334735-1-dbarboza@ventanamicro.com>
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AR7 emulation for QEMU