target/riscv: add PRIV_VERSION_LATEST
commitb9a2b98e172336e8ec464b3b63bf0dedba944502
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Wed, 17 May 2023 13:57:07 +0000 (17 10:57 -0300)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 13 Jun 2023 06:56:12 +0000 (13 16:56 +1000)
tree9452fd52a2e6c945265be382e7ed6da8bbd19e4a
parent8c6eeb508a98b185fac71c4dad523763ab779a83
target/riscv: add PRIV_VERSION_LATEST

All these generic CPUs are using the latest priv available, at this
moment PRIV_VERSION_1_12_0:

- riscv_any_cpu_init()
- rv32_base_cpu_init()
- rv64_base_cpu_init()
- rv128_base_cpu_init()

Create a new PRIV_VERSION_LATEST enum and use it in those cases. I'll
make it easier to update everything at once when a new priv version is
available.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230517135714.211809-5-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu.h