| 2014-01-08 | Claudio Fontana | target-arm: A64: add support for conditional compare... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2014-01-08 | Claudio Fontana | target-arm: A64: add support for add/sub with carry Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2014-01-07 | Peter Maydell | target-arm: Widen thread-local register state fields... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2014-01-07 | Peter Maydell | target-arm: A64: Implement minimal set of EL0-visible... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2014-01-07 | Peter Maydell | target-arm: A64: Implement MRS/MSR/SYS/SYSL Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2014-01-07 | Peter Maydell | target-arm: Remove ARMCPU/CPUARMState from cpregs APIs... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2014-01-04 | Peter Maydell | target-arm: Update generic cpreg code for AArch64 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2014-01-04 | Peter Maydell | target-arm: Pull "add one cpreg to hashtable" into... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Peter Maydell | target-arm: A64: implement FMOV Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Peter Maydell | target-arm: A64: Add decoder skeleton for FP instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Alexander Graf | target-arm: A64: implement SVC, BRK Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Alexander Graf | target-arm: A64: add support for 3 src data proc insns Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Alex Bennée | target-arm: A64: add support for move wide instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Alex Bennée | target-arm: A64: add support for add, addi, sub, subi Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Alex Bennée | target-arm: A64: add support for ld/st with index Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Alex Bennée | target-arm: A64: add support for ld/st with reg offset Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Alex Bennée | target-arm: A64: add support for ld/st unsigned imm Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-23 | Peter Maydell | target-arm: A64: add support for ld/st pair Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | liguang | MAINTAINERS: add myself to maintain allwinner-a10 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | liguang | hw/arm: add cubieboard support Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | liguang | hw/arm: add allwinner a10 SoC support Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | liguang | hw/intc: add allwinner A10 interrupt controller Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | liguang | hw/timer: add allwinner a10 timer Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Maydell | vmstate: Add support for an array of ptimer_state * Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Antony Pavlov | MAINTAINERS: Document 'Canon DIGIC' machine Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Antony Pavlov | hw/arm/digic: add NOR ROM support Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Antony Pavlov | hw/arm/digic: add UART support Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Antony Pavlov | hw/arm/digic: add timer support Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Antony Pavlov | hw/arm/digic: prepare DIGIC-based boards support Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Antony Pavlov | hw/arm: add very initial support for Canon DIGIC SoC Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for logical (immediate... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Claudio Fontana | target-arm: A64: add support for 1-src CLS insn Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Claudio Fontana | host-utils: add clrsb32/64 - count leading redundant... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Claudio Fontana | target-arm: A64: add support for bitfield insns Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Claudio Fontana | target-arm: A64: add support for 1-src REV insns Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for 1-src RBIT insn Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Claudio Fontana | target-arm: A64: add support for 1-src data processing... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for 2-src shift reg insns Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for 2-src data processing... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for EXTR Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for ADR and ADRP Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for logical (shifted register) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Claudio Fontana | target-arm: A64: add support for conditional select Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for compare and branch imm Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for 'test and branch' imm Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for conditional branches Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for BR, BLR and RET insns Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add support for B and BL insns Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Claudio Fontana | target-arm: A64: expand decoding skeleton for system... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Claudio Fontana | target-arm: A64: provide skeleton for a64 insn decoding Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add stubs for a64 specific helpers Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Maydell | target-arm: Support fp registers in gdb stub Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Maydell | target-arm: A64: provide functions for accessing FPCR... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Alexander Graf | target-arm: A64: add set_pc cpu method Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Maydell | target-arm: Split A64 from A32/T32 gen_intermediate_code_int... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Maydell | default-configs: Add config for aarch64-softmmu Signed-off-by: Peter Maydell <peter.maydell@linaro.org> ...1385645602-18662-8-git-send-email-peter.maydell@linaro.org |
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| 2013-12-17 | Mian M. Hamayun | hw/arm/boot: Add boot support for AArch64 processor Signed-off-by: Peter Maydell <peter.maydell@linaro.org> ...1385645602-18662-7-git-send-email-peter.maydell@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Maydell | hw/arm/boot: Allow easier swapping in of different... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> ...1385645602-18662-6-git-send-email-peter.maydell@linaro.org |
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| 2013-12-17 | Peter Maydell | configure: Enable KVM for aarch64 host/target combination Signed-off-by: Peter Maydell <peter.maydell@linaro.org> ...1385645602-18662-5-git-send-email-peter.maydell@linaro.org |
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| 2013-12-17 | Mian M. Hamayun | target-arm: Add minimal KVM AArch64 support Signed-off-by: Peter Maydell <peter.maydell@linaro.org> ...1385645602-18662-4-git-send-email-peter.maydell@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Maydell | target-arm: Clean up handling of AArch64 PSTATE Signed-off-by: Peter Maydell <peter.maydell@linaro.org> ...1385645602-18662-3-git-send-email-peter.maydell@linaro.org |
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| 2013-12-17 | Peter Maydell | target-arm/kvm: Split 32 bit only code into its own... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> ...1385645602-18662-2-git-send-email-peter.maydell@linaro.org |
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| 2013-12-17 | Antony Pavlov | ARM: arm_cpu_reset: make it possible to use high vectors... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Antony Pavlov | ARM: cpu: add "reset_hivecs" property Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Crosthwaite | arm/highbank.c: Fix MPCore periphbase name Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Crosthwaite | arm/xilinx_zynq: Implement CBAR initialisation Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Crosthwaite | arm/xilinx_zynq: Use object_new() rather than cpu_arm_init() Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Crosthwaite | arm/highbank: Fix CBAR initialisation Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Crosthwaite | arm/highbank: Use object_new() rather than cpu_arm_init() Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Crosthwaite | target-arm/cpu: Convert reset CBAR to a property Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Crosthwaite | target-arm: Define and use ARM_FEATURE_CBAR Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Peter Crosthwaite | target-arm/helper.c: Allow cp15.c15 dummy override Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Roy Franz | Fix NOR flash device ID reading Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Roy Franz | Fix CFI query responses for NOR flash Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Roy Franz | Add max device width parameter for NOR devices Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Roy Franz | Set proper device-width for vexpress flash Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Roy Franz | return status for each NOR flash device Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Roy Franz | Add device-width property to pflash_cfi01 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Roy Franz | rename pflash_t member width to bank_width Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-17 | Ard Biesheuvel | target-arm: add support for v8 AES instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Sergey Fedorov | target-arm: fix TTBCR write masking Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Richard Henderson | target-arm: Use new qemu_ld/st opcodes Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Will Newton | target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Will Newton | target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Will Newton | softfloat: Add minNum() and maxNum() functions to softfloat. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Will Newton | softfloat: Remove unused argument from MINMAX macro. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Will Newton | target-arm: Implement ARMv8 VSEL instruction. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Will Newton | target-arm: Move call to disas_vfp_insn out of disas_coproc_... Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Don't rx packets when no rx buffer... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Improve can_receive debug printfery Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Fix register w1c logic Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Fix small packet FCS stripping Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Fix rx multi-fragment packets Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Add missing VMSTATE_END_OF_LIST Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Implement SAR (de)activation Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Implement SAR match bit in rx desc Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Implement RX descriptor match mode... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Prefetch rx descriptors ASAP Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: simplify rx buf descriptor walking Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| 2013-12-10 | Peter Crosthwaite | net/cadence_gem: Don't assert against 0 buffer address Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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