2019-09-05 | Richard Henderson | target/arm: Convert T16 one low register and immediate ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-53-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert T16 add/sub (3 low, 2 low and imm) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-52-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert T16 load/store multiple ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-51-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert T16 add pc/sp (immediate) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-50-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert T16 load/store (immediate offset) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-49-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert T16 load/store (register offset) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-48-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert T16 data-processing (two low regs) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-47-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Add skeleton for T16 decodetree ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-46-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Simplify disas_arm_insn ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-45-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Simplify disas_thumb2_insn ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-44-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert TT ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-43-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert SG ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-42-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Table Branch ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-41-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert Unallocated memory hint ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-40-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert PLI, PLD, PLDW ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-39-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert SETEND ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-38-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert CPS (privileged) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-37-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert Clear-Exclusive, Barriers ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-36-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert RFE and SRS ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-35-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert SVC ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-34-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert B, BL, BLX (immediate) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-33-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Diagnose base == pc for LDM/STM ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-32-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Diagnose too few registers in list for... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-31-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Diagnose writeback register in list for... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-30-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert LDM, STM ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-29-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert MOVW, MOVT ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-28-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Signed multiply, signed and unsigned... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-27-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert packing, unpacking, saturation... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-26-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert Parallel addition and subtraction ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-25-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert USAD8, USADA8, SBFX, UBFX, BFC... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-24-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Diagnose UNPREDICTABLE ldrex/strex cases ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-23-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Synchronization primitives ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-22-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert load/store (register, immediate... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-21-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T32 ADDW/SUBW ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-20-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert the rest of A32 Miscelaneous instructions ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-19-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert ERET ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-18-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert CLZ ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-17-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert BX, BXJ, BLX (register) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-16-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Cyclic Redundancy Check ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-15-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert MRS/MSR (banked, register) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-14-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert MSR (immediate) and hints ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-13-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Simplify op_smlawx for SMLAW* ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-12-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Simplify op_smlaxxx for SMLAL* ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-11-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Halfword multiply and multiply... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-10-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert Saturating addition and subtraction ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-9-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Simplify UMAAL ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-8-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert multiply and multiply accumulate ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-7-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Data Processing (immediate) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-6-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Convert Data Processing (reg-shifted-reg) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-5-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Data Processing (register) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-4-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Add stubs for aa32 decodetree ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-3-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-05 | Richard Henderson | target/arm: Use store_reg_from_load in thumb2 code ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-2-richard.henderson@linaro.org |
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2019-09-04 | Richard Henderson | target/openrisc: Update cpu "any" to v1.3 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Implement l.adrp ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Implement move to/from FPCSR ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Implement unordered fp comparisons ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Add support for ORFPX64A32 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Check CPUCFG_OF32S for float insns ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Fix lf.ftoi.s ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Add VR2 and AVR special processor... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
commitcommitdifftree |
2019-09-04 | Richard Henderson | target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Make VR and PPC read-only ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Cache R0 in DisasContext ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Replace cpu register array with a... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-04 | Richard Henderson | target/openrisc: Add DisasContext parameter to check_r0_write ...off-by: Richard Henderson <richard.henderson@linaro.org> |
commitcommitdifftree |
2019-09-03 | Richard Henderson | cputlb: Handle watchpoints via TLB_WATCHPOINT ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-03 | Richard Henderson | cputlb: Remove double-alignment in store_helper ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-03 | Richard Henderson | cputlb: Fix size operand for tlb_fill on unaligned... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-03 | Richard Henderson | exec: Factor out cpu_watchpoint_address_matches ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-03 | Richard Henderson | cputlb: Fold TLB_RECHECK into TLB_INVALID_MASK ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-03 | Richard Henderson | exec: Move user-only watchpoint stubs inline ...off-by: Richard Henderson <richard.henderson@linaro.org> |
commitcommitdifftree |
2019-09-03 | Richard Henderson | target/arm: Fix SMMLS argument order ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190829013258.16102-1-richard.henderson@linaro.org |
commitcommitdifftree |
2019-09-03 | Richard Henderson | target/arm: Factor out unallocated_encoding for aarch32 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190826151536.6771-3-richard.henderson@linaro.org |
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2019-09-03 | Richard Henderson | Revert "target/arm: Use unallocated_encoding for aarch32" ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190826151536.6771-2-richard.henderson@linaro.org |
commitcommitdifftree |
2019-08-28 | Richard Henderson | target/ppc: Fix do_float_check_status vs inexact ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190826165434.18403-2-richard.henderson@linaro.org> |
commitcommitdifftree |
2019-08-28 | Richard Henderson | target/ppc: Set float_tininess_before_rounding at cpu... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190827020013.27154-1-richard.henderson@linaro.org> |
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2019-08-19 | Richard Henderson | target/riscv: Remove redundant declaration pragmas ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-08-19 | Richard Henderson | decodetree: Suppress redundant declaration warnings ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-08-19 | Richard Henderson | decodetree: Allow !function with no input bits ...off-by: Richard Henderson <richard.henderson@linaro.org> |
commitcommitdifftree |
2019-08-16 | Richard Henderson | target/arm: Use tcg_gen_extrh_i64_i32 to extract the... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190808202616.13782-8-richard.henderson@linaro.org |
commitcommitdifftree |
2019-08-16 | Richard Henderson | target/arm: Simplify SMMLA, SMMLAR, SMMLS, SMMLSR ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190808202616.13782-7-richard.henderson@linaro.org |
commitcommitdifftree |
2019-08-16 | Richard Henderson | target/arm: Use tcg_gen_rotri_i32 for gen_swap_half ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190808202616.13782-6-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Use ror32 instead of open-coding the operation ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190808202616.13782-5-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Remove redundant shift tests ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190808202616.13782-4-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Use tcg_gen_deposit_i32 for PKHBT, PKHTB ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190808202616.13782-3-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Use tcg_gen_extract_i32 for shifter_out_im ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190808202616.13782-2-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Remove helper_double_saturate ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-12-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Use unallocated_encoding for aarch32 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-11-richard.henderson@linaro.org |
commitcommitdifftree |
2019-08-16 | Richard Henderson | target/arm: Remove offset argument to gen_exception_bkpt_insn ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-10-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Replace offset with pc in gen_exception_internal... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-9-richard.henderson@linaro.org |
commitcommitdifftree |
2019-08-16 | Richard Henderson | target/arm: Replace offset with pc in gen_exception_insn ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-8-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Replace s->pc with s->base.pc_next ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-7-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Remove redundant s->pc & ~1 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-6-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Introduce add_reg_for_lit ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-5-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Introduce read_pc ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-4-richard.henderson@linaro.org |
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2019-08-16 | Richard Henderson | target/arm: Introduce pc_curr ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-3-richard.henderson@linaro.org |
commitcommitdifftree |
2019-08-16 | Richard Henderson | target/arm: Pass in pc to thumb_insn_is_16bit ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190807045335.1361-2-richard.henderson@linaro.org |
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2019-07-14 | Richard Henderson | tcg: Release mmap_lock on translation fault ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-07-14 | Richard Henderson | tcg: Remove duplicate #if !defined(CODE_ACCESS) ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-07-14 | Richard Henderson | tcg: Remove cpu_ld*_code_ra ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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