| commit | b72e3ff65880f2b894a2692e2b0a14424058a919 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Sun, 25 Aug 2019 21:28:37 +0000 (25 14:28 -0700) | ||
| committer | Richard Henderson <richard.henderson@linaro.org> | |
| Wed, 4 Sep 2019 19:48:22 +0000 (4 12:48 -0700) | ||
| tree | 3c019d506fe32b7f3af87821339291e57614746d | treesnapshot (tar.gz zip) |
| parent | d29f4368a71c6fe5de3a4424c67d4a3a2e577843 | commitdiff |
target/openrisc: Make VR and PPC read-only
These SPRs are read-only. The writes can simply be ignored,
as we already do for other read-only (or missing) registers.
There is no reason to mask the value in env->vr.
Reviewed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
These SPRs are read-only. The writes can simply be ignored,
as we already do for other read-only (or missing) registers.
There is no reason to mask the value in env->vr.
Reviewed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| target/openrisc/cpu.h | diffblobblamehistory | |
| target/openrisc/sys_helper.c | diffblobblamehistory |