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target-mips: Fix DisasContext's ulri member initialization
2014-12-16
Maci
e
j W
.
R
ozycki
target-mips: Fix
DisasContext
'
s ulri
m
ember i
n
itialization
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
target-mips: Use
loca
l
float status pointer
across
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Macie
j
W
.
Rozyck
i
targ
e
t
-
mips: Ad
d
missing ca
l
ls to sy
n
c
hronis
e
S
oftFloat
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
linu
x
-user: U
s
e
the 5KEf
p
roc
e
ssor for 64-b
i
t emulation
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
M
acie
j
W
.
Rozycki
t
arget-
m
ips: Also apply the
C
P0
.
St
a
t
u
s mask to MTTC0
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
ta
r
get-mips
:
gdbst
u
b:
C
lean
u
p
F
PU register handling
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozy
c
ki
ta
r
get-mips:
Corre
c
t
3
2
-bit address space wrappin
g
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozyc
k
i
targe
t
-mi
p
s:
T
i
ghten ISA level chec
k
s
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
R
o
zycki
target-mips: Fi
x
C
P0
.
Config3
.
ISAOnExc write accesses
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maci
e
j
W
.
Rozy
c
ki
t
a
rget-mips: Output CP0
.
Config2-5 in
the register dump
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Ma
c
iej W
.
R
o
zycki
target-
m
ips: Fix the 64-bit cas
e
f
or
m
icroMIPS
MOVE1
6
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
target-
m
ips: Correct the w
r
ites
to Status and
C
aus
e
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej
W
.
R
ozy
c
ki
targe
t
-m
i
ps: Corr
e
ct the han
d
lin
g
of writes to CP0
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Mac
i
ej W
.
Rozycki
t
arget-m
i
ps: Correct MI
P
S16/microMIPS branch s
i
ze calculatio
n
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
ta
r
get-
m
ips:
Rest
o
re the order of helpers
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
tar
g
et-mips:
R
emove unu
s
ed `FLOAT_OP' mac
r
o
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
target-
m
i
p
s: Mak
e
`helper_float_cvtw_s' c
o
n
sistent
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
target-mips: Fix formatting
in `
d
ecode_opc'
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
M
ac
i
e
j
W
.
Rozycki
targe
t
-mips: F
i
x formatting in `mip
s
_d
e
f
s'
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
targ
e
t-
m
i
p
s: Fix f
o
r
m
attin
g
in `decode_extended_mips
1
6_opc'
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
target
-
mips: Enable
v
e
ctored i
n
t
er
r
upt sup
p
o
r
t
for
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozyc
k
i
t
arget
-
mips: Add
M14K and M14Kc MI
P
S32r2
m
icroMIPS
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Macie
j
W
.
R
ozycki
target-mips:
M
ak
e
CP0
.
Config4 an
d
C
P0
.
Config5 r
e
giste
r
s
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Macie
j
W
.
Rozycki
tar
g
et-mips:
Add 5
K
Ec
a
nd 5KEf MIPS64r2 processors
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
Rozycki
tar
g
et-mips:
Make CP1
.
FIR read-only here too
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-12-16
Maciej W
.
R
o
zycki
target-mi
p
s: C
o
rrec
t
the ha
n
dling of regis
t
er #72 on
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-11-07
Maciej W
.
Rozy
c
ki
mips: Ensur
e
P
C update with MTC0 single-ste
p
ping
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-11-07
Maciej W
.
Rozycki
mips: Set the CP0
.
Conf
i
g3
.
D
S
P and CP0
.
Config3
.
DSP2P
.
.
.
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-11-07
Maciej W
.
Rozy
c
ki
mips
:
Add macros for CP0
.
Config3 and CP0
.
Conf
i
g4 bits
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-11-07
Maciej W
.
Rozycki
mips
:
R
espect CP0
.
Status
.
CU1 for mi
c
roMIPS
F
P branches
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2014-11-07
Maciej W
.
Rozycki
m
i
p
s: Remove CONFIG_VT82C686 from
n
on-Fulong configs
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree
2012-09-07
Maciej W
.
Rozycki
MIPS/user: F
i
x reset CPU
s
tate initializa
t
ion
Signed-off-by: Maciej W. Rozycki <
macro@codesourcery.com
>
commit
|
commitdiff
|
tree