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target/alpha: Tidy helper_fp_exc_raise_s
2019-09-26 Richard Hendersontarget/alpha: Tidy helper_fp_exc_raise_s
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190921043256.4575-8-richard.henderson@linaro.org>
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2019-09-26 Richard Hendersontarget/alpha: Mask IOV exception with INV for user...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190921043256.4575-7-richard.henderson@linaro.org>
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2019-09-26 Richard Hendersontarget/alpha: Write to fpcr_flush_to_zero once
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190921043256.4575-6-richard.henderson@linaro.org>
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2019-09-26 Richard Hendersontarget/alpha: Handle SWCR_MAP_DMZ earlier
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190921043256.4575-5-richard.henderson@linaro.org>
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2019-09-26 Richard Hendersontarget/alpha: Fix SWCR_TRAP_ENABLE_MASK
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190921043256.4575-4-richard.henderson@linaro.org>
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2019-09-26 Richard Hendersontarget/alpha: Fix SWCR_MAP_UMZ
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190921043256.4575-3-richard.henderson@linaro.org>
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2019-09-26 Richard Hendersontarget/alpha: Use array for FPCR_DYN conversion
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190921043256.4575-2-richard.henderson@linaro.org>
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2019-09-11 Richard Hendersonlinux-user/arm: Adjust MAX_RESERVED_VA for M-profile
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190822185929.16891-3-richard.henderson@linaro.org>
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2019-09-11 Richard Hendersonlinux-user: Pass CPUState to MAX_RESERVED_VA
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190822185929.16891-2-richard.henderson@linaro.org>
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2019-09-10 Richard Hendersonlinux-user: Add AT_HWCAP2 for aarch64-linux-user
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...Id: <20190809171156.3476-1-richard.henderson@linaro.org>
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2019-09-05 Richard Hendersontarget/arm: Inline gen_bx_im into callers
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-70-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Clean up disas_thumb_insn
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-69-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, long branches
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-68-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, Unconditional branch
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-67-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, load (literal)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-66-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, shift immediate
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-65-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, Miscellaneous 16-bit instructions
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-64-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, Conditional branches, Supervisor...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-63-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, push and pop
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-62-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Split gen_nop_hint
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-61-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, nop hints
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-60-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, Reverse bytes
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-59-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, Change processor state
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-58-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16, extract
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-57-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 adjust sp (immediate)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-56-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 add, compare, move (two high...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-55-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 branch and exchange
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-54-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 one low register and immediate
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-53-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 add/sub (3 low, 2 low and imm)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-52-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 load/store multiple
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-51-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 add pc/sp (immediate)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-50-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 load/store (immediate offset)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-49-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 load/store (register offset)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-48-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T16 data-processing (two low regs)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-47-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Add skeleton for T16 decodetree
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-46-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Simplify disas_arm_insn
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-45-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Simplify disas_thumb2_insn
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-44-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert TT
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-43-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert SG
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-42-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Table Branch
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-41-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Unallocated memory hint
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-40-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert PLI, PLD, PLDW
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-39-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert SETEND
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-38-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert CPS (privileged)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-37-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Clear-Exclusive, Barriers
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-36-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert RFE and SRS
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-35-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert SVC
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-34-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert B, BL, BLX (immediate)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-33-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Diagnose base == pc for LDM/STM
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-32-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Diagnose too few registers in list for...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-31-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Diagnose writeback register in list for...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-30-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert LDM, STM
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-29-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert MOVW, MOVT
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-28-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Signed multiply, signed and unsigned...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-27-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert packing, unpacking, saturation...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-26-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Parallel addition and subtraction
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-25-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert USAD8, USADA8, SBFX, UBFX, BFC...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-24-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Diagnose UNPREDICTABLE ldrex/strex cases
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-23-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Synchronization primitives
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-22-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert load/store (register, immediate...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-21-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert T32 ADDW/SUBW
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-20-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert the rest of A32 Miscelaneous instructions
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-19-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert ERET
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-18-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert CLZ
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-17-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert BX, BXJ, BLX (register)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-16-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Cyclic Redundancy Check
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-15-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert MRS/MSR (banked, register)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-14-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert MSR (immediate) and hints
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-13-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Simplify op_smlawx for SMLAW*
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-12-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Simplify op_smlaxxx for SMLAL*
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-11-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Halfword multiply and multiply...
...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-10-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Saturating addition and subtraction
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-9-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Simplify UMAAL
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-8-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert multiply and multiply accumulate
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-7-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Data Processing (immediate)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-6-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Data Processing (reg-shifted-reg)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-5-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Convert Data Processing (register)
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-4-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Add stubs for aa32 decodetree
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-3-richard.henderson@linaro.org
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2019-09-05 Richard Hendersontarget/arm: Use store_reg_from_load in thumb2 code
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190904193059.26202-2-richard.henderson@linaro.org
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2019-09-04 Richard Hendersontarget/openrisc: Update cpu "any" to v1.3
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Implement l.adrp
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Implement move to/from FPCSR
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Implement unordered fp comparisons
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Add support for ORFPX64A32
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Check CPUCFG_OF32S for float insns
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Fix lf.ftoi.s
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Add VR2 and AVR special processor...
...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to...
...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Make VR and PPC read-only
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Cache R0 in DisasContext
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Replace cpu register array with a...
...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-04 Richard Hendersontarget/openrisc: Add DisasContext parameter to check_r0_write
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-03 Richard Hendersoncputlb: Handle watchpoints via TLB_WATCHPOINT
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-03 Richard Hendersoncputlb: Remove double-alignment in store_helper
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-03 Richard Hendersoncputlb: Fix size operand for tlb_fill on unaligned...
...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-03 Richard Hendersonexec: Factor out cpu_watchpoint_address_matches
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-03 Richard Hendersoncputlb: Fold TLB_RECHECK into TLB_INVALID_MASK
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-03 Richard Hendersonexec: Move user-only watchpoint stubs inline
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
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2019-09-03 Richard Hendersontarget/arm: Fix SMMLS argument order
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190829013258.16102-1-richard.henderson@linaro.org
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2019-09-03 Richard Hendersontarget/arm: Factor out unallocated_encoding for aarch32
 ...off-by: Richard Henderson <richard.henderson@linaro.org>
...id: 20190826151536.6771-3-richard.henderson@linaro.org
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AR7 emulation for QEMU