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Merge tag 'nvme-next-pull-request' of git://git.infradead.org/qemu-nvme into staging
2022-07-15 Peter MaydellMerge tag 'nvme-next-pull-request' of git://git.infradead...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-15 Peter MaydellMerge tag 'pull-aspeed-20220714' of https://github...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-14 Peter MaydellMerge tag 'for-upstream' of https://gitlab.com/bonzini...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-14 Peter MaydellMerge tag 'qga-win32-pull-2022-07-13' of github.com...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-14 Peter MaydellMerge tag 'darwin-20220712' of https://github.com/philmd...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-13 Peter MaydellMerge tag 'mips-20220712' of https://github.com/philmd...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-12 Peter MaydellMerge tag 'pull-block-2022-07-12' of https://gitlab...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-12 Peter MaydellMerge tag 'for-upstream' of https://gitlab.com/bonzini...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-07 Peter Maydelltarget/arm: Fix qemu-system-arm handling of LPAE block...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220627134620.3190252-1-peter.maydell@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-07 Peter Maydelltarget/arm: Correctly implement Feat_DoubleLock
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-07-07 Peter Maydelltarget/arm: Implement AArch32 DBGDEVID, DBGDEVID1,...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220630194116.3438513-5-peter.maydell@linaro.org
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2022-07-07 Peter Maydelltarget/arm: Suppress debug exceptions when OS Lock set
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220630194116.3438513-4-peter.maydell@linaro.org
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2022-07-07 Peter Maydelltarget/arm: Move define_debug_regs() to debug_helper.c
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220630194116.3438513-3-peter.maydell@linaro.org
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2022-07-07 Peter Maydelltarget/arm: Fix code style issues in debug helper functions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220630194116.3438513-2-peter.maydell@linaro.org
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2022-06-11 Peter Maydellhw/block/fdc-sysbus: Always mark sysbus floppy controllers...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20220505101842.2757905-1-peter.maydell@linaro.org>
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2022-06-10 Peter Maydellsemihosting/config: Merge --semihosting-config option...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220526190053.521505-3-peter.maydell@linaro.org
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2022-06-10 Peter Maydellgdbstub: Don't use GDB syscalls if no GDB is attached
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220526190053.521505-2-peter.maydell@linaro.org
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2022-06-08 Peter MaydellFix 'writeable' typos
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220505095015.2714666-1-peter.maydell@linaro.org
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2022-06-08 Peter Maydelltarget/arm: Implement FEAT_DoubleFault
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220531151431.949322-1-peter.maydell@linaro.org
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2022-06-08 Peter Maydelltarget/arm: Declare support for FEAT_RASv1p1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220531114258.855804-1-peter.maydell@linaro.org
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2022-06-01 Peter Maydellhw/tpm/tpm_tis_common.c: Assert that locty is in range
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2022-05-30 Peter Maydelldocs/system/arm: Add FEAT_HCX to list of emulated features
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220520084320.424166-1-peter.maydell@linaro.org
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2022-05-19 Peter Maydellptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACY
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220516103058.162280-1-peter.maydell@linaro.org
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2022-05-19 Peter Maydellhw/arm/virt: Drop #size-cells and #address-cells from...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220513131316.4081539-3-peter.maydell@linaro.org
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2022-05-19 Peter Maydellhw/arm/virt: Fix incorrect non-secure flash dtb node...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220513131316.4081539-2-peter.maydell@linaro.org
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2022-05-19 Peter Maydelltarget/arm: Make number of counters in PMCR follow...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220513122852.4063586-1-peter.maydell@linaro.org
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2022-05-19 Peter Maydelltarget/arm/helper.c: Delete stray obsolete comment
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220513131801.4082712-1-peter.maydell@linaro.org
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2022-05-19 Peter Maydellhw/intc/arm_gicv3: Provide ich_num_aprs()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220512151457.3899052-7-peter.maydell@linaro.org
...id: 20220506162129.2896966-6-peter.maydell@linaro.org
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2022-05-19 Peter Maydellhw/intc/arm_gicv3: Use correct number of priority bits...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220512151457.3899052-6-peter.maydell@linaro.org
...id: 20220506162129.2896966-5-peter.maydell@linaro.org
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2022-05-19 Peter Maydellhw/intc/arm_gicv3: Support configurable number of physical...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220512151457.3899052-5-peter.maydell@linaro.org
...id: 20220506162129.2896966-4-peter.maydell@linaro.org
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2022-05-19 Peter Maydellhw/intc/arm_gicv3_kvm.c: Stop using GIC_MIN_BPR constant
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220512151457.3899052-4-peter.maydell@linaro.org
...id: 20220506162129.2896966-3-peter.maydell@linaro.org
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2022-05-19 Peter Maydellhw/intc/arm_gicv3: report correct PRIbits field in...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220512151457.3899052-3-peter.maydell@linaro.org
...id: 20220506162129.2896966-2-peter.maydell@linaro.org
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2022-05-19 Peter Maydellhw/intc/arm_gicv3_cpuif: Handle CPUs that don't specify...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220512151457.3899052-2-peter.maydell@linaro.org
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2022-05-19 Peter Maydelltarget/arm: Drop unsupported_encoding() macro
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220509160443.3561604-1-peter.maydell@linaro.org
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2022-05-19 Peter Maydelltarget/arm: Implement FEAT_IDST
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220509155457.3560724-1-peter.maydell@linaro.org
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2022-05-19 Peter Maydelltarget/arm: Enable FEAT_S2FWB for -cpu max
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220505183950.2781801-5-peter.maydell@linaro.org
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2022-05-19 Peter Maydelltarget/arm: Implement FEAT_S2FWB
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220505183950.2781801-4-peter.maydell@linaro.org
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2022-05-19 Peter Maydelltarget/arm: Factor out FWB=0 specific part of combine_cachea...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220505183950.2781801-3-peter.maydell@linaro.org
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2022-05-19 Peter Maydelltarget/arm: Postpone interpretation of stage 2 descriptor...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220505183950.2781801-2-peter.maydell@linaro.org
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2022-04-28 Peter Maydellhw/arm/smmuv3: Advertise support for SMMUv3.2-BBML2
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220426160422.2353158-4-peter.maydell@linaro.org
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2022-04-28 Peter Maydelltarget/arm: Advertise support for FEAT_BBM level 2
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220426160422.2353158-3-peter.maydell@linaro.org
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2022-04-28 Peter Maydelltarget/arm: Advertise support for FEAT_TTL
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220426160422.2353158-2-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/arm/virt: Support TCG GICv4
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-42-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/arm/virt: Abstract out calculation of redistributor...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-41-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/arm/virt: Use VIRT_GIC_VERSION_* enum values in...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-40-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3: Allow 'revision' property to be...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-39-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3: Update ID and feature registers...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-38-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-37-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-36-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-35-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Use set_pending_table_bit...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-34-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-33-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-32-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Factor out "update bit in...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-31-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-30-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Factor out "update hpplpi...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-29-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_redist: Factor out "update hpplpi...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-28-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_cpuif: Don't recalculate maintenance...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-27-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_cpuif: Support vLPIs
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-26-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-25-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3: Implement new GICv4 redistributor...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-24-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3: Implement GICv4's new redistributor...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-23-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement VINVALL
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-22-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement VMOVI
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-21-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement INV for virtual interrupts
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-20-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement INV command properly
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-19-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement VSYNC
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-18-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement VMOVP
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-17-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3: Keep pointers to every connected ITS
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-16-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Handle virtual interrupts in...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-15-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Split out process_its_cmd()...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-14-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Factor out CTE lookup sequence
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-13-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Factor out "find ITE given devid...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-12-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Distinguish success and error...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-11-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement VMAPP
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-10-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-9-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-8-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Factor out "is intid a valid...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-7-peter.maydell@linaro.org
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2022-04-22 Peter Maydelltarget/arm/cpu.c: ignore VIRQ and VFIQ if no EL2
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-6-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3: Report correct PIDR0 values for...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-5-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3: Insist that redist region capacity...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-4-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3: Sanity-check num-cpu property
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-3-peter.maydell@linaro.org
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2022-04-22 Peter Maydellhw/intc/arm_gicv3_its: Add missing blank line
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220408141550.1271295-2-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Drop Exynos4210Irq struct
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-19-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Put combiners into state struct
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-18-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Fold combiner splits into exynos4210_init...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-17-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Don't connect multiple lines to...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-16-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Connect MCT_G0 and MCT_G1 to both...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-15-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Fill in irq_table[] for internal...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-14-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_boa...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-13-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Delete unused macro definitions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-12-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Move exynos4210_combiner_get_gpioin...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-11-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-10-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Put external GIC into state struct
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-9-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Move exynos4210_init_board_irqs...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-8-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Fix code style nit in combiner_grp_to_gic...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-7-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Coalesce board_irqs and irq_table
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-6-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-5-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/arm/exynos4210: Put a9mpcore device into state struct
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-4-peter.maydell@linaro.org
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2022-04-21 Peter Maydellhw/intc/exynos4210_gic: Remove unused TYPE_EXYNOS4210_IRQ_GATE
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20220404154658.565020-3-peter.maydell@linaro.org
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AR7 emulation for QEMU