2015-09-15 |
Richard Henderson | target-tilegx: Handle atomic instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle mtspr, mfspr Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle v1cmpeq, v1cmpne Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle mask instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle scalar multiply instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle conditional move instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle shift instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle bitfield instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Implement system and memory management... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle comparison instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle conditional branch instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle unconditional jump instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle post-increment load and store... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle basic load and store instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle most bit manipulation instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-arm: Use new revbit functions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | host-utils: Add revbit functions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle arithmetic instructions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Handle simple logical operations Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Generate SEGV properly Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Framework for decoding bundles Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1 Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-15 |
Richard Henderson | target-tilegx: Modify _SPECIAL_ opcodes Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-14 |
Richard Henderson | target-arm: Use tcg_gen_extrh_i64_i32 Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-12-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Recognize ROR Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-11-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Eliminate unnecessary zero-extend in disas_bitfield Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-10-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Recognize UXTB, UXTH, LSR, LSL Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-9-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Recognize SXTB, SXTH, SXTW, ASR Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-8-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Implement fcsel with movcond Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-7-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Implement ccmp branchless Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-6-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Use setcond and movcond for csel Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-5-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Handle always condition codes within arm_test_cc Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-4-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Introduce DisasCompare Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-3-git-send-email-rth@twiddle.net
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2015-09-14 |
Richard Henderson | target-arm: Share all common TCG temporaries Signed-off-by: Richard Henderson <rth@twiddle.net> ...1441909103-24666-2-git-send-email-rth@twiddle.net
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2015-09-08 |
Richard Henderson | target-microblaze: Use setcond for pcmp* Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-08 |
Richard Henderson | target-cris: Use movcond and setcond Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-09-02 |
Richard Henderson | tcg/aarch64: Fix tcg_out_qemu_{ld, st} for guest_base... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-24 |
Richard Henderson | tcg/aarch64: Use softmmu fast path for unaligned accesses Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-24 |
Richard Henderson | tcg/s390: Use softmmu fast path for unaligned accesses Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-24 |
Richard Henderson | tcg: Remove tcg_gen_trunc_i64_i32 Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-24 |
Richard Henderson | tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32 Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-18 |
Richard Henderson | target-alpha: Inline hw_ret Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-18 |
Richard Henderson | target-alpha: Inline call_pal Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-18 |
Richard Henderson | target-alpha: Use separate TCGv temporaries for the... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-18 |
Richard Henderson | target-alpha: Special case cmpbge with zero Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-17 |
Richard Henderson | target-alpha: Rewrite helper_cmpbge using bit tests Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-13 |
Richard Henderson | target-mips: Use CPU_LOG_INT for logging related to... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-08-04 |
Richard Henderson | target-mips: Copy restrictions from ext/ins to dext... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-07-30 |
Richard Henderson | bsd-user: Fix operand to cpu_x86_exec Signed-off-by: Richard Henderson <rth@twiddle.net> ...1438195252-21968-1-git-send-email-rth@twiddle.net
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2015-07-24 |
Richard Henderson | tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-07-23 |
Richard Henderson | tcg/i386: Extend addresses for 32-bit guests Signed-off-by: Richard Henderson <rth@twiddle.net> ...1437081950-7206-2-git-send-email-rth@twiddle.net>
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2015-06-12 |
Richard Henderson | linux-user: Add HWCAP for SH4 Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-06-12 |
Richard Henderson | linux-user: Default sh4 to sh7785 Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-06-09 |
Richard Henderson | tcg: Handle MO_AMASK in tcg_dump_ops Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-06-09 |
Richard Henderson | tcg: Mask TCGMemOp appropriately for indexing Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-21 |
Richard Henderson | target-alpha: Add vector implementation for CMPBGE Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-21 |
Richard Henderson | target-alpha: Rewrite helper_zapnot Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Raise IOV from CVTQL Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Suppress underflow from CVTTQ if DNZ Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Raise EXC_M_INV properly for fp inputs Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Disallow literal operand to 1C.30 to... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Implement WH64EN Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Fix integer overflow checking insns Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Fix cvttq vs inf Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Fix cvttq vs large integers Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Raise IOV from CVTTQ Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Set EXC_M_SWC for exceptions from /S... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Set fpcr_exc_status even for disabled... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Tidy FPCR representation Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Set PC correctly for floating-point exceptions Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Forget installed round mode after MT_FPCR Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Rename floating-point subroutines Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-18 |
Richard Henderson | target-alpha: Move VAX helpers to a new file Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-14 |
Richard Henderson | tcg: Add MO_ALIGN, MO_UNALN Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-14 |
Richard Henderson | tcg: Push merged memop+mmu_idx parameter to softmmu... Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-05-14 |
Richard Henderson | tcg: Merge memop and mmu_idx parameters to qemu_ld/st Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-03-16 |
Richard Henderson | tcg/optimize: Handle or r,a,a with constant a Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-03-13 |
Richard Henderson | tcg: Complete handling of ALWAYS and NEVER Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-03-13 |
Richard Henderson | tcg: Use tcg_malloc to allocate TCGLabel Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-03-13 |
Richard Henderson | tcg: Change generator-side labels to a pointer Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-03-13 |
Richard Henderson | tcg: Change translator-side labels to a pointer Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-03-13 |
Richard Henderson | tcg-ia64: Use tcg_malloc to allocate TCGLabelQemuLdst Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-03-13 |
Richard Henderson | tcg: Use tcg_malloc to allocate TCGLabelQemuLdst Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-13 |
Richard Henderson | tcg: Remove unused opcodes Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-13 |
Richard Henderson | tcg: Implement insert_op_before Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-13 |
Richard Henderson | tcg: Remove opcodes instead of noping them out Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-13 |
Richard Henderson | tcg: Put opcodes in a linked list Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-13 |
Richard Henderson | tcg: Introduce tcg_op_buf_count and tcg_op_buf_full Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-13 |
Richard Henderson | tcg: Move emit of INDEX_op_end into gen_tb_end Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-13 |
Richard Henderson | tcg: Reduce ifdefs in tcg-op.c Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-13 |
Richard Henderson | tcg: Move some opcode generation functions out of line Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-03 |
Richard Henderson | target-s390: Implement ECAG Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-03 |
Richard Henderson | target-s390: Implement LURA, LURAG, STURG Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-03 |
Richard Henderson | target-s390: Fix STURA Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-03 |
Richard Henderson | target-s390: Fix STIDP Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-03 |
Richard Henderson | target-s390: Implement EPSW Signed-off-by: Richard Henderson <rth@twiddle.net>
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2015-02-03 |
Richard Henderson | target-s390: Implement SAM specification exception Signed-off-by: Richard Henderson <rth@twiddle.net>
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2014-09-29 |
Richard Henderson | tcg: Always enable TCGv type checking Signed-off-by: Richard Henderson <rth@twiddle.net>
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2014-09-29 |
Richard Henderson | qemu/compiler: Define QEMU_ARTIFICIAL Signed-off-by: Richard Henderson <rth@twiddle.net>
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2014-09-29 |
Richard Henderson | tcg-aarch64: Use 32-bit loads for qemu_ld_i32 Signed-off-by: Richard Henderson <rth@twiddle.net>
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