target-arm: Share all common TCG temporaries
commit78bcaa3e37afbd0c5316634f917c13487384b6ca
authorRichard Henderson <rth@twiddle.net>
Mon, 14 Sep 2015 13:39:47 +0000 (14 14:39 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 14 Sep 2015 13:39:47 +0000 (14 14:39 +0100)
tree5aafa1f48d4eaf72649480621fdbe52cd04ff76a
parent24cfc8dc583db57303137fd41f9f42806ea315a0
target-arm: Share all common TCG temporaries

This is a bug fix for aarch64.  At present, we have branches using
the 32-bit (translate.c) versions of cpu_[NZCV]F, but we set the flags
using the 64-bit (translate-a64.c) versions of cpu_[NZCV]F.  From
the view of the TCG code generator, these are unrelated variables.

The bug is hard to see because we currently only read these variables
from branches, and upon reaching a branch TCG will first spill live
variables and then reload the arguments of the branch.  Since the
32-bit versions were never live until reaching the branch, we'd re-read
the data that had just been spilled from the 64-bit versions.

There is currently no such problem with the cpu_exclusive_* variables,
but there's no point in tempting fate.

Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-2-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm/translate-a64.c
target-arm/translate.c
target-arm/translate.h