| commit | f00faf130d5dcf64b04f71a95f14745845ca1014 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Fri, 26 Jun 2020 03:31:01 +0000 (25 20:31 -0700) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 26 Jun 2020 13:31:12 +0000 (26 14:31 +0100) | ||
| tree | 94558c1bfe86581339b89c71e67de50cc1d6cba6 | treesnapshot (tar.gz zip) |
| parent | 252e8c69669599b4bcff802df300726300292f47 | commitdiff |
target/arm: Add support for MTE to SCTLR_ELx
This does not attempt to rectify all of the res0 bits, but does
clear the mte bits when not enabled. Since there is no high-part
mapping of SCTLR, aa32 mode cannot write to these bits.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This does not attempt to rectify all of the res0 bits, but does
clear the mte bits when not enabled. Since there is no high-part
mapping of SCTLR, aa32 mode cannot write to these bits.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/helper.c | diffblobblamehistory |