| commit | cdfd14e86ab0b1ca29a702d13a8e4af2e902a9bf | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 11 Jun 2019 15:39:51 +0000 (11 16:39 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 13 Jun 2019 14:14:06 +0000 (13 15:14 +0100) | ||
| tree | 3314c60de44742421a68119e0328ac2e4b1cafef | treesnapshot (tar.gz zip) |
| parent | b623d803dda805f07aadcbf098961fde27315c19 | commitdiff |
target/arm: Convert the VCVT-to-f16 insns to decodetree
Convert the VCVTT and VCVTB instructions which convert from
f32 and f64 to f16 to decodetree.
Since we're no longer constrained to the old decoder's style
using cpu_F0s and cpu_F0d we can perform a direct 16 bit
store of the right half of the input single-precision register
rather than doing a load/modify/store sequence on the full
32 bits.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Convert the VCVTT and VCVTB instructions which convert from
f32 and f64 to f16 to decodetree.
Since we're no longer constrained to the old decoder's style
using cpu_F0s and cpu_F0d we can perform a direct 16 bit
store of the right half of the input single-precision register
rather than doing a load/modify/store sequence on the full
32 bits.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| target/arm/translate-vfp.inc.c | diffblobblamehistory | |
| target/arm/translate.c | diffblobblamehistory | |
| target/arm/vfp.decode | diffblobblamehistory |