target/arm: Convert the VCVT-from-f16 insns to decodetree
commitb623d803dda805f07aadcbf098961fde27315c19
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 11 Jun 2019 15:39:51 +0000 (11 16:39 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 13 Jun 2019 14:14:06 +0000 (13 15:14 +0100)
tree0d265674ab44439f5b0a48acf0af224201e1b596
parent386bba2368842fc74388a3c1651c6c0c0c70adbd
target/arm: Convert the VCVT-from-f16 insns to decodetree

Convert the VCVTT, VCVTB instructions that deal with conversion
from half-precision floats to f32 or 64 to decodetree.

Since we're no longer constrained to the old decoder's style
using cpu_F0s and cpu_F0d we can perform a direct 16 bit
load of the right half of the input single-precision register
rather than loading the full 32 bits and then doing a
separate shift or sign-extension.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
target/arm/translate-vfp.inc.c
target/arm/translate.c
target/arm/vfp.decode