Hexagon (target/hexagon) bit reverse (brev) addressing
commitaf7f1821273c45a6101735023736882ec0399e86
authorTaylor Simpson <tsimpson@quicinc.com>
Fri, 9 Apr 2021 01:07:51 +0000 (8 20:07 -0500)
committerRichard Henderson <richard.henderson@linaro.org>
Sat, 1 May 2021 23:03:10 +0000 (1 16:03 -0700)
tree0f5ae32e25e6b79004412fe5caedc535c5307482
parent46ef47e2a77d1a34996964760b4a0d2b19476f25
Hexagon (target/hexagon) bit reverse (brev) addressing

The following instructions are added
    L2_loadrub_pbr          Rd32 = memub(Rx32++Mu2:brev)
    L2_loadrb_pbr           Rd32 = memb(Rx32++Mu2:brev)
    L2_loadruh_pbr          Rd32 = memuh(Rx32++Mu2:brev)
    L2_loadrh_pbr           Rd32 = memh(Rx32++Mu2:brev)
    L2_loadri_pbr           Rd32 = memw(Rx32++Mu2:brev)
    L2_loadrd_pbr           Rdd32 = memd(Rx32++Mu2:brev)
    S2_storerb_pbr          memb(Rx32++Mu2:brev).=.Rt32
    S2_storerh_pbr          memh(Rx32++Mu2:brev).=.Rt32
    S2_storerf_pbr          memh(Rx32++Mu2:brev).=.Rt.H32
    S2_storeri_pbr          memw(Rx32++Mu2:brev).=.Rt32
    S2_storerd_pbr          memd(Rx32++Mu2:brev).=.Rt32
    S2_storerinew_pbr       memw(Rx32++Mu2:brev).=.Nt8.new
    S2_storerbnew_pbr       memw(Rx32++Mu2:brev).=.Nt8.new
    S2_storerhnew_pbr       memw(Rx32++Mu2:brev).=.Nt8.new

Test cases in tests/tcg/hexagon/brev.c

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-24-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/hexagon/gen_tcg.h
target/hexagon/helper.h
target/hexagon/imported/encode_pp.def
target/hexagon/imported/ldst.idef
target/hexagon/imported/macros.def
target/hexagon/macros.h
target/hexagon/op_helper.c
tests/tcg/hexagon/Makefile.target
tests/tcg/hexagon/brev.c [new file with mode: 0644]