| commit | a46118fc16537a593119e5b316052a98514046bb | |
| author | Andrew Jones <drjones@redhat.com> | |
| Mon, 25 Mar 2019 14:16:47 +0000 (25 14:16 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 25 Mar 2019 14:16:47 +0000 (25 14:16 +0000) | ||
| tree | 36ecb48e61cbb0f79b1684647dfe3f587b95db54 | treesnapshot (tar.gz zip) |
| parent | cbbb3041fe2f57a475cef5d6b0ef836118aad106 | commitdiff |
target/arm: cortex-a7 and cortex-a15 have pmus
cortex-a7 and cortex-a15 have pmus (PMUv2) and they advertise
them in ID_DFR0. Let's allow them to function. This also enables
the pmu cpu property to work with these cpu types, i.e. we can
now do '-cpu cortex-a15,pmu=off' to remove the pmu.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-3-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
cortex-a7 and cortex-a15 have pmus (PMUv2) and they advertise
them in ID_DFR0. Let's allow them to function. This also enables
the pmu cpu property to work with these cpu types, i.e. we can
now do '-cpu cortex-a15,pmu=off' to remove the pmu.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-3-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/cpu.c | diffblobblamehistory |