| commit | cbbb3041fe2f57a475cef5d6b0ef836118aad106 | |
| author | Andrew Jones <drjones@redhat.com> | |
| Mon, 25 Mar 2019 14:16:47 +0000 (25 14:16 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 25 Mar 2019 14:16:47 +0000 (25 14:16 +0000) | ||
| tree | 195c73043388c64d878312bd6ccf5cc95b156e3e | treesnapshot (tar.gz zip) |
| parent | da77e0fad445eda22277c786b7d45cd96b7c3b2a | commitdiff |
target/arm: fix crash on pmu register access
Fix a QEMU NULL derefence that occurs when the guest attempts to
enable PMU counters with a non-v8 cpu model or a v8 cpu model
which has not configured a PMU.
Fixes: 4e7beb0cc0f3 ("target/arm: Add a timer to predict PMU counter overflow")
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-2-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Fix a QEMU NULL derefence that occurs when the guest attempts to
enable PMU counters with a non-v8 cpu model or a v8 cpu model
which has not configured a PMU.
Fixes: 4e7beb0cc0f3 ("target/arm: Add a timer to predict PMU counter overflow")
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-2-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/helper.c | diffblobblamehistory |