| commit | 528dc354b6f3aa82d65141cc60bc0e725e6cae98 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Fri, 14 Feb 2020 19:46:43 +0000 (14 11:46 -0800) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 21 Feb 2020 16:07:00 +0000 (21 16:07 +0000) | ||
| tree | 88291af86625306a9ecca6ff6a5b3ac693222c01 | treesnapshot (tar.gz zip) |
| parent | 33649de62e40df0060a1c514574e4ef25c4e52e1 | commitdiff |
target/arm: Flush high bits of sve register after AdvSIMD INS
Writes to AdvSIMD registers flush the bits above 128.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200214194643.23317-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Writes to AdvSIMD registers flush the bits above 128.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200214194643.23317-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/translate-a64.c | diffblobblamehistory |