| commit | 3d67447fe7c295c7da75399b63e37cf0372509eb | |
| author | Alex Williamson <alex.williamson@redhat.com> | |
| Wed, 12 Dec 2018 19:39:31 +0000 (12 12:39 -0700) | ||
| committer | Michael S. Tsirkin <mst@redhat.com> | |
| Wed, 19 Dec 2018 21:48:16 +0000 (19 16:48 -0500) | ||
| tree | 9b1311c84903e2f84a8052907cfb11aee64e01e3 | treesnapshot (tar.gz zip) |
| parent | ea8cfdb5d19af45f98abe02844c7963dafec6e92 | commitdiff |
pcie: Fill PCIESlot link fields to support higher speeds and widths
Make use of the PCIESlot speed and width fields to update link
information beyond those configured in pcie_cap_v1_fill(). This is
only called for devices supporting a version 2 capability and
automatically skips any non-PCIESlot devices. Only devices with
increased link values generate any visible config space differences.
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Tested-by: Geoffrey McRae <geoff@hostfission.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Make use of the PCIESlot speed and width fields to update link
information beyond those configured in pcie_cap_v1_fill(). This is
only called for devices supporting a version 2 capability and
automatically skips any non-PCIESlot devices. Only devices with
increased link values generate any visible config space differences.
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Tested-by: Geoffrey McRae <geoff@hostfission.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| hw/pci/pcie.c | diffblobblamehistory |