| commit | 39db007eda4310f305fdbc712d59d99284bf11d4 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Thu, 20 Aug 2020 05:48:18 +0000 (19 22:48 -0700) | ||
| committer | Richard Henderson <richard.henderson@linaro.org> | |
| Tue, 1 Sep 2020 14:41:38 +0000 (1 07:41 -0700) | ||
| tree | 5b876a2b976a1a2c82dc045615537b0dcb7d630a | treesnapshot (tar.gz zip) |
| parent | ccf628b7939c542cf9e46e9aaa2b0acf0888ec52 | commitdiff |
target/microblaze: Fix width of EDR
The exception data register is only 32-bits wide. Do not use a
64-bit type to represent it. Since cpu_edr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
The exception data register is only 32-bits wide. Do not use a
64-bit type to represent it. Since cpu_edr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| target/microblaze/cpu.h | diffblobblamehistory | |
| target/microblaze/translate.c | diffblobblamehistory |