hw/ppc/ppc440_bamboo.c

   1 /*
   2  * QEMU PowerPC 440 Bamboo board emulation
   3  *
   4  * Copyright 2007 IBM Corporation.
   5  * Authors:
   6  *      Jerone Young <jyoung5@us.ibm.com>
   7  *      Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
   8  *      Hollis Blanchard <hollisb@us.ibm.com>
   9  *
  10  * This work is licensed under the GNU GPL license version 2 or later.
  11  *
  12  */
  13
  14 #include "qemu/osdep.h"
  15 #include "qemu/error-report.h"
  16 #include "qemu-common.h"
  17 #include "qemu/error-report.h"
  18 #include "net/net.h"
  19 #include "hw/hw.h"
  20 #include "hw/pci/pci.h"
  21 #include "hw/boards.h"
  22 #include "sysemu/kvm.h"
  23 #include "kvm_ppc.h"
  24 #include "sysemu/device_tree.h"
  25 #include "hw/loader.h"
  26 #include "elf.h"
  27 #include "exec/address-spaces.h"
  28 #include "hw/char/serial.h"
  29 #include "hw/ppc/ppc.h"
  30 #include "ppc405.h"
  31 #include "sysemu/sysemu.h"
  32 #include "sysemu/qtest.h"
  33 #include "hw/sysbus.h"
  34
  35 #define BINARY_DEVICE_TREE_FILE "bamboo.dtb"
  36
  37 /* from u-boot */
  38 #define KERNEL_ADDR  0x1000000
  39 #define FDT_ADDR     0x1800000
  40 #define RAMDISK_ADDR 0x1900000
  41
  42 #define PPC440EP_PCI_CONFIG     0xeec00000
  43 #define PPC440EP_PCI_INTACK     0xeed00000
  44 #define PPC440EP_PCI_SPECIAL    0xeed00000
  45 #define PPC440EP_PCI_REGS       0xef400000
  46 #define PPC440EP_PCI_IO         0xe8000000
  47 #define PPC440EP_PCI_IOLEN      0x00010000
  48
  49 #define PPC440EP_SDRAM_NR_BANKS 4
  50
  51 static const unsigned int ppc440ep_sdram_bank_sizes[] = {
  52     256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
  53 };
  54
  55 static hwaddr entry;
  56
  57 static int bamboo_load_device_tree(hwaddr addr,
  58                                      uint32_t ramsize,
  59                                      hwaddr initrd_base,
  60                                      hwaddr initrd_size,
  61                                      const char *kernel_cmdline)
  62 {
  63     int ret = -1;
  64     uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(ramsize) };
  65     char *filename;
  66     int fdt_size;
  67     void *fdt;
  68     uint32_t tb_freq = 400000000;
  69     uint32_t clock_freq = 400000000;
  70
  71     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
  72     if (!filename) {
  73         goto out;
  74     }
  75     fdt = load_device_tree(filename, &fdt_size);
  76     g_free(filename);
  77     if (fdt == NULL) {
  78         goto out;
  79     }
  80
  81     /* Manipulate device tree in memory. */
  82
  83     ret = qemu_fdt_setprop(fdt, "/memory", "reg", mem_reg_property,
  84                            sizeof(mem_reg_property));
  85     if (ret < 0)
  86         fprintf(stderr, "couldn't set /memory/reg\n");
  87
  88     ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
  89                                 initrd_base);
  90     if (ret < 0)
  91         fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
  92
  93     ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
  94                                 (initrd_base + initrd_size));
  95     if (ret < 0)
  96         fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
  97
  98     ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
  99                                   kernel_cmdline);
 100     if (ret < 0)
 101         fprintf(stderr, "couldn't set /chosen/bootargs\n");
 102
 103     /* Copy data from the host device tree into the guest. Since the guest can
 104      * directly access the timebase without host involvement, we must expose
 105      * the correct frequencies. */
 106     if (kvm_enabled()) {
 107         tb_freq = kvmppc_get_tbfreq();
 108         clock_freq = kvmppc_get_clockfreq();
 109     }
 110
 111     qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "clock-frequency",
 112                           clock_freq);
 113     qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency",
 114                           tb_freq);
 115
 116     rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
 117     g_free(fdt);
 118     return 0;
 119
 120 out:
 121
 122     return ret;
 123 }
 124
 125 /* Create reset TLB entries for BookE, spanning the 32bit addr space.  */
 126 static void mmubooke_create_initial_mapping(CPUPPCState *env,
 127                                      target_ulong va,
 128                                      hwaddr pa)
 129 {
 130     ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
 131
 132     tlb->attr = 0;
 133     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
 134     tlb->size = 1U << 31; /* up to 0x80000000  */
 135     tlb->EPN = va & TARGET_PAGE_MASK;
 136     tlb->RPN = pa & TARGET_PAGE_MASK;
 137     tlb->PID = 0;
 138
 139     tlb = &env->tlb.tlbe[1];
 140     tlb->attr = 0;
 141     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
 142     tlb->size = 1U << 31; /* up to 0xffffffff  */
 143     tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
 144     tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
 145     tlb->PID = 0;
 146 }
 147
 148 static void main_cpu_reset(void *opaque)
 149 {
 150     PowerPCCPU *cpu = opaque;
 151     CPUPPCState *env = &cpu->env;
 152
 153     cpu_reset(CPU(cpu));
 154     env->gpr[1] = (16<<20) - 8;
 155     env->gpr[3] = FDT_ADDR;
 156     env->nip = entry;
 157
 158     /* Create a mapping for the kernel.  */
 159     mmubooke_create_initial_mapping(env, 0, 0);
 160 }
 161
 162 static void bamboo_init(MachineState *machine)
 163 {
 164     ram_addr_t ram_size = machine->ram_size;
 165     const char *kernel_filename = machine->kernel_filename;
 166     const char *kernel_cmdline = machine->kernel_cmdline;
 167     const char *initrd_filename = machine->initrd_filename;
 168     unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 };
 169     MemoryRegion *address_space_mem = get_system_memory();
 170     MemoryRegion *isa = g_new(MemoryRegion, 1);
 171     MemoryRegion *ram_memories
 172         = g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories));
 173     hwaddr ram_bases[PPC440EP_SDRAM_NR_BANKS];
 174     hwaddr ram_sizes[PPC440EP_SDRAM_NR_BANKS];
 175     qemu_irq *pic;
 176     qemu_irq *irqs;
 177     PCIBus *pcibus;
 178     PowerPCCPU *cpu;
 179     CPUPPCState *env;
 180     uint64_t elf_entry;
 181     uint64_t elf_lowaddr;
 182     hwaddr loadaddr = 0;
 183     target_long initrd_size = 0;
 184     DeviceState *dev;
 185     int success;
 186     int i;
 187
 188     cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
 189     env = &cpu->env;
 190
 191     if (env->mmu_model != POWERPC_MMU_BOOKE) {
 192         error_report("MMU model %i not supported by this machine",
 193                      env->mmu_model);
 194         exit(1);
 195     }
 196
 197 #ifdef TARGET_PPCEMB
 198     if (!qtest_enabled()) {
 199         warn_report("qemu-system-ppcemb is deprecated, "
 200                     "please use qemu-system-ppc instead.");
 201     }
 202 #endif
 203
 204     qemu_register_reset(main_cpu_reset, cpu);
 205     ppc_booke_timers_init(cpu, 400000000, 0);
 206     ppc_dcr_init(env, NULL, NULL);
 207
 208     /* interrupt controller */
 209     irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
 210     irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
 211     irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
 212     pic = ppcuic_init(env, irqs, 0x0C0, 0, 1);
 213
 214     /* SDRAM controller */
 215     memset(ram_bases, 0, sizeof(ram_bases));
 216     memset(ram_sizes, 0, sizeof(ram_sizes));
 217     ram_size = ppc4xx_sdram_adjust(ram_size, PPC440EP_SDRAM_NR_BANKS,
 218                                    ram_memories,
 219                                    ram_bases, ram_sizes,
 220                                    ppc440ep_sdram_bank_sizes);
 221     /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */
 222     ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_memories,
 223                       ram_bases, ram_sizes, 1);
 224
 225     /* PCI */
 226     dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST_BRIDGE,
 227                                 PPC440EP_PCI_CONFIG,
 228                                 pic[pci_irq_nrs[0]], pic[pci_irq_nrs[1]],
 229                                 pic[pci_irq_nrs[2]], pic[pci_irq_nrs[3]],
 230                                 NULL);
 231     pcibus = (PCIBus *)qdev_get_child_bus(dev, "pci.0");
 232     if (!pcibus) {
 233         error_report("couldn't create PCI controller");
 234         exit(1);
 235     }
 236
 237     memory_region_init_alias(isa, NULL, "isa_mmio",
 238                              get_system_io(), 0, PPC440EP_PCI_IOLEN);
 239     memory_region_add_subregion(get_system_memory(), PPC440EP_PCI_IO, isa);
 240
 241     if (serial_hds[0] != NULL) {
 242         serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
 243                        PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
 244                        DEVICE_BIG_ENDIAN);
 245     }
 246     if (serial_hds[1] != NULL) {
 247         serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
 248                        PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
 249                        DEVICE_BIG_ENDIAN);
 250     }
 251
 252     if (pcibus) {
 253         /* Register network interfaces. */
 254         for (i = 0; i < nb_nics; i++) {
 255             /* There are no PCI NICs on the Bamboo board, but there are
 256              * PCI slots, so we can pick whatever default model we want. */
 257             pci_nic_init_nofail(&nd_table[i], pcibus, "e1000", NULL);
 258         }
 259     }
 260
 261     /* Load kernel. */
 262     if (kernel_filename) {
 263         success = load_uimage(kernel_filename, &entry, &loadaddr, NULL,
 264                               NULL, NULL);
 265         if (success < 0) {
 266             success = load_elf(kernel_filename, NULL, NULL, &elf_entry,
 267                                &elf_lowaddr, NULL, 1, PPC_ELF_MACHINE,
 268                                0, 0);
 269             entry = elf_entry;
 270             loadaddr = elf_lowaddr;
 271         }
 272         /* XXX try again as binary */
 273         if (success < 0) {
 274             error_report("could not load kernel '%s'", kernel_filename);
 275             exit(1);
 276         }
 277     }
 278
 279     /* Load initrd. */
 280     if (initrd_filename) {
 281         initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR,
 282                                           ram_size - RAMDISK_ADDR);
 283
 284         if (initrd_size < 0) {
 285             error_report("could not load ram disk '%s' at %x",
 286                          initrd_filename, RAMDISK_ADDR);
 287             exit(1);
 288         }
 289     }
 290
 291     /* If we're loading a kernel directly, we must load the device tree too. */
 292     if (kernel_filename) {
 293         if (bamboo_load_device_tree(FDT_ADDR, ram_size, RAMDISK_ADDR,
 294                                     initrd_size, kernel_cmdline) < 0) {
 295             error_report("couldn't load device tree");
 296             exit(1);
 297         }
 298     }
 299 }
 300
 301 static void bamboo_machine_init(MachineClass *mc)
 302 {
 303     mc->desc = "bamboo";
 304     mc->init = bamboo_init;
 305     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440epb");
 306 }
 307
 308 DEFINE_MACHINE("bamboo", bamboo_machine_init)