hw/nvram/spapr_nvram.c

   1 /*
   2  * QEMU sPAPR NVRAM emulation
   3  *
   4  * Copyright (C) 2012 David Gibson, IBM Corporation.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "qapi/error.h"
  27 #include "qemu-common.h"
  28 #include "cpu.h"
  29 #include <libfdt.h>
  30
  31 #include "sysemu/block-backend.h"
  32 #include "sysemu/device_tree.h"
  33 #include "hw/sysbus.h"
  34 #include "hw/nvram/chrp_nvram.h"
  35 #include "hw/ppc/spapr.h"
  36 #include "hw/ppc/spapr_vio.h"
  37
  38 typedef struct sPAPRNVRAM {
  39     VIOsPAPRDevice sdev;
  40     uint32_t size;
  41     uint8_t *buf;
  42     BlockBackend *blk;
  43     VMChangeStateEntry *vmstate;
  44 } sPAPRNVRAM;
  45
  46 #define TYPE_VIO_SPAPR_NVRAM "spapr-nvram"
  47 #define VIO_SPAPR_NVRAM(obj) \
  48      OBJECT_CHECK(sPAPRNVRAM, (obj), TYPE_VIO_SPAPR_NVRAM)
  49
  50 #define MIN_NVRAM_SIZE 8192
  51 #define DEFAULT_NVRAM_SIZE 65536
  52 #define MAX_NVRAM_SIZE 1048576
  53
  54 static void rtas_nvram_fetch(PowerPCCPU *cpu, sPAPRMachineState *spapr,
  55                              uint32_t token, uint32_t nargs,
  56                              target_ulong args,
  57                              uint32_t nret, target_ulong rets)
  58 {
  59     sPAPRNVRAM *nvram = spapr->nvram;
  60     hwaddr offset, buffer, len;
  61     void *membuf;
  62
  63     if ((nargs != 3) || (nret != 2)) {
  64         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
  65         return;
  66     }
  67
  68     if (!nvram) {
  69         rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
  70         rtas_st(rets, 1, 0);
  71         return;
  72     }
  73
  74     offset = rtas_ld(args, 0);
  75     buffer = rtas_ld(args, 1);
  76     len = rtas_ld(args, 2);
  77
  78     if (((offset + len) < offset)
  79         || ((offset + len) > nvram->size)) {
  80         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
  81         rtas_st(rets, 1, 0);
  82         return;
  83     }
  84
  85     assert(nvram->buf);
  86
  87     membuf = cpu_physical_memory_map(buffer, &len, 1);
  88     memcpy(membuf, nvram->buf + offset, len);
  89     cpu_physical_memory_unmap(membuf, len, 1, len);
  90
  91     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
  92     rtas_st(rets, 1, len);
  93 }
  94
  95 static void rtas_nvram_store(PowerPCCPU *cpu, sPAPRMachineState *spapr,
  96                              uint32_t token, uint32_t nargs,
  97                              target_ulong args,
  98                              uint32_t nret, target_ulong rets)
  99 {
 100     sPAPRNVRAM *nvram = spapr->nvram;
 101     hwaddr offset, buffer, len;
 102     int alen;
 103     void *membuf;
 104
 105     if ((nargs != 3) || (nret != 2)) {
 106         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
 107         return;
 108     }
 109
 110     if (!nvram) {
 111         rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
 112         return;
 113     }
 114
 115     offset = rtas_ld(args, 0);
 116     buffer = rtas_ld(args, 1);
 117     len = rtas_ld(args, 2);
 118
 119     if (((offset + len) < offset)
 120         || ((offset + len) > nvram->size)) {
 121         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
 122         return;
 123     }
 124
 125     membuf = cpu_physical_memory_map(buffer, &len, 0);
 126
 127     alen = len;
 128     if (nvram->blk) {
 129         alen = blk_pwrite(nvram->blk, offset, membuf, len, 0);
 130     }
 131
 132     assert(nvram->buf);
 133     memcpy(nvram->buf + offset, membuf, len);
 134
 135     cpu_physical_memory_unmap(membuf, len, 0, len);
 136
 137     rtas_st(rets, 0, (alen < len) ? RTAS_OUT_HW_ERROR : RTAS_OUT_SUCCESS);
 138     rtas_st(rets, 1, (alen < 0) ? 0 : alen);
 139 }
 140
 141 static void spapr_nvram_realize(VIOsPAPRDevice *dev, Error **errp)
 142 {
 143     sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(dev);
 144
 145     if (nvram->blk) {
 146         nvram->size = blk_getlength(nvram->blk);
 147     } else {
 148         nvram->size = DEFAULT_NVRAM_SIZE;
 149     }
 150
 151     nvram->buf = g_malloc0(nvram->size);
 152
 153     if ((nvram->size < MIN_NVRAM_SIZE) || (nvram->size > MAX_NVRAM_SIZE)) {
 154         error_setg(errp, "spapr-nvram must be between %d and %d bytes in size",
 155                    MIN_NVRAM_SIZE, MAX_NVRAM_SIZE);
 156         return;
 157     }
 158
 159     if (nvram->blk) {
 160         int alen = blk_pread(nvram->blk, 0, nvram->buf, nvram->size);
 161
 162         if (alen != nvram->size) {
 163             error_setg(errp, "can't read spapr-nvram contents");
 164             return;
 165         }
 166     } else if (nb_prom_envs > 0) {
 167         /* Create a system partition to pass the -prom-env variables */
 168         chrp_nvram_create_system_partition(nvram->buf, MIN_NVRAM_SIZE / 4);
 169         chrp_nvram_create_free_partition(&nvram->buf[MIN_NVRAM_SIZE / 4],
 170                                          nvram->size - MIN_NVRAM_SIZE / 4);
 171     }
 172
 173     spapr_rtas_register(RTAS_NVRAM_FETCH, "nvram-fetch", rtas_nvram_fetch);
 174     spapr_rtas_register(RTAS_NVRAM_STORE, "nvram-store", rtas_nvram_store);
 175 }
 176
 177 static int spapr_nvram_devnode(VIOsPAPRDevice *dev, void *fdt, int node_off)
 178 {
 179     sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(dev);
 180
 181     return fdt_setprop_cell(fdt, node_off, "#bytes", nvram->size);
 182 }
 183
 184 static int spapr_nvram_pre_load(void *opaque)
 185 {
 186     sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(opaque);
 187
 188     g_free(nvram->buf);
 189     nvram->buf = NULL;
 190     nvram->size = 0;
 191
 192     return 0;
 193 }
 194
 195 static void postload_update_cb(void *opaque, int running, RunState state)
 196 {
 197     sPAPRNVRAM *nvram = opaque;
 198
 199     /* This is called after bdrv_invalidate_cache_all.  */
 200
 201     qemu_del_vm_change_state_handler(nvram->vmstate);
 202     nvram->vmstate = NULL;
 203
 204     blk_pwrite(nvram->blk, 0, nvram->buf, nvram->size, 0);
 205 }
 206
 207 static int spapr_nvram_post_load(void *opaque, int version_id)
 208 {
 209     sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(opaque);
 210
 211     if (nvram->blk) {
 212         nvram->vmstate = qemu_add_vm_change_state_handler(postload_update_cb,
 213                                                           nvram);
 214     }
 215
 216     return 0;
 217 }
 218
 219 static const VMStateDescription vmstate_spapr_nvram = {
 220     .name = "spapr_nvram",
 221     .version_id = 1,
 222     .minimum_version_id = 1,
 223     .pre_load = spapr_nvram_pre_load,
 224     .post_load = spapr_nvram_post_load,
 225     .fields = (VMStateField[]) {
 226         VMSTATE_UINT32(size, sPAPRNVRAM),
 227         VMSTATE_VBUFFER_ALLOC_UINT32(buf, sPAPRNVRAM, 1, NULL, 0, size),
 228         VMSTATE_END_OF_LIST()
 229     },
 230 };
 231
 232 static Property spapr_nvram_properties[] = {
 233     DEFINE_SPAPR_PROPERTIES(sPAPRNVRAM, sdev),
 234     DEFINE_PROP_DRIVE("drive", sPAPRNVRAM, blk),
 235     DEFINE_PROP_END_OF_LIST(),
 236 };
 237
 238 static void spapr_nvram_class_init(ObjectClass *klass, void *data)
 239 {
 240     DeviceClass *dc = DEVICE_CLASS(klass);
 241     VIOsPAPRDeviceClass *k = VIO_SPAPR_DEVICE_CLASS(klass);
 242
 243     k->realize = spapr_nvram_realize;
 244     k->devnode = spapr_nvram_devnode;
 245     k->dt_name = "nvram";
 246     k->dt_type = "nvram";
 247     k->dt_compatible = "qemu,spapr-nvram";
 248     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 249     dc->props = spapr_nvram_properties;
 250     dc->vmsd = &vmstate_spapr_nvram;
 251 }
 252
 253 static const TypeInfo spapr_nvram_type_info = {
 254     .name          = TYPE_VIO_SPAPR_NVRAM,
 255     .parent        = TYPE_VIO_SPAPR_DEVICE,
 256     .instance_size = sizeof(sPAPRNVRAM),
 257     .class_init    = spapr_nvram_class_init,
 258 };
 259
 260 static void spapr_nvram_register_types(void)
 261 {
 262     type_register_static(&spapr_nvram_type_info);
 263 }
 264
 265 type_init(spapr_nvram_register_types)