2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
28 #include "sysemu/numa.h"
30 #include "hw/fw-path-provider.h"
33 #include "sysemu/block-backend.h"
34 #include "sysemu/cpus.h"
35 #include "sysemu/kvm.h"
37 #include "migration/migration.h"
38 #include "mmu-hash64.h"
41 #include "hw/boards.h"
42 #include "hw/ppc/ppc.h"
43 #include "hw/loader.h"
45 #include "hw/ppc/spapr.h"
46 #include "hw/ppc/spapr_vio.h"
47 #include "hw/pci-host/spapr.h"
48 #include "hw/ppc/xics.h"
49 #include "hw/pci/msi.h"
51 #include "hw/pci/pci.h"
52 #include "hw/scsi/scsi.h"
53 #include "hw/virtio/virtio-scsi.h"
55 #include "exec/address-spaces.h"
57 #include "qemu/config-file.h"
58 #include "qemu/error-report.h"
62 #include "hw/compat.h"
66 /* SLOF memory layout:
68 * SLOF raw image loaded at 0, copies its romfs right below the flat
69 * device-tree, then position SLOF itself 31M below that
71 * So we set FW_OVERHEAD to 40MB which should account for all of that
74 * We load our kernel at 4M, leaving space for SLOF initial image
76 #define FDT_MAX_SIZE 0x40000
77 #define RTAS_MAX_SIZE 0x10000
78 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
79 #define FW_MAX_SIZE 0x400000
80 #define FW_FILE_NAME "slof.bin"
81 #define FW_OVERHEAD 0x2800000
82 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
84 #define MIN_RMA_SLOF 128UL
86 #define TIMEBASE_FREQ 512000000ULL
90 #define PHANDLE_XICP 0x00001111
92 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
94 typedef struct sPAPRMachineState sPAPRMachineState
;
96 #define TYPE_SPAPR_MACHINE "spapr-machine"
97 #define SPAPR_MACHINE(obj) \
98 OBJECT_CHECK(sPAPRMachineState, (obj), TYPE_SPAPR_MACHINE)
103 struct sPAPRMachineState
{
105 MachineState parent_obj
;
111 sPAPREnvironment
*spapr
;
113 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
114 int nr_irqs
, Error
**errp
)
119 dev
= qdev_create(NULL
, type
);
120 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
121 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
122 object_property_set_bool(OBJECT(dev
), true, "realized", &err
);
124 error_propagate(errp
, err
);
125 object_unparent(OBJECT(dev
));
128 return XICS_COMMON(dev
);
131 static XICSState
*xics_system_init(MachineState
*machine
,
132 int nr_servers
, int nr_irqs
)
134 XICSState
*icp
= NULL
;
139 if (machine_kernel_irqchip_allowed(machine
)) {
140 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
, &err
);
142 if (machine_kernel_irqchip_required(machine
) && !icp
) {
143 error_report("kernel_irqchip requested but unavailable: %s",
144 error_get_pretty(err
));
149 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
, &error_abort
);
155 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
159 uint32_t servers_prop
[smt_threads
];
160 uint32_t gservers_prop
[smt_threads
* 2];
161 int index
= ppc_get_vcpu_dt_id(cpu
);
163 if (cpu
->cpu_version
) {
164 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
170 /* Build interrupt servers and gservers properties */
171 for (i
= 0; i
< smt_threads
; i
++) {
172 servers_prop
[i
] = cpu_to_be32(index
+ i
);
173 /* Hack, direct the group queues back to cpu 0 */
174 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
175 gservers_prop
[i
*2 + 1] = 0;
177 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
178 servers_prop
, sizeof(servers_prop
));
182 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
183 gservers_prop
, sizeof(gservers_prop
));
188 static int spapr_fixup_cpu_dt(void *fdt
, sPAPREnvironment
*spapr
)
190 int ret
= 0, offset
, cpus_offset
;
193 int smt
= kvmppc_smt_threads();
194 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
197 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
198 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
199 int index
= ppc_get_vcpu_dt_id(cpu
);
200 uint32_t associativity
[] = {cpu_to_be32(0x5),
204 cpu_to_be32(cs
->numa_node
),
207 if ((index
% smt
) != 0) {
211 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
213 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
214 if (cpus_offset
< 0) {
215 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
217 if (cpus_offset
< 0) {
221 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
223 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
229 if (nb_numa_nodes
> 1) {
230 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
231 sizeof(associativity
));
237 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
238 pft_size_prop
, sizeof(pft_size_prop
));
243 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
244 ppc_get_compat_smt_threads(cpu
));
253 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
256 size_t maxcells
= maxsize
/ sizeof(uint32_t);
260 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
261 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
263 if (!sps
->page_shift
) {
266 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
267 if (sps
->enc
[count
].page_shift
== 0) {
271 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
274 *(p
++) = cpu_to_be32(sps
->page_shift
);
275 *(p
++) = cpu_to_be32(sps
->slb_enc
);
276 *(p
++) = cpu_to_be32(count
);
277 for (j
= 0; j
< count
; j
++) {
278 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
279 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
283 return (p
- prop
) * sizeof(uint32_t);
286 static hwaddr
spapr_node0_size(void)
290 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
291 if (numa_info
[i
].node_mem
) {
292 return MIN(pow2floor(numa_info
[i
].node_mem
), ram_size
);
303 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
304 #exp, fdt_strerror(ret)); \
309 static void add_str(GString
*s
, const gchar
*s1
)
311 g_string_append_len(s
, s1
, strlen(s1
) + 1);
314 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
318 const char *kernel_cmdline
,
323 uint32_t start_prop
= cpu_to_be32(initrd_base
);
324 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
325 GString
*hypertas
= g_string_sized_new(256);
326 GString
*qemu_hypertas
= g_string_sized_new(256);
327 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
328 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(smp_cpus
)};
329 int smt
= kvmppc_smt_threads();
330 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
331 QemuOpts
*opts
= qemu_opts_find(qemu_find_opts("smp-opts"), NULL
);
332 unsigned sockets
= opts
? qemu_opt_get_number(opts
, "sockets", 0) : 0;
333 uint32_t cpus_per_socket
= sockets
? (smp_cpus
/ sockets
) : 1;
336 add_str(hypertas
, "hcall-pft");
337 add_str(hypertas
, "hcall-term");
338 add_str(hypertas
, "hcall-dabr");
339 add_str(hypertas
, "hcall-interrupt");
340 add_str(hypertas
, "hcall-tce");
341 add_str(hypertas
, "hcall-vio");
342 add_str(hypertas
, "hcall-splpar");
343 add_str(hypertas
, "hcall-bulk");
344 add_str(hypertas
, "hcall-set-mode");
345 add_str(qemu_hypertas
, "hcall-memop1");
347 fdt
= g_malloc0(FDT_MAX_SIZE
);
348 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
351 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
354 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
356 _FDT((fdt_finish_reservemap(fdt
)));
359 _FDT((fdt_begin_node(fdt
, "")));
360 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
361 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
362 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
365 * Add info to guest to indentify which host is it being run on
366 * and what is the uuid of the guest
368 if (kvmppc_get_host_model(&buf
)) {
369 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
372 if (kvmppc_get_host_serial(&buf
)) {
373 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
377 buf
= g_strdup_printf(UUID_FMT
, qemu_uuid
[0], qemu_uuid
[1],
378 qemu_uuid
[2], qemu_uuid
[3], qemu_uuid
[4],
379 qemu_uuid
[5], qemu_uuid
[6], qemu_uuid
[7],
380 qemu_uuid
[8], qemu_uuid
[9], qemu_uuid
[10],
381 qemu_uuid
[11], qemu_uuid
[12], qemu_uuid
[13],
382 qemu_uuid
[14], qemu_uuid
[15]);
384 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
387 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
388 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
391 _FDT((fdt_begin_node(fdt
, "chosen")));
393 /* Set Form1_affinity */
394 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
396 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
397 _FDT((fdt_property(fdt
, "linux,initrd-start",
398 &start_prop
, sizeof(start_prop
))));
399 _FDT((fdt_property(fdt
, "linux,initrd-end",
400 &end_prop
, sizeof(end_prop
))));
402 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
403 cpu_to_be64(kernel_size
) };
405 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
407 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
411 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
413 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
414 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
415 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
417 _FDT((fdt_end_node(fdt
)));
420 _FDT((fdt_begin_node(fdt
, "cpus")));
422 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
423 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
426 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
427 CPUPPCState
*env
= &cpu
->env
;
428 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
429 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
430 int index
= ppc_get_vcpu_dt_id(cpu
);
432 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
433 0xffffffff, 0xffffffff};
434 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
435 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
436 uint32_t page_sizes_prop
[64];
437 size_t page_sizes_prop_size
;
439 if ((index
% smt
) != 0) {
443 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
445 _FDT((fdt_begin_node(fdt
, nodename
)));
449 _FDT((fdt_property_cell(fdt
, "reg", index
)));
450 _FDT((fdt_property_string(fdt
, "device_type", "cpu")));
452 _FDT((fdt_property_cell(fdt
, "cpu-version", env
->spr
[SPR_PVR
])));
453 _FDT((fdt_property_cell(fdt
, "d-cache-block-size",
454 env
->dcache_line_size
)));
455 _FDT((fdt_property_cell(fdt
, "d-cache-line-size",
456 env
->dcache_line_size
)));
457 _FDT((fdt_property_cell(fdt
, "i-cache-block-size",
458 env
->icache_line_size
)));
459 _FDT((fdt_property_cell(fdt
, "i-cache-line-size",
460 env
->icache_line_size
)));
462 if (pcc
->l1_dcache_size
) {
463 _FDT((fdt_property_cell(fdt
, "d-cache-size", pcc
->l1_dcache_size
)));
465 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
467 if (pcc
->l1_icache_size
) {
468 _FDT((fdt_property_cell(fdt
, "i-cache-size", pcc
->l1_icache_size
)));
470 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
473 _FDT((fdt_property_cell(fdt
, "timebase-frequency", tbfreq
)));
474 _FDT((fdt_property_cell(fdt
, "clock-frequency", cpufreq
)));
475 _FDT((fdt_property_cell(fdt
, "ibm,slb-size", env
->slb_nr
)));
476 _FDT((fdt_property_string(fdt
, "status", "okay")));
477 _FDT((fdt_property(fdt
, "64-bit", NULL
, 0)));
479 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
480 _FDT((fdt_property(fdt
, "ibm,purr", NULL
, 0)));
483 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
484 _FDT((fdt_property(fdt
, "ibm,processor-segment-sizes",
485 segs
, sizeof(segs
))));
488 /* Advertise VMX/VSX (vector extensions) if available
489 * 0 / no property == no vector extensions
490 * 1 == VMX / Altivec available
491 * 2 == VSX available */
492 if (env
->insns_flags
& PPC_ALTIVEC
) {
493 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
495 _FDT((fdt_property_cell(fdt
, "ibm,vmx", vmx
)));
498 /* Advertise DFP (Decimal Floating Point) if available
499 * 0 / no property == no DFP
500 * 1 == DFP available */
501 if (env
->insns_flags2
& PPC2_DFP
) {
502 _FDT((fdt_property_cell(fdt
, "ibm,dfp", 1)));
505 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
506 sizeof(page_sizes_prop
));
507 if (page_sizes_prop_size
) {
508 _FDT((fdt_property(fdt
, "ibm,segment-page-sizes",
509 page_sizes_prop
, page_sizes_prop_size
)));
512 _FDT((fdt_property_cell(fdt
, "ibm,chip-id",
513 cs
->cpu_index
/ cpus_per_socket
)));
515 _FDT((fdt_end_node(fdt
)));
518 _FDT((fdt_end_node(fdt
)));
521 _FDT((fdt_begin_node(fdt
, "rtas")));
523 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
524 add_str(hypertas
, "hcall-multi-tce");
526 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
528 g_string_free(hypertas
, TRUE
);
529 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
530 qemu_hypertas
->len
)));
531 g_string_free(qemu_hypertas
, TRUE
);
533 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
534 refpoints
, sizeof(refpoints
))));
536 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
537 _FDT((fdt_property_cell(fdt
, "rtas-event-scan-rate",
538 RTAS_EVENT_SCAN_RATE
)));
541 * According to PAPR, rtas ibm,os-term does not guarantee a return
542 * back to the guest cpu.
544 * While an additional ibm,extended-os-term property indicates that
545 * rtas call return will always occur. Set this property.
547 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
549 _FDT((fdt_end_node(fdt
)));
551 /* interrupt controller */
552 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
554 _FDT((fdt_property_string(fdt
, "device_type",
555 "PowerPC-External-Interrupt-Presentation")));
556 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
557 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
558 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
559 interrupt_server_ranges_prop
,
560 sizeof(interrupt_server_ranges_prop
))));
561 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
562 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
563 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
565 _FDT((fdt_end_node(fdt
)));
568 _FDT((fdt_begin_node(fdt
, "vdevice")));
570 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
571 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
572 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
573 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
574 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
575 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
577 _FDT((fdt_end_node(fdt
)));
580 spapr_events_fdt_skel(fdt
, epow_irq
);
582 /* /hypervisor node */
584 uint8_t hypercall
[16];
586 /* indicate KVM hypercall interface */
587 _FDT((fdt_begin_node(fdt
, "hypervisor")));
588 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
589 if (kvmppc_has_cap_fixup_hcalls()) {
591 * Older KVM versions with older guest kernels were broken with the
592 * magic page, don't allow the guest to map it.
594 kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
596 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
597 sizeof(hypercall
))));
599 _FDT((fdt_end_node(fdt
)));
602 _FDT((fdt_end_node(fdt
))); /* close root node */
603 _FDT((fdt_finish(fdt
)));
608 int spapr_h_cas_compose_response(target_ulong addr
, target_ulong size
)
610 void *fdt
, *fdt_skel
;
611 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
615 /* Create sceleton */
616 fdt_skel
= g_malloc0(size
);
617 _FDT((fdt_create(fdt_skel
, size
)));
618 _FDT((fdt_begin_node(fdt_skel
, "")));
619 _FDT((fdt_end_node(fdt_skel
)));
620 _FDT((fdt_finish(fdt_skel
)));
621 fdt
= g_malloc0(size
);
622 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
625 /* Fix skeleton up */
626 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
628 /* Pack resulting tree */
629 _FDT((fdt_pack(fdt
)));
631 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
632 trace_spapr_cas_failed(size
);
636 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
637 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
638 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
644 static void spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
647 uint32_t associativity
[] = {
648 cpu_to_be32(0x4), /* length */
649 cpu_to_be32(0x0), cpu_to_be32(0x0),
650 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
653 uint64_t mem_reg_property
[2];
656 mem_reg_property
[0] = cpu_to_be64(start
);
657 mem_reg_property
[1] = cpu_to_be64(size
);
659 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
660 off
= fdt_add_subnode(fdt
, 0, mem_name
);
662 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
663 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
664 sizeof(mem_reg_property
))));
665 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
666 sizeof(associativity
))));
669 static int spapr_populate_memory(sPAPREnvironment
*spapr
, void *fdt
)
671 hwaddr mem_start
, node_size
;
672 int i
, nb_nodes
= nb_numa_nodes
;
673 NodeInfo
*nodes
= numa_info
;
676 /* No NUMA nodes, assume there is just one node with whole RAM */
677 if (!nb_numa_nodes
) {
679 ramnode
.node_mem
= ram_size
;
683 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
684 if (!nodes
[i
].node_mem
) {
687 if (mem_start
>= ram_size
) {
690 node_size
= nodes
[i
].node_mem
;
691 if (node_size
> ram_size
- mem_start
) {
692 node_size
= ram_size
- mem_start
;
696 /* ppc_spapr_init() checks for rma_size <= node0_size already */
697 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
698 mem_start
+= spapr
->rma_size
;
699 node_size
-= spapr
->rma_size
;
701 for ( ; node_size
; ) {
702 hwaddr sizetmp
= pow2floor(node_size
);
704 /* mem_start != 0 here */
705 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
706 sizetmp
= 1ULL << ctzl(mem_start
);
709 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
710 node_size
-= sizetmp
;
711 mem_start
+= sizetmp
;
718 static void spapr_finalize_fdt(sPAPREnvironment
*spapr
,
723 MachineState
*machine
= MACHINE(qdev_get_machine());
724 const char *boot_device
= machine
->boot_order
;
731 fdt
= g_malloc(FDT_MAX_SIZE
);
733 /* open out the base tree into a temp buffer for the final tweaks */
734 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
736 ret
= spapr_populate_memory(spapr
, fdt
);
738 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
742 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
744 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
748 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
749 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
753 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
758 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
760 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
763 /* Advertise NUMA via ibm,associativity */
764 ret
= spapr_fixup_cpu_dt(fdt
, spapr
);
766 fprintf(stderr
, "Couldn't finalize CPU device tree properties\n");
769 bootlist
= get_boot_devices_list(&cb
, true);
770 if (cb
&& bootlist
) {
771 int offset
= fdt_path_offset(fdt
, "/chosen");
775 for (i
= 0; i
< cb
; i
++) {
776 if (bootlist
[i
] == '\n') {
781 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
784 if (boot_device
&& strlen(boot_device
)) {
785 int offset
= fdt_path_offset(fdt
, "/chosen");
790 fdt_setprop_string(fdt
, offset
, "qemu,boot-device", boot_device
);
793 if (!spapr
->has_graphics
) {
794 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
797 _FDT((fdt_pack(fdt
)));
799 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
800 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
801 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
805 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
811 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
813 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
816 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
818 CPUPPCState
*env
= &cpu
->env
;
821 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
822 env
->gpr
[3] = H_PRIVILEGE
;
824 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
828 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
829 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
830 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
831 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
832 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
834 static void spapr_reset_htab(sPAPREnvironment
*spapr
)
839 /* allocate hash page table. For now we always make this 16mb,
840 * later we should probably make it scale to the size of guest
843 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
846 /* Kernel handles htab, we don't need to allocate one */
847 spapr
->htab_shift
= shift
;
848 kvmppc_kern_htab
= true;
850 /* Tell readers to update their file descriptor */
851 if (spapr
->htab_fd
>= 0) {
852 spapr
->htab_fd_stale
= true;
856 /* Allocate an htab if we don't yet have one */
857 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
861 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
863 for (index
= 0; index
< HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
; index
++) {
864 DIRTY_HPTE(HPTE(spapr
->htab
, index
));
868 /* Update the RMA size if necessary */
869 if (spapr
->vrma_adjust
) {
870 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(),
875 static int find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
877 bool matched
= false;
879 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
884 error_report("Device %s is not supported by this machine yet.",
885 qdev_fw_name(DEVICE(sbdev
)));
893 * A guest reset will cause spapr->htab_fd to become stale if being used.
894 * Reopen the file descriptor to make sure the whole HTAB is properly read.
896 static int spapr_check_htab_fd(sPAPREnvironment
*spapr
)
900 if (spapr
->htab_fd_stale
) {
901 close(spapr
->htab_fd
);
902 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
903 if (spapr
->htab_fd
< 0) {
904 error_report("Unable to open fd for reading hash table from KVM: "
905 "%s", strerror(errno
));
908 spapr
->htab_fd_stale
= false;
914 static void ppc_spapr_reset(void)
916 PowerPCCPU
*first_ppc_cpu
;
919 /* Check for unknown sysbus devices */
920 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
922 /* Reset the hash table & recalc the RMA */
923 spapr_reset_htab(spapr
);
925 qemu_devices_reset();
928 * We place the device tree and RTAS just below either the top of the RMA,
929 * or just below 2GB, whichever is lowere, so that it can be
930 * processed with 32-bit real mode code if necessary
932 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
933 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
934 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
937 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
941 cpu_physical_memory_write(spapr
->rtas_addr
, spapr
->rtas_blob
,
944 /* Set up the entry state */
945 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
946 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
947 first_ppc_cpu
->env
.gpr
[5] = 0;
948 first_cpu
->halted
= 0;
949 first_ppc_cpu
->env
.nip
= spapr
->entry_point
;
953 static void spapr_cpu_reset(void *opaque
)
955 PowerPCCPU
*cpu
= opaque
;
956 CPUState
*cs
= CPU(cpu
);
957 CPUPPCState
*env
= &cpu
->env
;
961 /* All CPUs start halted. CPU0 is unhalted from the machine level
962 * reset code and the rest are explicitly started up by the guest
963 * using an RTAS call */
966 env
->spr
[SPR_HIOR
] = 0;
968 env
->external_htab
= (uint8_t *)spapr
->htab
;
969 if (kvm_enabled() && !env
->external_htab
) {
971 * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
972 * functions do the right thing.
974 env
->external_htab
= (void *)1;
978 * htab_mask is the mask used to normalize hash value to PTEG index.
979 * htab_shift is log2 of hash table size.
980 * We have 8 hpte per group, and each hpte is 16 bytes.
981 * ie have 128 bytes per hpte entry.
983 env
->htab_mask
= (1ULL << ((spapr
)->htab_shift
- 7)) - 1;
984 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
985 (spapr
->htab_shift
- 18);
988 static void spapr_create_nvram(sPAPREnvironment
*spapr
)
990 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
991 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
994 qdev_prop_set_drive_nofail(dev
, "drive", blk_by_legacy_dinfo(dinfo
));
997 qdev_init_nofail(dev
);
999 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1002 static void spapr_rtc_create(sPAPREnvironment
*spapr
)
1004 DeviceState
*dev
= qdev_create(NULL
, TYPE_SPAPR_RTC
);
1006 qdev_init_nofail(dev
);
1009 object_property_add_alias(qdev_get_machine(), "rtc-time",
1010 OBJECT(spapr
->rtc
), "date", NULL
);
1013 /* Returns whether we want to use VGA or not */
1014 static int spapr_vga_init(PCIBus
*pci_bus
)
1016 switch (vga_interface_type
) {
1022 return pci_vga_init(pci_bus
) != NULL
;
1024 fprintf(stderr
, "This vga model is not supported,"
1025 "currently it only supports -vga std\n");
1030 static int spapr_post_load(void *opaque
, int version_id
)
1032 sPAPREnvironment
*spapr
= (sPAPREnvironment
*)opaque
;
1035 /* In earlier versions, there was no separate qdev for the PAPR
1036 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1037 * So when migrating from those versions, poke the incoming offset
1038 * value into the RTC device */
1039 if (version_id
< 3) {
1040 err
= spapr_rtc_import_offset(spapr
->rtc
, spapr
->rtc_offset
);
1046 static bool version_before_3(void *opaque
, int version_id
)
1048 return version_id
< 3;
1051 static const VMStateDescription vmstate_spapr
= {
1054 .minimum_version_id
= 1,
1055 .post_load
= spapr_post_load
,
1056 .fields
= (VMStateField
[]) {
1057 /* used to be @next_irq */
1058 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1061 VMSTATE_UINT64_TEST(rtc_offset
, sPAPREnvironment
, version_before_3
),
1063 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPREnvironment
, 2),
1064 VMSTATE_END_OF_LIST()
1068 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1070 sPAPREnvironment
*spapr
= opaque
;
1072 /* "Iteration" header */
1073 qemu_put_be32(f
, spapr
->htab_shift
);
1076 spapr
->htab_save_index
= 0;
1077 spapr
->htab_first_pass
= true;
1079 assert(kvm_enabled());
1081 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1082 spapr
->htab_fd_stale
= false;
1083 if (spapr
->htab_fd
< 0) {
1084 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
1094 static void htab_save_first_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
1097 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1098 int index
= spapr
->htab_save_index
;
1099 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1101 assert(spapr
->htab_first_pass
);
1106 /* Consume invalid HPTEs */
1107 while ((index
< htabslots
)
1108 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1110 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1113 /* Consume valid HPTEs */
1115 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1116 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1118 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1121 if (index
> chunkstart
) {
1122 int n_valid
= index
- chunkstart
;
1124 qemu_put_be32(f
, chunkstart
);
1125 qemu_put_be16(f
, n_valid
);
1126 qemu_put_be16(f
, 0);
1127 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1128 HASH_PTE_SIZE_64
* n_valid
);
1130 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1134 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1136 if (index
>= htabslots
) {
1137 assert(index
== htabslots
);
1139 spapr
->htab_first_pass
= false;
1141 spapr
->htab_save_index
= index
;
1144 static int htab_save_later_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
1147 bool final
= max_ns
< 0;
1148 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1149 int examined
= 0, sent
= 0;
1150 int index
= spapr
->htab_save_index
;
1151 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1153 assert(!spapr
->htab_first_pass
);
1156 int chunkstart
, invalidstart
;
1158 /* Consume non-dirty HPTEs */
1159 while ((index
< htabslots
)
1160 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1166 /* Consume valid dirty HPTEs */
1167 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1168 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1169 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1170 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1175 invalidstart
= index
;
1176 /* Consume invalid dirty HPTEs */
1177 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1178 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1179 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1180 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1185 if (index
> chunkstart
) {
1186 int n_valid
= invalidstart
- chunkstart
;
1187 int n_invalid
= index
- invalidstart
;
1189 qemu_put_be32(f
, chunkstart
);
1190 qemu_put_be16(f
, n_valid
);
1191 qemu_put_be16(f
, n_invalid
);
1192 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1193 HASH_PTE_SIZE_64
* n_valid
);
1194 sent
+= index
- chunkstart
;
1196 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1201 if (examined
>= htabslots
) {
1205 if (index
>= htabslots
) {
1206 assert(index
== htabslots
);
1209 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1211 if (index
>= htabslots
) {
1212 assert(index
== htabslots
);
1216 spapr
->htab_save_index
= index
;
1218 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1221 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1222 #define MAX_KVM_BUF_SIZE 2048
1224 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1226 sPAPREnvironment
*spapr
= opaque
;
1229 /* Iteration header */
1230 qemu_put_be32(f
, 0);
1233 assert(kvm_enabled());
1235 rc
= spapr_check_htab_fd(spapr
);
1240 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
1241 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1245 } else if (spapr
->htab_first_pass
) {
1246 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1248 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1252 qemu_put_be32(f
, 0);
1253 qemu_put_be16(f
, 0);
1254 qemu_put_be16(f
, 0);
1259 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1261 sPAPREnvironment
*spapr
= opaque
;
1263 /* Iteration header */
1264 qemu_put_be32(f
, 0);
1269 assert(kvm_enabled());
1271 rc
= spapr_check_htab_fd(spapr
);
1276 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
1280 close(spapr
->htab_fd
);
1281 spapr
->htab_fd
= -1;
1283 htab_save_later_pass(f
, spapr
, -1);
1287 qemu_put_be32(f
, 0);
1288 qemu_put_be16(f
, 0);
1289 qemu_put_be16(f
, 0);
1294 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1296 sPAPREnvironment
*spapr
= opaque
;
1297 uint32_t section_hdr
;
1300 if (version_id
< 1 || version_id
> 1) {
1301 fprintf(stderr
, "htab_load() bad version\n");
1305 section_hdr
= qemu_get_be32(f
);
1308 /* First section, just the hash shift */
1309 if (spapr
->htab_shift
!= section_hdr
) {
1316 assert(kvm_enabled());
1318 fd
= kvmppc_get_htab_fd(true);
1320 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1327 uint16_t n_valid
, n_invalid
;
1329 index
= qemu_get_be32(f
);
1330 n_valid
= qemu_get_be16(f
);
1331 n_invalid
= qemu_get_be16(f
);
1333 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1338 if ((index
+ n_valid
+ n_invalid
) >
1339 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1340 /* Bad index in stream */
1341 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1342 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1349 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1350 HASH_PTE_SIZE_64
* n_valid
);
1353 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1354 HASH_PTE_SIZE_64
* n_invalid
);
1361 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1376 static SaveVMHandlers savevm_htab_handlers
= {
1377 .save_live_setup
= htab_save_setup
,
1378 .save_live_iterate
= htab_save_iterate
,
1379 .save_live_complete
= htab_save_complete
,
1380 .load_state
= htab_load
,
1383 static void spapr_boot_set(void *opaque
, const char *boot_device
,
1386 MachineState
*machine
= MACHINE(qdev_get_machine());
1387 machine
->boot_order
= g_strdup(boot_device
);
1390 /* pSeries LPAR / sPAPR hardware init */
1391 static void ppc_spapr_init(MachineState
*machine
)
1393 ram_addr_t ram_size
= machine
->ram_size
;
1394 const char *cpu_model
= machine
->cpu_model
;
1395 const char *kernel_filename
= machine
->kernel_filename
;
1396 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1397 const char *initrd_filename
= machine
->initrd_filename
;
1402 MemoryRegion
*sysmem
= get_system_memory();
1403 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1404 MemoryRegion
*rma_region
;
1406 hwaddr rma_alloc_size
;
1407 hwaddr node0_size
= spapr_node0_size();
1408 uint32_t initrd_base
= 0;
1409 long kernel_size
= 0, initrd_size
= 0;
1410 long load_limit
, fw_size
;
1411 bool kernel_le
= false;
1414 msi_supported
= true;
1416 spapr
= g_malloc0(sizeof(*spapr
));
1417 QLIST_INIT(&spapr
->phbs
);
1419 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1421 /* Allocate RMA if necessary */
1422 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1424 if (rma_alloc_size
== -1) {
1425 error_report("Unable to create RMA");
1429 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1430 spapr
->rma_size
= rma_alloc_size
;
1432 spapr
->rma_size
= node0_size
;
1434 /* With KVM, we don't actually know whether KVM supports an
1435 * unbounded RMA (PR KVM) or is limited by the hash table size
1436 * (HV KVM using VRMA), so we always assume the latter
1438 * In that case, we also limit the initial allocations for RTAS
1439 * etc... to 256M since we have no way to know what the VRMA size
1440 * is going to be as it depends on the size of the hash table
1441 * isn't determined yet.
1443 if (kvm_enabled()) {
1444 spapr
->vrma_adjust
= 1;
1445 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1449 if (spapr
->rma_size
> node0_size
) {
1450 fprintf(stderr
, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")\n",
1455 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
1456 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
1458 /* We aim for a hash table of size 1/128 the size of RAM. The
1459 * normal rule of thumb is 1/64 the size of RAM, but that's much
1460 * more than needed for the Linux guests we support. */
1461 spapr
->htab_shift
= 18; /* Minimum architected size */
1462 while (spapr
->htab_shift
<= 46) {
1463 if ((1ULL << (spapr
->htab_shift
+ 7)) >= ram_size
) {
1466 spapr
->htab_shift
++;
1469 /* Set up Interrupt Controller before we create the VCPUs */
1470 spapr
->icp
= xics_system_init(machine
,
1471 smp_cpus
* kvmppc_smt_threads() / smp_threads
,
1475 if (cpu_model
== NULL
) {
1476 cpu_model
= kvm_enabled() ? "host" : "POWER7";
1478 for (i
= 0; i
< smp_cpus
; i
++) {
1479 cpu
= cpu_ppc_init(cpu_model
);
1481 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1486 /* Set time-base frequency to 512 MHz */
1487 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1489 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1490 * MSR[IP] should never be set.
1492 env
->msr_mask
&= ~(1 << 6);
1494 /* Tell KVM that we're in PAPR mode */
1495 if (kvm_enabled()) {
1496 kvmppc_set_papr(cpu
);
1499 if (cpu
->max_compat
) {
1500 if (ppc_set_compat(cpu
, cpu
->max_compat
) < 0) {
1505 xics_cpu_setup(spapr
->icp
, cpu
);
1507 qemu_register_reset(spapr_cpu_reset
, cpu
);
1510 if (kvm_enabled()) {
1511 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
1512 kvmppc_enable_logical_ci_hcalls();
1516 spapr
->ram_limit
= ram_size
;
1517 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1519 memory_region_add_subregion(sysmem
, 0, ram
);
1521 if (rma_alloc_size
&& rma
) {
1522 rma_region
= g_new(MemoryRegion
, 1);
1523 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1524 rma_alloc_size
, rma
);
1525 vmstate_register_ram_global(rma_region
);
1526 memory_region_add_subregion(sysmem
, 0, rma_region
);
1529 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1531 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1534 spapr
->rtas_size
= get_image_size(filename
);
1535 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
1536 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
1537 error_report("Could not load LPAR rtas '%s'", filename
);
1540 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1541 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
1542 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
1547 /* Set up EPOW events infrastructure */
1548 spapr_events_init(spapr
);
1550 /* Set up the RTC RTAS interfaces */
1551 spapr_rtc_create(spapr
);
1553 /* Set up VIO bus */
1554 spapr
->vio_bus
= spapr_vio_bus_init();
1556 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1557 if (serial_hds
[i
]) {
1558 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1562 /* We always have at least the nvram device on VIO */
1563 spapr_create_nvram(spapr
);
1566 spapr_pci_rtas_init();
1568 phb
= spapr_create_phb(spapr
, 0);
1570 for (i
= 0; i
< nb_nics
; i
++) {
1571 NICInfo
*nd
= &nd_table
[i
];
1574 nd
->model
= g_strdup("ibmveth");
1577 if (strcmp(nd
->model
, "ibmveth") == 0) {
1578 spapr_vlan_create(spapr
->vio_bus
, nd
);
1580 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1584 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1585 spapr_vscsi_create(spapr
->vio_bus
);
1589 if (spapr_vga_init(phb
->bus
)) {
1590 spapr
->has_graphics
= true;
1591 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
1595 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1597 if (spapr
->has_graphics
) {
1598 USBBus
*usb_bus
= usb_bus_find(-1);
1600 usb_create_simple(usb_bus
, "usb-kbd");
1601 usb_create_simple(usb_bus
, "usb-mouse");
1605 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1606 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1607 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1611 if (kernel_filename
) {
1612 uint64_t lowaddr
= 0;
1614 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1615 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1616 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1617 kernel_size
= load_elf(kernel_filename
,
1618 translate_kernel_address
, NULL
,
1619 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1620 kernel_le
= kernel_size
> 0;
1622 if (kernel_size
< 0) {
1623 fprintf(stderr
, "qemu: error loading %s: %s\n",
1624 kernel_filename
, load_elf_strerror(kernel_size
));
1629 if (initrd_filename
) {
1630 /* Try to locate the initrd in the gap between the kernel
1631 * and the firmware. Add a bit of space just in case
1633 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1634 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1635 load_limit
- initrd_base
);
1636 if (initrd_size
< 0) {
1637 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1647 if (bios_name
== NULL
) {
1648 bios_name
= FW_FILE_NAME
;
1650 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1652 error_report("Could not find LPAR firmware '%s'", bios_name
);
1655 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1657 error_report("Could not load LPAR firmware '%s'", filename
);
1662 spapr
->entry_point
= 0x100;
1664 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1665 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1666 &savevm_htab_handlers
, spapr
);
1668 /* Prepare the device tree */
1669 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1670 kernel_size
, kernel_le
,
1672 spapr
->check_exception_irq
);
1673 assert(spapr
->fdt_skel
!= NULL
);
1676 QTAILQ_INIT(&spapr
->ccs_list
);
1677 qemu_register_reset(spapr_ccs_reset_hook
, spapr
);
1679 qemu_register_boot_set(spapr_boot_set
, spapr
);
1682 static int spapr_kvm_type(const char *vm_type
)
1688 if (!strcmp(vm_type
, "HV")) {
1692 if (!strcmp(vm_type
, "PR")) {
1696 error_report("Unknown kvm-type specified '%s'", vm_type
);
1701 * Implementation of an interface to adjust firmware path
1702 * for the bootindex property handling.
1704 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
1707 #define CAST(type, obj, name) \
1708 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
1709 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
1710 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
1713 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
1714 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
1715 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
1719 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
1720 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
1721 * in the top 16 bits of the 64-bit LUN
1723 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
1724 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1725 (uint64_t)id
<< 48);
1726 } else if (virtio
) {
1728 * We use SRP luns of the form 01000000 | (target << 8) | lun
1729 * in the top 32 bits of the 64-bit LUN
1730 * Note: the quote above is from SLOF and it is wrong,
1731 * the actual binding is:
1732 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
1734 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
1735 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1736 (uint64_t)id
<< 32);
1739 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
1740 * in the top 32 bits of the 64-bit LUN
1742 unsigned usb_port
= atoi(usb
->port
->path
);
1743 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
1744 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1745 (uint64_t)id
<< 32);
1750 /* Replace "pci" with "pci@800000020000000" */
1751 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
1757 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
1759 sPAPRMachineState
*sm
= SPAPR_MACHINE(obj
);
1761 return g_strdup(sm
->kvm_type
);
1764 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
1766 sPAPRMachineState
*sm
= SPAPR_MACHINE(obj
);
1768 g_free(sm
->kvm_type
);
1769 sm
->kvm_type
= g_strdup(value
);
1772 static void spapr_machine_initfn(Object
*obj
)
1774 object_property_add_str(obj
, "kvm-type",
1775 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
1776 object_property_set_description(obj
, "kvm-type",
1777 "Specifies the KVM virtualization mode (HV, PR)",
1781 static void ppc_cpu_do_nmi_on_cpu(void *arg
)
1785 cpu_synchronize_state(cs
);
1786 ppc_cpu_do_system_reset(cs
);
1789 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
1794 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, cs
);
1798 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
1800 MachineClass
*mc
= MACHINE_CLASS(oc
);
1801 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
1802 NMIClass
*nc
= NMI_CLASS(oc
);
1804 mc
->init
= ppc_spapr_init
;
1805 mc
->reset
= ppc_spapr_reset
;
1806 mc
->block_default_type
= IF_SCSI
;
1807 mc
->max_cpus
= MAX_CPUS
;
1808 mc
->no_parallel
= 1;
1809 mc
->default_boot_order
= "";
1810 mc
->default_ram_size
= 512 * M_BYTE
;
1811 mc
->kvm_type
= spapr_kvm_type
;
1812 mc
->has_dynamic_sysbus
= true;
1814 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
1815 nc
->nmi_monitor_handler
= spapr_nmi
;
1818 static const TypeInfo spapr_machine_info
= {
1819 .name
= TYPE_SPAPR_MACHINE
,
1820 .parent
= TYPE_MACHINE
,
1822 .instance_size
= sizeof(sPAPRMachineState
),
1823 .instance_init
= spapr_machine_initfn
,
1824 .class_init
= spapr_machine_class_init
,
1825 .interfaces
= (InterfaceInfo
[]) {
1826 { TYPE_FW_PATH_PROVIDER
},
1832 #define SPAPR_COMPAT_2_3 \
1835 .driver = "spapr-pci-host-bridge",\
1836 .property = "dynamic-reconfiguration",\
1840 #define SPAPR_COMPAT_2_2 \
1844 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
1845 .property = "mem_win_size",\
1846 .value = "0x20000000",\
1849 #define SPAPR_COMPAT_2_1 \
1853 static void spapr_compat_2_3(Object
*obj
)
1855 savevm_skip_section_footers();
1858 static void spapr_compat_2_2(Object
*obj
)
1860 spapr_compat_2_3(obj
);
1863 static void spapr_compat_2_1(Object
*obj
)
1865 spapr_compat_2_2(obj
);
1868 static void spapr_machine_2_3_instance_init(Object
*obj
)
1870 spapr_compat_2_3(obj
);
1871 spapr_machine_initfn(obj
);
1874 static void spapr_machine_2_2_instance_init(Object
*obj
)
1876 spapr_compat_2_2(obj
);
1877 spapr_machine_initfn(obj
);
1880 static void spapr_machine_2_1_instance_init(Object
*obj
)
1882 spapr_compat_2_1(obj
);
1883 spapr_machine_initfn(obj
);
1886 static void spapr_machine_2_1_class_init(ObjectClass
*oc
, void *data
)
1888 MachineClass
*mc
= MACHINE_CLASS(oc
);
1889 static GlobalProperty compat_props
[] = {
1891 { /* end of list */ }
1894 mc
->name
= "pseries-2.1";
1895 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.1";
1896 mc
->compat_props
= compat_props
;
1899 static const TypeInfo spapr_machine_2_1_info
= {
1900 .name
= TYPE_SPAPR_MACHINE
"2.1",
1901 .parent
= TYPE_SPAPR_MACHINE
,
1902 .class_init
= spapr_machine_2_1_class_init
,
1903 .instance_init
= spapr_machine_2_1_instance_init
,
1906 static void spapr_machine_2_2_class_init(ObjectClass
*oc
, void *data
)
1908 static GlobalProperty compat_props
[] = {
1910 { /* end of list */ }
1912 MachineClass
*mc
= MACHINE_CLASS(oc
);
1914 mc
->name
= "pseries-2.2";
1915 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.2";
1916 mc
->compat_props
= compat_props
;
1919 static const TypeInfo spapr_machine_2_2_info
= {
1920 .name
= TYPE_SPAPR_MACHINE
"2.2",
1921 .parent
= TYPE_SPAPR_MACHINE
,
1922 .class_init
= spapr_machine_2_2_class_init
,
1923 .instance_init
= spapr_machine_2_2_instance_init
,
1926 static void spapr_machine_2_3_class_init(ObjectClass
*oc
, void *data
)
1928 static GlobalProperty compat_props
[] = {
1930 { /* end of list */ }
1932 MachineClass
*mc
= MACHINE_CLASS(oc
);
1934 mc
->name
= "pseries-2.3";
1935 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.3";
1936 mc
->compat_props
= compat_props
;
1939 static const TypeInfo spapr_machine_2_3_info
= {
1940 .name
= TYPE_SPAPR_MACHINE
"2.3",
1941 .parent
= TYPE_SPAPR_MACHINE
,
1942 .class_init
= spapr_machine_2_3_class_init
,
1943 .instance_init
= spapr_machine_2_3_instance_init
,
1946 static void spapr_machine_2_4_class_init(ObjectClass
*oc
, void *data
)
1948 MachineClass
*mc
= MACHINE_CLASS(oc
);
1950 mc
->name
= "pseries-2.4";
1951 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.4";
1952 mc
->alias
= "pseries";
1956 static const TypeInfo spapr_machine_2_4_info
= {
1957 .name
= TYPE_SPAPR_MACHINE
"2.4",
1958 .parent
= TYPE_SPAPR_MACHINE
,
1959 .class_init
= spapr_machine_2_4_class_init
,
1962 static void spapr_machine_register_types(void)
1964 type_register_static(&spapr_machine_info
);
1965 type_register_static(&spapr_machine_2_1_info
);
1966 type_register_static(&spapr_machine_2_2_info
);
1967 type_register_static(&spapr_machine_2_3_info
);
1968 type_register_static(&spapr_machine_2_4_info
);
1971 type_init(spapr_machine_register_types
)