target-arm: Make vbar_write 64bit friendly on 32bit hosts
[qemu/ar7.git] / target-lm32 / op_helper.c
blob2f36b7b0530c5eff367fdf01bc2d2d23275b2a80
1 #include <assert.h>
2 #include "cpu.h"
3 #include "helper.h"
4 #include "qemu/host-utils.h"
6 #include "hw/lm32/lm32_pic.h"
7 #include "hw/char/lm32_juart.h"
9 #include "exec/softmmu_exec.h"
11 #ifndef CONFIG_USER_ONLY
12 #include "sysemu/sysemu.h"
13 #endif
15 #if !defined(CONFIG_USER_ONLY)
16 #define MMUSUFFIX _mmu
17 #define SHIFT 0
18 #include "exec/softmmu_template.h"
19 #define SHIFT 1
20 #include "exec/softmmu_template.h"
21 #define SHIFT 2
22 #include "exec/softmmu_template.h"
23 #define SHIFT 3
24 #include "exec/softmmu_template.h"
26 void raise_exception(CPULM32State *env, int index)
28 CPUState *cs = CPU(lm32_env_get_cpu(env));
30 cs->exception_index = index;
31 cpu_loop_exit(cs);
34 void HELPER(raise_exception)(CPULM32State *env, uint32_t index)
36 raise_exception(env, index);
39 void HELPER(hlt)(CPULM32State *env)
41 CPUState *cs = CPU(lm32_env_get_cpu(env));
43 cs->halted = 1;
44 cs->exception_index = EXCP_HLT;
45 cpu_loop_exit(cs);
48 void HELPER(ill)(CPULM32State *env)
50 #ifndef CONFIG_USER_ONLY
51 CPUState *cs = CPU(lm32_env_get_cpu(env));
52 fprintf(stderr, "VM paused due to illegal instruction. "
53 "Connect a debugger or switch to the monitor console "
54 "to find out more.\n");
55 qemu_system_vmstop_request(RUN_STATE_PAUSED);
56 cs->halted = 1;
57 raise_exception(env, EXCP_HALTED);
58 #endif
61 void HELPER(wcsr_bp)(CPULM32State *env, uint32_t bp, uint32_t idx)
63 uint32_t addr = bp & ~1;
65 assert(idx < 4);
67 env->bp[idx] = bp;
68 lm32_breakpoint_remove(env, idx);
69 if (bp & 1) {
70 lm32_breakpoint_insert(env, idx, addr);
74 void HELPER(wcsr_wp)(CPULM32State *env, uint32_t wp, uint32_t idx)
76 lm32_wp_t wp_type;
78 assert(idx < 4);
80 env->wp[idx] = wp;
82 wp_type = lm32_wp_type(env->dc, idx);
83 lm32_watchpoint_remove(env, idx);
84 if (wp_type != LM32_WP_DISABLED) {
85 lm32_watchpoint_insert(env, idx, wp, wp_type);
89 void HELPER(wcsr_dc)(CPULM32State *env, uint32_t dc)
91 uint32_t old_dc;
92 int i;
93 lm32_wp_t old_type;
94 lm32_wp_t new_type;
96 old_dc = env->dc;
97 env->dc = dc;
99 for (i = 0; i < 4; i++) {
100 old_type = lm32_wp_type(old_dc, i);
101 new_type = lm32_wp_type(dc, i);
103 if (old_type != new_type) {
104 lm32_watchpoint_remove(env, i);
105 if (new_type != LM32_WP_DISABLED) {
106 lm32_watchpoint_insert(env, i, env->wp[i], new_type);
112 void HELPER(wcsr_im)(CPULM32State *env, uint32_t im)
114 lm32_pic_set_im(env->pic_state, im);
117 void HELPER(wcsr_ip)(CPULM32State *env, uint32_t im)
119 lm32_pic_set_ip(env->pic_state, im);
122 void HELPER(wcsr_jtx)(CPULM32State *env, uint32_t jtx)
124 lm32_juart_set_jtx(env->juart_state, jtx);
127 void HELPER(wcsr_jrx)(CPULM32State *env, uint32_t jrx)
129 lm32_juart_set_jrx(env->juart_state, jrx);
132 uint32_t HELPER(rcsr_im)(CPULM32State *env)
134 return lm32_pic_get_im(env->pic_state);
137 uint32_t HELPER(rcsr_ip)(CPULM32State *env)
139 return lm32_pic_get_ip(env->pic_state);
142 uint32_t HELPER(rcsr_jtx)(CPULM32State *env)
144 return lm32_juart_get_jtx(env->juart_state);
147 uint32_t HELPER(rcsr_jrx)(CPULM32State *env)
149 return lm32_juart_get_jrx(env->juart_state);
152 /* Try to fill the TLB and return an exception if error. If retaddr is
153 * NULL, it means that the function was called in C code (i.e. not
154 * from generated code or from helper.c)
156 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
157 uintptr_t retaddr)
159 int ret;
161 ret = lm32_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
162 if (unlikely(ret)) {
163 if (retaddr) {
164 /* now we have a real cpu fault */
165 cpu_restore_state(cs, retaddr);
167 cpu_loop_exit(cs);
170 #endif