tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_H
  26 #define TCG_H
  27
  28 #include "qemu-common.h"
  29 #include "qemu/bitops.h"
  30 #include "tcg-target.h"
  31
  32 /* Default target word size to pointer size.  */
  33 #ifndef TCG_TARGET_REG_BITS
  34 # if UINTPTR_MAX == UINT32_MAX
  35 #  define TCG_TARGET_REG_BITS 32
  36 # elif UINTPTR_MAX == UINT64_MAX
  37 #  define TCG_TARGET_REG_BITS 64
  38 # else
  39 #  error Unknown pointer size for tcg target
  40 # endif
  41 #endif
  42
  43 #if TCG_TARGET_REG_BITS == 32
  44 typedef int32_t tcg_target_long;
  45 typedef uint32_t tcg_target_ulong;
  46 #define TCG_PRIlx PRIx32
  47 #define TCG_PRIld PRId32
  48 #elif TCG_TARGET_REG_BITS == 64
  49 typedef int64_t tcg_target_long;
  50 typedef uint64_t tcg_target_ulong;
  51 #define TCG_PRIlx PRIx64
  52 #define TCG_PRIld PRId64
  53 #else
  54 #error unsupported
  55 #endif
  56
  57 #if TCG_TARGET_NB_REGS <= 32
  58 typedef uint32_t TCGRegSet;
  59 #elif TCG_TARGET_NB_REGS <= 64
  60 typedef uint64_t TCGRegSet;
  61 #else
  62 #error unsupported
  63 #endif
  64
  65 #if TCG_TARGET_REG_BITS == 32
  66 /* Turn some undef macros into false macros.  */
  67 #define TCG_TARGET_HAS_trunc_shr_i32    0
  68 #define TCG_TARGET_HAS_div_i64          0
  69 #define TCG_TARGET_HAS_rem_i64          0
  70 #define TCG_TARGET_HAS_div2_i64         0
  71 #define TCG_TARGET_HAS_rot_i64          0
  72 #define TCG_TARGET_HAS_ext8s_i64        0
  73 #define TCG_TARGET_HAS_ext16s_i64       0
  74 #define TCG_TARGET_HAS_ext32s_i64       0
  75 #define TCG_TARGET_HAS_ext8u_i64        0
  76 #define TCG_TARGET_HAS_ext16u_i64       0
  77 #define TCG_TARGET_HAS_ext32u_i64       0
  78 #define TCG_TARGET_HAS_bswap16_i64      0
  79 #define TCG_TARGET_HAS_bswap32_i64      0
  80 #define TCG_TARGET_HAS_bswap64_i64      0
  81 #define TCG_TARGET_HAS_neg_i64          0
  82 #define TCG_TARGET_HAS_not_i64          0
  83 #define TCG_TARGET_HAS_andc_i64         0
  84 #define TCG_TARGET_HAS_orc_i64          0
  85 #define TCG_TARGET_HAS_eqv_i64          0
  86 #define TCG_TARGET_HAS_nand_i64         0
  87 #define TCG_TARGET_HAS_nor_i64          0
  88 #define TCG_TARGET_HAS_deposit_i64      0
  89 #define TCG_TARGET_HAS_movcond_i64      0
  90 #define TCG_TARGET_HAS_add2_i64         0
  91 #define TCG_TARGET_HAS_sub2_i64         0
  92 #define TCG_TARGET_HAS_mulu2_i64        0
  93 #define TCG_TARGET_HAS_muls2_i64        0
  94 #define TCG_TARGET_HAS_muluh_i64        0
  95 #define TCG_TARGET_HAS_mulsh_i64        0
  96 /* Turn some undef macros into true macros.  */
  97 #define TCG_TARGET_HAS_add2_i32         1
  98 #define TCG_TARGET_HAS_sub2_i32         1
  99 #endif
 100
 101 #ifndef TCG_TARGET_deposit_i32_valid
 102 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
 103 #endif
 104 #ifndef TCG_TARGET_deposit_i64_valid
 105 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
 106 #endif
 107
 108 /* Only one of DIV or DIV2 should be defined.  */
 109 #if defined(TCG_TARGET_HAS_div_i32)
 110 #define TCG_TARGET_HAS_div2_i32         0
 111 #elif defined(TCG_TARGET_HAS_div2_i32)
 112 #define TCG_TARGET_HAS_div_i32          0
 113 #define TCG_TARGET_HAS_rem_i32          0
 114 #endif
 115 #if defined(TCG_TARGET_HAS_div_i64)
 116 #define TCG_TARGET_HAS_div2_i64         0
 117 #elif defined(TCG_TARGET_HAS_div2_i64)
 118 #define TCG_TARGET_HAS_div_i64          0
 119 #define TCG_TARGET_HAS_rem_i64          0
 120 #endif
 121
 122 /* For 32-bit targets, some sort of unsigned widening multiply is required.  */
 123 #if TCG_TARGET_REG_BITS == 32 \
 124     && !(defined(TCG_TARGET_HAS_mulu2_i32) \
 125          || defined(TCG_TARGET_HAS_muluh_i32))
 126 # error "Missing unsigned widening multiply"
 127 #endif
 128
 129 typedef enum TCGOpcode {
 130 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 131 #include "tcg-opc.h"
 132 #undef DEF
 133     NB_OPS,
 134 } TCGOpcode;
 135
 136 #define tcg_regset_clear(d) (d) = 0
 137 #define tcg_regset_set(d, s) (d) = (s)
 138 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 139 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 140 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 141 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 142 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 143 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 144 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 145 #define tcg_regset_not(d, a) (d) = ~(a)
 146
 147 #ifndef TCG_TARGET_INSN_UNIT_SIZE
 148 # error "Missing TCG_TARGET_INSN_UNIT_SIZE"
 149 #elif TCG_TARGET_INSN_UNIT_SIZE == 1
 150 typedef uint8_t tcg_insn_unit;
 151 #elif TCG_TARGET_INSN_UNIT_SIZE == 2
 152 typedef uint16_t tcg_insn_unit;
 153 #elif TCG_TARGET_INSN_UNIT_SIZE == 4
 154 typedef uint32_t tcg_insn_unit;
 155 #elif TCG_TARGET_INSN_UNIT_SIZE == 8
 156 typedef uint64_t tcg_insn_unit;
 157 #else
 158 /* The port better have done this.  */
 159 #endif
 160
 161
 162 typedef struct TCGRelocation {
 163     struct TCGRelocation *next;
 164     int type;
 165     tcg_insn_unit *ptr;
 166     intptr_t addend;
 167 } TCGRelocation;
 168
 169 typedef struct TCGLabel {
 170     unsigned has_value : 1;
 171     unsigned id : 31;
 172     union {
 173         uintptr_t value;
 174         tcg_insn_unit *value_ptr;
 175         TCGRelocation *first_reloc;
 176     } u;
 177 } TCGLabel;
 178
 179 typedef struct TCGPool {
 180     struct TCGPool *next;
 181     int size;
 182     uint8_t data[0] __attribute__ ((aligned));
 183 } TCGPool;
 184
 185 #define TCG_POOL_CHUNK_SIZE 32768
 186
 187 #define TCG_MAX_TEMPS 512
 188
 189 /* when the size of the arguments of a called function is smaller than
 190    this value, they are statically allocated in the TB stack frame */
 191 #define TCG_STATIC_CALL_ARGS_SIZE 128
 192
 193 typedef enum TCGType {
 194     TCG_TYPE_I32,
 195     TCG_TYPE_I64,
 196     TCG_TYPE_COUNT, /* number of different types */
 197
 198     /* An alias for the size of the host register.  */
 199 #if TCG_TARGET_REG_BITS == 32
 200     TCG_TYPE_REG = TCG_TYPE_I32,
 201 #else
 202     TCG_TYPE_REG = TCG_TYPE_I64,
 203 #endif
 204
 205     /* An alias for the size of the native pointer.  */
 206 #if UINTPTR_MAX == UINT32_MAX
 207     TCG_TYPE_PTR = TCG_TYPE_I32,
 208 #else
 209     TCG_TYPE_PTR = TCG_TYPE_I64,
 210 #endif
 211
 212     /* An alias for the size of the target "long", aka register.  */
 213 #if TARGET_LONG_BITS == 64
 214     TCG_TYPE_TL = TCG_TYPE_I64,
 215 #else
 216     TCG_TYPE_TL = TCG_TYPE_I32,
 217 #endif
 218 } TCGType;
 219
 220 /* Constants for qemu_ld and qemu_st for the Memory Operation field.  */
 221 typedef enum TCGMemOp {
 222     MO_8     = 0,
 223     MO_16    = 1,
 224     MO_32    = 2,
 225     MO_64    = 3,
 226     MO_SIZE  = 3,   /* Mask for the above.  */
 227
 228     MO_SIGN  = 4,   /* Sign-extended, otherwise zero-extended.  */
 229
 230     MO_BSWAP = 8,   /* Host reverse endian.  */
 231 #ifdef HOST_WORDS_BIGENDIAN
 232     MO_LE    = MO_BSWAP,
 233     MO_BE    = 0,
 234 #else
 235     MO_LE    = 0,
 236     MO_BE    = MO_BSWAP,
 237 #endif
 238 #ifdef TARGET_WORDS_BIGENDIAN
 239     MO_TE    = MO_BE,
 240 #else
 241     MO_TE    = MO_LE,
 242 #endif
 243
 244     /* Combinations of the above, for ease of use.  */
 245     MO_UB    = MO_8,
 246     MO_UW    = MO_16,
 247     MO_UL    = MO_32,
 248     MO_SB    = MO_SIGN | MO_8,
 249     MO_SW    = MO_SIGN | MO_16,
 250     MO_SL    = MO_SIGN | MO_32,
 251     MO_Q     = MO_64,
 252
 253     MO_LEUW  = MO_LE | MO_UW,
 254     MO_LEUL  = MO_LE | MO_UL,
 255     MO_LESW  = MO_LE | MO_SW,
 256     MO_LESL  = MO_LE | MO_SL,
 257     MO_LEQ   = MO_LE | MO_Q,
 258
 259     MO_BEUW  = MO_BE | MO_UW,
 260     MO_BEUL  = MO_BE | MO_UL,
 261     MO_BESW  = MO_BE | MO_SW,
 262     MO_BESL  = MO_BE | MO_SL,
 263     MO_BEQ   = MO_BE | MO_Q,
 264
 265     MO_TEUW  = MO_TE | MO_UW,
 266     MO_TEUL  = MO_TE | MO_UL,
 267     MO_TESW  = MO_TE | MO_SW,
 268     MO_TESL  = MO_TE | MO_SL,
 269     MO_TEQ   = MO_TE | MO_Q,
 270
 271     MO_SSIZE = MO_SIZE | MO_SIGN,
 272 } TCGMemOp;
 273
 274 typedef tcg_target_ulong TCGArg;
 275
 276 /* Define a type and accessor macros for variables.  Using pointer types
 277    is nice because it gives some level of type safely.  Converting to and
 278    from intptr_t rather than int reduces the number of sign-extension
 279    instructions that get implied on 64-bit hosts.  Users of tcg_gen_* don't
 280    need to know about any of this, and should treat TCGv as an opaque type.
 281    In addition we do typechecking for different types of variables.  TCGv_i32
 282    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 283    are aliases for target_ulong and host pointer sized values respectively.  */
 284
 285 typedef struct TCGv_i32_d *TCGv_i32;
 286 typedef struct TCGv_i64_d *TCGv_i64;
 287 typedef struct TCGv_ptr_d *TCGv_ptr;
 288
 289 static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(intptr_t i)
 290 {
 291     return (TCGv_i32)i;
 292 }
 293
 294 static inline TCGv_i64 QEMU_ARTIFICIAL MAKE_TCGV_I64(intptr_t i)
 295 {
 296     return (TCGv_i64)i;
 297 }
 298
 299 static inline TCGv_ptr QEMU_ARTIFICIAL MAKE_TCGV_PTR(intptr_t i)
 300 {
 301     return (TCGv_ptr)i;
 302 }
 303
 304 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I32(TCGv_i32 t)
 305 {
 306     return (intptr_t)t;
 307 }
 308
 309 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I64(TCGv_i64 t)
 310 {
 311     return (intptr_t)t;
 312 }
 313
 314 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t)
 315 {
 316     return (intptr_t)t;
 317 }
 318
 319 #if TCG_TARGET_REG_BITS == 32
 320 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 321 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 322 #endif
 323
 324 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 325 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 326 #define TCGV_EQUAL_PTR(a, b) (GET_TCGV_PTR(a) == GET_TCGV_PTR(b))
 327
 328 /* Dummy definition to avoid compiler warnings.  */
 329 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 330 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 331 #define TCGV_UNUSED_PTR(x) x = MAKE_TCGV_PTR(-1)
 332
 333 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 334 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 335 #define TCGV_IS_UNUSED_PTR(x) (GET_TCGV_PTR(x) == -1)
 336
 337 /* call flags */
 338 /* Helper does not read globals (either directly or through an exception). It
 339    implies TCG_CALL_NO_WRITE_GLOBALS. */
 340 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 341 /* Helper does not write globals */
 342 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 343 /* Helper can be safely suppressed if the return value is not used. */
 344 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 345
 346 /* convenience version of most used call flags */
 347 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 348 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 349 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 350 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 351 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 352
 353 /* used to align parameters */
 354 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 355 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 356
 357 /* Conditions.  Note that these are laid out for easy manipulation by
 358    the functions below:
 359      bit 0 is used for inverting;
 360      bit 1 is signed,
 361      bit 2 is unsigned,
 362      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 363 typedef enum {
 364     /* non-signed */
 365     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 366     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 367     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 368     TCG_COND_NE     = 8 | 0 | 0 | 1,
 369     /* signed */
 370     TCG_COND_LT     = 0 | 0 | 2 | 0,
 371     TCG_COND_GE     = 0 | 0 | 2 | 1,
 372     TCG_COND_LE     = 8 | 0 | 2 | 0,
 373     TCG_COND_GT     = 8 | 0 | 2 | 1,
 374     /* unsigned */
 375     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 376     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 377     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 378     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 379 } TCGCond;
 380
 381 /* Invert the sense of the comparison.  */
 382 static inline TCGCond tcg_invert_cond(TCGCond c)
 383 {
 384     return (TCGCond)(c ^ 1);
 385 }
 386
 387 /* Swap the operands in a comparison.  */
 388 static inline TCGCond tcg_swap_cond(TCGCond c)
 389 {
 390     return c & 6 ? (TCGCond)(c ^ 9) : c;
 391 }
 392
 393 /* Create an "unsigned" version of a "signed" comparison.  */
 394 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 395 {
 396     return c & 2 ? (TCGCond)(c ^ 6) : c;
 397 }
 398
 399 /* Must a comparison be considered unsigned?  */
 400 static inline bool is_unsigned_cond(TCGCond c)
 401 {
 402     return (c & 4) != 0;
 403 }
 404
 405 /* Create a "high" version of a double-word comparison.
 406    This removes equality from a LTE or GTE comparison.  */
 407 static inline TCGCond tcg_high_cond(TCGCond c)
 408 {
 409     switch (c) {
 410     case TCG_COND_GE:
 411     case TCG_COND_LE:
 412     case TCG_COND_GEU:
 413     case TCG_COND_LEU:
 414         return (TCGCond)(c ^ 8);
 415     default:
 416         return c;
 417     }
 418 }
 419
 420 #define TEMP_VAL_DEAD  0
 421 #define TEMP_VAL_REG   1
 422 #define TEMP_VAL_MEM   2
 423 #define TEMP_VAL_CONST 3
 424
 425 /* XXX: optimize memory layout */
 426 typedef struct TCGTemp {
 427     TCGType base_type;
 428     TCGType type;
 429     int val_type;
 430     int reg;
 431     tcg_target_long val;
 432     int mem_reg;
 433     intptr_t mem_offset;
 434     unsigned int fixed_reg:1;
 435     unsigned int mem_coherent:1;
 436     unsigned int mem_allocated:1;
 437     unsigned int temp_local:1; /* If true, the temp is saved across
 438                                   basic blocks. Otherwise, it is not
 439                                   preserved across basic blocks. */
 440     unsigned int temp_allocated:1; /* never used for code gen */
 441     const char *name;
 442 } TCGTemp;
 443
 444 typedef struct TCGContext TCGContext;
 445
 446 typedef struct TCGTempSet {
 447     unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
 448 } TCGTempSet;
 449
 450 typedef struct TCGOp {
 451     TCGOpcode opc   : 8;
 452
 453     /* The number of out and in parameter for a call.  */
 454     unsigned callo  : 2;
 455     unsigned calli  : 6;
 456
 457     /* Index of the arguments for this op, or -1 for zero-operand ops.  */
 458     signed args     : 16;
 459
 460     /* Index of the prex/next op, or -1 for the end of the list.  */
 461     signed prev     : 16;
 462     signed next     : 16;
 463 } TCGOp;
 464
 465 QEMU_BUILD_BUG_ON(NB_OPS > 0xff);
 466 QEMU_BUILD_BUG_ON(OPC_BUF_SIZE >= 0x7fff);
 467 QEMU_BUILD_BUG_ON(OPPARAM_BUF_SIZE >= 0x7fff);
 468
 469 struct TCGContext {
 470     uint8_t *pool_cur, *pool_end;
 471     TCGPool *pool_first, *pool_current, *pool_first_large;
 472     int nb_labels;
 473     int nb_globals;
 474     int nb_temps;
 475
 476     /* goto_tb support */
 477     tcg_insn_unit *code_buf;
 478     uintptr_t *tb_next;
 479     uint16_t *tb_next_offset;
 480     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 481
 482     /* liveness analysis */
 483     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 484                                corresponding argument is dead */
 485     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 486                                corresponding output argument needs to be
 487                                sync to memory. */
 488
 489     TCGRegSet reserved_regs;
 490     intptr_t current_frame_offset;
 491     intptr_t frame_start;
 492     intptr_t frame_end;
 493     int frame_reg;
 494
 495     tcg_insn_unit *code_ptr;
 496
 497     GHashTable *helpers;
 498
 499 #ifdef CONFIG_PROFILER
 500     /* profiling info */
 501     int64_t tb_count1;
 502     int64_t tb_count;
 503     int64_t op_count; /* total insn count */
 504     int op_count_max; /* max insn per TB */
 505     int64_t temp_count;
 506     int temp_count_max;
 507     int64_t del_op_count;
 508     int64_t code_in_len;
 509     int64_t code_out_len;
 510     int64_t interm_time;
 511     int64_t code_time;
 512     int64_t la_time;
 513     int64_t opt_time;
 514     int64_t restore_count;
 515     int64_t restore_time;
 516 #endif
 517
 518 #ifdef CONFIG_DEBUG_TCG
 519     int temps_in_use;
 520     int goto_tb_issue_mask;
 521 #endif
 522
 523     int gen_first_op_idx;
 524     int gen_last_op_idx;
 525     int gen_next_op_idx;
 526     int gen_next_parm_idx;
 527
 528     /* Code generation.  Note that we specifically do not use tcg_insn_unit
 529        here, because there's too much arithmetic throughout that relies
 530        on addition and subtraction working on bytes.  Rely on the GCC
 531        extension that allows arithmetic on void*.  */
 532     int code_gen_max_blocks;
 533     void *code_gen_prologue;
 534     void *code_gen_buffer;
 535     size_t code_gen_buffer_size;
 536     /* threshold to flush the translated code buffer */
 537     size_t code_gen_buffer_max_size;
 538     void *code_gen_ptr;
 539
 540     TBContext tb_ctx;
 541
 542     /* The TCGBackendData structure is private to tcg-target.c.  */
 543     struct TCGBackendData *be;
 544
 545     TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
 546     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 547
 548     /* tells in which temporary a given register is. It does not take
 549        into account fixed registers */
 550     int reg_to_temp[TCG_TARGET_NB_REGS];
 551
 552     TCGOp gen_op_buf[OPC_BUF_SIZE];
 553     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 554
 555     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 556     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 557     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 558 };
 559
 560 extern TCGContext tcg_ctx;
 561
 562 /* The number of opcodes emitted so far.  */
 563 static inline int tcg_op_buf_count(void)
 564 {
 565     return tcg_ctx.gen_next_op_idx;
 566 }
 567
 568 /* Test for whether to terminate the TB for using too many opcodes.  */
 569 static inline bool tcg_op_buf_full(void)
 570 {
 571     return tcg_op_buf_count() >= OPC_MAX_SIZE;
 572 }
 573
 574 /* pool based memory allocation */
 575
 576 void *tcg_malloc_internal(TCGContext *s, int size);
 577 void tcg_pool_reset(TCGContext *s);
 578 void tcg_pool_delete(TCGContext *s);
 579
 580 static inline void *tcg_malloc(int size)
 581 {
 582     TCGContext *s = &tcg_ctx;
 583     uint8_t *ptr, *ptr_end;
 584     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 585     ptr = s->pool_cur;
 586     ptr_end = ptr + size;
 587     if (unlikely(ptr_end > s->pool_end)) {
 588         return tcg_malloc_internal(&tcg_ctx, size);
 589     } else {
 590         s->pool_cur = ptr_end;
 591         return ptr;
 592     }
 593 }
 594
 595 void tcg_context_init(TCGContext *s);
 596 void tcg_prologue_init(TCGContext *s);
 597 void tcg_func_start(TCGContext *s);
 598
 599 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf);
 600 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf,
 601                            long offset);
 602
 603 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
 604
 605 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 606 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
 607 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 608 static inline TCGv_i32 tcg_temp_new_i32(void)
 609 {
 610     return tcg_temp_new_internal_i32(0);
 611 }
 612 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 613 {
 614     return tcg_temp_new_internal_i32(1);
 615 }
 616 void tcg_temp_free_i32(TCGv_i32 arg);
 617 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 618
 619 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 620 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
 621 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 622 static inline TCGv_i64 tcg_temp_new_i64(void)
 623 {
 624     return tcg_temp_new_internal_i64(0);
 625 }
 626 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 627 {
 628     return tcg_temp_new_internal_i64(1);
 629 }
 630 void tcg_temp_free_i64(TCGv_i64 arg);
 631 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 632
 633 #if defined(CONFIG_DEBUG_TCG)
 634 /* If you call tcg_clear_temp_count() at the start of a section of
 635  * code which is not supposed to leak any TCG temporaries, then
 636  * calling tcg_check_temp_count() at the end of the section will
 637  * return 1 if the section did in fact leak a temporary.
 638  */
 639 void tcg_clear_temp_count(void);
 640 int tcg_check_temp_count(void);
 641 #else
 642 #define tcg_clear_temp_count() do { } while (0)
 643 #define tcg_check_temp_count() 0
 644 #endif
 645
 646 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 647 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf);
 648
 649 #define TCG_CT_ALIAS  0x80
 650 #define TCG_CT_IALIAS 0x40
 651 #define TCG_CT_REG    0x01
 652 #define TCG_CT_CONST  0x02 /* any constant of register size */
 653
 654 typedef struct TCGArgConstraint {
 655     uint16_t ct;
 656     uint8_t alias_index;
 657     union {
 658         TCGRegSet regs;
 659     } u;
 660 } TCGArgConstraint;
 661
 662 #define TCG_MAX_OP_ARGS 16
 663
 664 /* Bits for TCGOpDef->flags, 8 bits available.  */
 665 enum {
 666     /* Instruction defines the end of a basic block.  */
 667     TCG_OPF_BB_END       = 0x01,
 668     /* Instruction clobbers call registers and potentially update globals.  */
 669     TCG_OPF_CALL_CLOBBER = 0x02,
 670     /* Instruction has side effects: it cannot be removed if its outputs
 671        are not used, and might trigger exceptions.  */
 672     TCG_OPF_SIDE_EFFECTS = 0x04,
 673     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 674     TCG_OPF_64BIT        = 0x08,
 675     /* Instruction is optional and not implemented by the host, or insn
 676        is generic and should not be implemened by the host.  */
 677     TCG_OPF_NOT_PRESENT  = 0x10,
 678 };
 679
 680 typedef struct TCGOpDef {
 681     const char *name;
 682     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 683     uint8_t flags;
 684     TCGArgConstraint *args_ct;
 685     int *sorted_args;
 686 #if defined(CONFIG_DEBUG_TCG)
 687     int used;
 688 #endif
 689 } TCGOpDef;
 690
 691 extern TCGOpDef tcg_op_defs[];
 692 extern const size_t tcg_op_defs_max;
 693
 694 typedef struct TCGTargetOpDef {
 695     TCGOpcode op;
 696     const char *args_ct_str[TCG_MAX_OP_ARGS];
 697 } TCGTargetOpDef;
 698
 699 #define tcg_abort() \
 700 do {\
 701     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 702     abort();\
 703 } while (0)
 704
 705 #ifdef CONFIG_DEBUG_TCG
 706 # define tcg_debug_assert(X) do { assert(X); } while (0)
 707 #elif QEMU_GNUC_PREREQ(4, 5)
 708 # define tcg_debug_assert(X) \
 709     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 710 #else
 711 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 712 #endif
 713
 714 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 715
 716 #if UINTPTR_MAX == UINT32_MAX
 717 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 718 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 719
 720 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((intptr_t)(V)))
 721 #define tcg_global_reg_new_ptr(R, N) \
 722     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 723 #define tcg_global_mem_new_ptr(R, O, N) \
 724     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 725 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 726 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 727 #else
 728 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 729 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 730
 731 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((intptr_t)(V)))
 732 #define tcg_global_reg_new_ptr(R, N) \
 733     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 734 #define tcg_global_mem_new_ptr(R, O, N) \
 735     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 736 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 737 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 738 #endif
 739
 740 void tcg_gen_callN(TCGContext *s, void *func,
 741                    TCGArg ret, int nargs, TCGArg *args);
 742
 743 void tcg_op_remove(TCGContext *s, TCGOp *op);
 744 void tcg_optimize(TCGContext *s);
 745
 746 /* only used for debugging purposes */
 747 void tcg_dump_ops(TCGContext *s);
 748
 749 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 750 TCGv_i32 tcg_const_i32(int32_t val);
 751 TCGv_i64 tcg_const_i64(int64_t val);
 752 TCGv_i32 tcg_const_local_i32(int32_t val);
 753 TCGv_i64 tcg_const_local_i64(int64_t val);
 754
 755 TCGLabel *gen_new_label(void);
 756
 757 /**
 758  * label_arg
 759  * @l: label
 760  *
 761  * Encode a label for storage in the TCG opcode stream.
 762  */
 763
 764 static inline TCGArg label_arg(TCGLabel *l)
 765 {
 766     return (uintptr_t)l;
 767 }
 768
 769 /**
 770  * arg_label
 771  * @i: value
 772  *
 773  * The opposite of label_arg.  Retrieve a label from the
 774  * encoding of the TCG opcode stream.
 775  */
 776
 777 static inline TCGLabel *arg_label(TCGArg i)
 778 {
 779     return (TCGLabel *)(uintptr_t)i;
 780 }
 781
 782 /**
 783  * tcg_ptr_byte_diff
 784  * @a, @b: addresses to be differenced
 785  *
 786  * There are many places within the TCG backends where we need a byte
 787  * difference between two pointers.  While this can be accomplished
 788  * with local casting, it's easy to get wrong -- especially if one is
 789  * concerned with the signedness of the result.
 790  *
 791  * This version relies on GCC's void pointer arithmetic to get the
 792  * correct result.
 793  */
 794
 795 static inline ptrdiff_t tcg_ptr_byte_diff(void *a, void *b)
 796 {
 797     return a - b;
 798 }
 799
 800 /**
 801  * tcg_pcrel_diff
 802  * @s: the tcg context
 803  * @target: address of the target
 804  *
 805  * Produce a pc-relative difference, from the current code_ptr
 806  * to the destination address.
 807  */
 808
 809 static inline ptrdiff_t tcg_pcrel_diff(TCGContext *s, void *target)
 810 {
 811     return tcg_ptr_byte_diff(target, s->code_ptr);
 812 }
 813
 814 /**
 815  * tcg_current_code_size
 816  * @s: the tcg context
 817  *
 818  * Compute the current code size within the translation block.
 819  * This is used to fill in qemu's data structures for goto_tb.
 820  */
 821
 822 static inline size_t tcg_current_code_size(TCGContext *s)
 823 {
 824     return tcg_ptr_byte_diff(s->code_ptr, s->code_buf);
 825 }
 826
 827 /**
 828  * tcg_qemu_tb_exec:
 829  * @env: CPUArchState * for the CPU
 830  * @tb_ptr: address of generated code for the TB to execute
 831  *
 832  * Start executing code from a given translation block.
 833  * Where translation blocks have been linked, execution
 834  * may proceed from the given TB into successive ones.
 835  * Control eventually returns only when some action is needed
 836  * from the top-level loop: either control must pass to a TB
 837  * which has not yet been directly linked, or an asynchronous
 838  * event such as an interrupt needs handling.
 839  *
 840  * The return value is a pointer to the next TB to execute
 841  * (if known; otherwise zero). This pointer is assumed to be
 842  * 4-aligned, and the bottom two bits are used to return further
 843  * information:
 844  *  0, 1: the link between this TB and the next is via the specified
 845  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 846  *        of) "goto_tb <index>". The main loop uses this to determine
 847  *        how to link the TB just executed to the next.
 848  *  2:    we are using instruction counting code generation, and we
 849  *        did not start executing this TB because the instruction counter
 850  *        would hit zero midway through it. In this case the next-TB pointer
 851  *        returned is the TB we were about to execute, and the caller must
 852  *        arrange to execute the remaining count of instructions.
 853  *  3:    we stopped because the CPU's exit_request flag was set
 854  *        (usually meaning that there is an interrupt that needs to be
 855  *        handled). The next-TB pointer returned is the TB we were
 856  *        about to execute when we noticed the pending exit request.
 857  *
 858  * If the bottom two bits indicate an exit-via-index then the CPU
 859  * state is correctly synchronised and ready for execution of the next
 860  * TB (and in particular the guest PC is the address to execute next).
 861  * Otherwise, we gave up on execution of this TB before it started, and
 862  * the caller must fix up the CPU state by calling cpu_pc_from_tb()
 863  * with the next-TB pointer we return.
 864  *
 865  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 866  * to this default (which just calls the prologue.code emitted by
 867  * tcg_target_qemu_prologue()).
 868  */
 869 #define TB_EXIT_MASK 3
 870 #define TB_EXIT_IDX0 0
 871 #define TB_EXIT_IDX1 1
 872 #define TB_EXIT_ICOUNT_EXPIRED 2
 873 #define TB_EXIT_REQUESTED 3
 874
 875 #if !defined(tcg_qemu_tb_exec)
 876 # define tcg_qemu_tb_exec(env, tb_ptr) \
 877     ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 878 #endif
 879
 880 void tcg_register_jit(void *buf, size_t buf_size);
 881
 882 /*
 883  * Memory helpers that will be used by TCG generated code.
 884  */
 885 #ifdef CONFIG_SOFTMMU
 886 /* Value zero-extended to tcg register size.  */
 887 tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
 888                                      int mmu_idx, uintptr_t retaddr);
 889 tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
 890                                     int mmu_idx, uintptr_t retaddr);
 891 tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
 892                                     int mmu_idx, uintptr_t retaddr);
 893 uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
 894                            int mmu_idx, uintptr_t retaddr);
 895 tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
 896                                     int mmu_idx, uintptr_t retaddr);
 897 tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
 898                                     int mmu_idx, uintptr_t retaddr);
 899 uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
 900                            int mmu_idx, uintptr_t retaddr);
 901
 902 /* Value sign-extended to tcg register size.  */
 903 tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
 904                                      int mmu_idx, uintptr_t retaddr);
 905 tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
 906                                     int mmu_idx, uintptr_t retaddr);
 907 tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
 908                                     int mmu_idx, uintptr_t retaddr);
 909 tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
 910                                     int mmu_idx, uintptr_t retaddr);
 911 tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
 912                                     int mmu_idx, uintptr_t retaddr);
 913
 914 void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
 915                         int mmu_idx, uintptr_t retaddr);
 916 void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 917                        int mmu_idx, uintptr_t retaddr);
 918 void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 919                        int mmu_idx, uintptr_t retaddr);
 920 void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 921                        int mmu_idx, uintptr_t retaddr);
 922 void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 923                        int mmu_idx, uintptr_t retaddr);
 924 void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 925                        int mmu_idx, uintptr_t retaddr);
 926 void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 927                        int mmu_idx, uintptr_t retaddr);
 928
 929 /* Temporary aliases until backends are converted.  */
 930 #ifdef TARGET_WORDS_BIGENDIAN
 931 # define helper_ret_ldsw_mmu  helper_be_ldsw_mmu
 932 # define helper_ret_lduw_mmu  helper_be_lduw_mmu
 933 # define helper_ret_ldsl_mmu  helper_be_ldsl_mmu
 934 # define helper_ret_ldul_mmu  helper_be_ldul_mmu
 935 # define helper_ret_ldq_mmu   helper_be_ldq_mmu
 936 # define helper_ret_stw_mmu   helper_be_stw_mmu
 937 # define helper_ret_stl_mmu   helper_be_stl_mmu
 938 # define helper_ret_stq_mmu   helper_be_stq_mmu
 939 #else
 940 # define helper_ret_ldsw_mmu  helper_le_ldsw_mmu
 941 # define helper_ret_lduw_mmu  helper_le_lduw_mmu
 942 # define helper_ret_ldsl_mmu  helper_le_ldsl_mmu
 943 # define helper_ret_ldul_mmu  helper_le_ldul_mmu
 944 # define helper_ret_ldq_mmu   helper_le_ldq_mmu
 945 # define helper_ret_stw_mmu   helper_le_stw_mmu
 946 # define helper_ret_stl_mmu   helper_le_stl_mmu
 947 # define helper_ret_stq_mmu   helper_le_stq_mmu
 948 #endif
 949
 950 #endif /* CONFIG_SOFTMMU */
 951
 952 #endif /* TCG_H */