target-mips: fix detection of the end of the page during translation
[qemu/ar7.git] / hw / usb / hcd-ehci-pci.c
blob490f2b6af9fa1a057cd069f54eb515e7d949bf80
1 /*
2 * QEMU USB EHCI Emulation
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or(at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 #include "hw/usb/hcd-ehci.h"
19 #include "qemu/range.h"
21 typedef struct EHCIPCIInfo {
22 const char *name;
23 uint16_t vendor_id;
24 uint16_t device_id;
25 uint8_t revision;
26 bool companion;
27 } EHCIPCIInfo;
29 static int usb_ehci_pci_initfn(PCIDevice *dev)
31 EHCIPCIState *i = PCI_EHCI(dev);
32 EHCIState *s = &i->ehci;
33 uint8_t *pci_conf = dev->config;
35 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
37 /* capabilities pointer */
38 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
39 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
41 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
42 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
43 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
45 /* pci_conf[0x50] = 0x01; *//* power management caps */
47 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
48 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */
49 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */
51 pci_conf[0x64] = 0x00;
52 pci_conf[0x65] = 0x00;
53 pci_conf[0x66] = 0x00;
54 pci_conf[0x67] = 0x00;
55 pci_conf[0x68] = 0x01;
56 pci_conf[0x69] = 0x00;
57 pci_conf[0x6a] = 0x00;
58 pci_conf[0x6b] = 0x00; /* USBLEGSUP */
59 pci_conf[0x6c] = 0x00;
60 pci_conf[0x6d] = 0x00;
61 pci_conf[0x6e] = 0x00;
62 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
64 s->irq = pci_allocate_irq(dev);
65 s->as = pci_get_address_space(dev);
67 usb_ehci_realize(s, DEVICE(dev), NULL);
68 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
70 return 0;
73 static void usb_ehci_pci_init(Object *obj)
75 DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE);
76 EHCIPCIState *i = PCI_EHCI(obj);
77 EHCIState *s = &i->ehci;
79 s->caps[0x09] = 0x68; /* EECP */
81 s->capsbase = 0x00;
82 s->opregbase = 0x20;
83 s->portscbase = 0x44;
84 s->portnr = NB_PORTS;
86 if (!dc->hotpluggable) {
87 s->companion_enable = true;
90 usb_ehci_init(s, DEVICE(obj));
93 static void usb_ehci_pci_exit(PCIDevice *dev)
95 EHCIPCIState *i = PCI_EHCI(dev);
96 EHCIState *s = &i->ehci;
98 usb_ehci_unrealize(s, DEVICE(dev), NULL);
100 if (s->irq) {
101 g_free(s->irq);
102 s->irq = NULL;
106 static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
107 uint32_t val, int l)
109 EHCIPCIState *i = PCI_EHCI(dev);
110 bool busmaster;
112 pci_default_write_config(dev, addr, val, l);
114 if (!range_covers_byte(addr, l, PCI_COMMAND)) {
115 return;
117 busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER;
118 i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory;
121 static Property ehci_pci_properties[] = {
122 DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
123 DEFINE_PROP_END_OF_LIST(),
126 static const VMStateDescription vmstate_ehci_pci = {
127 .name = "ehci",
128 .version_id = 2,
129 .minimum_version_id = 1,
130 .fields = (VMStateField[]) {
131 VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
132 VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
133 VMSTATE_END_OF_LIST()
137 static void ehci_class_init(ObjectClass *klass, void *data)
139 DeviceClass *dc = DEVICE_CLASS(klass);
140 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
142 k->init = usb_ehci_pci_initfn;
143 k->exit = usb_ehci_pci_exit;
144 k->class_id = PCI_CLASS_SERIAL_USB;
145 k->config_write = usb_ehci_pci_write_config;
146 dc->vmsd = &vmstate_ehci_pci;
147 dc->props = ehci_pci_properties;
150 static const TypeInfo ehci_pci_type_info = {
151 .name = TYPE_PCI_EHCI,
152 .parent = TYPE_PCI_DEVICE,
153 .instance_size = sizeof(EHCIPCIState),
154 .instance_init = usb_ehci_pci_init,
155 .abstract = true,
156 .class_init = ehci_class_init,
159 static void ehci_data_class_init(ObjectClass *klass, void *data)
161 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
162 DeviceClass *dc = DEVICE_CLASS(klass);
163 EHCIPCIInfo *i = data;
165 k->vendor_id = i->vendor_id;
166 k->device_id = i->device_id;
167 k->revision = i->revision;
168 set_bit(DEVICE_CATEGORY_USB, dc->categories);
169 if (i->companion) {
170 dc->hotpluggable = false;
174 static struct EHCIPCIInfo ehci_pci_info[] = {
176 .name = "usb-ehci",
177 .vendor_id = PCI_VENDOR_ID_INTEL,
178 .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */
179 .revision = 0x10,
181 .name = "ich9-usb-ehci1", /* 00:1d.7 */
182 .vendor_id = PCI_VENDOR_ID_INTEL,
183 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1,
184 .revision = 0x03,
185 .companion = true,
187 .name = "ich9-usb-ehci2", /* 00:1a.7 */
188 .vendor_id = PCI_VENDOR_ID_INTEL,
189 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2,
190 .revision = 0x03,
191 .companion = true,
195 static void ehci_pci_register_types(void)
197 TypeInfo ehci_type_info = {
198 .parent = TYPE_PCI_EHCI,
199 .class_init = ehci_data_class_init,
201 int i;
203 type_register_static(&ehci_pci_type_info);
205 for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) {
206 ehci_type_info.name = ehci_pci_info[i].name;
207 ehci_type_info.class_data = ehci_pci_info + i;
208 type_register(&ehci_type_info);
212 type_init(ehci_pci_register_types)
214 struct ehci_companions {
215 const char *name;
216 int func;
217 int port;
220 static const struct ehci_companions ich9_1d[] = {
221 { .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
222 { .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
223 { .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
226 static const struct ehci_companions ich9_1a[] = {
227 { .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
228 { .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
229 { .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
232 int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
234 const struct ehci_companions *comp;
235 PCIDevice *ehci, *uhci;
236 BusState *usbbus;
237 const char *name;
238 int i;
240 switch (slot) {
241 case 0x1d:
242 name = "ich9-usb-ehci1";
243 comp = ich9_1d;
244 break;
245 case 0x1a:
246 name = "ich9-usb-ehci2";
247 comp = ich9_1a;
248 break;
249 default:
250 return -1;
253 ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
254 qdev_init_nofail(&ehci->qdev);
255 usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
257 for (i = 0; i < 3; i++) {
258 uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
259 true, comp[i].name);
260 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
261 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
262 qdev_init_nofail(&uhci->qdev);
264 return 0;