qom/cpu.c

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qapi/error.h"
  23 #include "qemu-common.h"
  24 #include "qom/cpu.h"
  25 #include "sysemu/hw_accel.h"
  26 #include "qemu/notify.h"
  27 #include "qemu/log.h"
  28 #include "exec/log.h"
  29 #include "qemu/error-report.h"
  30 #include "sysemu/sysemu.h"
  31 #include "hw/qdev-properties.h"
  32 #include "trace-root.h"
  33
  34 bool cpu_exists(int64_t id)
  35 {
  36     CPUState *cpu;
  37
  38     CPU_FOREACH(cpu) {
  39         CPUClass *cc = CPU_GET_CLASS(cpu);
  40
  41         if (cc->get_arch_id(cpu) == id) {
  42             return true;
  43         }
  44     }
  45     return false;
  46 }
  47
  48 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
  49 {
  50     char *str, *name, *featurestr;
  51     CPUState *cpu = NULL;
  52     ObjectClass *oc;
  53     CPUClass *cc;
  54     Error *err = NULL;
  55
  56     str = g_strdup(cpu_model);
  57     name = strtok(str, ",");
  58
  59     oc = cpu_class_by_name(typename, name);
  60     if (oc == NULL) {
  61         g_free(str);
  62         return NULL;
  63     }
  64
  65     cc = CPU_CLASS(oc);
  66     featurestr = strtok(NULL, ",");
  67     /* TODO: all callers of cpu_generic_init() need to be converted to
  68      * call parse_features() only once, before calling cpu_generic_init().
  69      */
  70     cc->parse_features(object_class_get_name(oc), featurestr, &err);
  71     g_free(str);
  72     if (err != NULL) {
  73         goto out;
  74     }
  75
  76     cpu = CPU(object_new(object_class_get_name(oc)));
  77     object_property_set_bool(OBJECT(cpu), true, "realized", &err);
  78
  79 out:
  80     if (err != NULL) {
  81         error_report_err(err);
  82         object_unref(OBJECT(cpu));
  83         return NULL;
  84     }
  85
  86     return cpu;
  87 }
  88
  89 bool cpu_paging_enabled(const CPUState *cpu)
  90 {
  91     CPUClass *cc = CPU_GET_CLASS(cpu);
  92
  93     return cc->get_paging_enabled(cpu);
  94 }
  95
  96 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
  97 {
  98     return false;
  99 }
 100
 101 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 102                             Error **errp)
 103 {
 104     CPUClass *cc = CPU_GET_CLASS(cpu);
 105
 106     cc->get_memory_mapping(cpu, list, errp);
 107 }
 108
 109 static void cpu_common_get_memory_mapping(CPUState *cpu,
 110                                           MemoryMappingList *list,
 111                                           Error **errp)
 112 {
 113     error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
 114 }
 115
 116 void cpu_reset_interrupt(CPUState *cpu, int mask)
 117 {
 118     cpu->interrupt_request &= ~mask;
 119 }
 120
 121 void cpu_exit(CPUState *cpu)
 122 {
 123     atomic_set(&cpu->exit_request, 1);
 124     /* Ensure cpu_exec will see the exit request after TCG has exited.  */
 125     smp_wmb();
 126     atomic_set(&cpu->tcg_exit_req, 1);
 127 }
 128
 129 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 130                              void *opaque)
 131 {
 132     CPUClass *cc = CPU_GET_CLASS(cpu);
 133
 134     return (*cc->write_elf32_qemunote)(f, cpu, opaque);
 135 }
 136
 137 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
 138                                            CPUState *cpu, void *opaque)
 139 {
 140     return 0;
 141 }
 142
 143 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 144                          int cpuid, void *opaque)
 145 {
 146     CPUClass *cc = CPU_GET_CLASS(cpu);
 147
 148     return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
 149 }
 150
 151 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
 152                                        CPUState *cpu, int cpuid,
 153                                        void *opaque)
 154 {
 155     return -1;
 156 }
 157
 158 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 159                              void *opaque)
 160 {
 161     CPUClass *cc = CPU_GET_CLASS(cpu);
 162
 163     return (*cc->write_elf64_qemunote)(f, cpu, opaque);
 164 }
 165
 166 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
 167                                            CPUState *cpu, void *opaque)
 168 {
 169     return 0;
 170 }
 171
 172 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 173                          int cpuid, void *opaque)
 174 {
 175     CPUClass *cc = CPU_GET_CLASS(cpu);
 176
 177     return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
 178 }
 179
 180 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
 181                                        CPUState *cpu, int cpuid,
 182                                        void *opaque)
 183 {
 184     return -1;
 185 }
 186
 187
 188 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
 189 {
 190     return 0;
 191 }
 192
 193 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
 194 {
 195     return 0;
 196 }
 197
 198 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
 199 {
 200     /* If no extra check is required, QEMU watchpoint match can be considered
 201      * as an architectural match.
 202      */
 203     return true;
 204 }
 205
 206 bool target_words_bigendian(void);
 207 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
 208 {
 209     return target_words_bigendian();
 210 }
 211
 212 static void cpu_common_noop(CPUState *cpu)
 213 {
 214 }
 215
 216 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
 217 {
 218     return false;
 219 }
 220
 221 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 222                     int flags)
 223 {
 224     CPUClass *cc = CPU_GET_CLASS(cpu);
 225
 226     if (cc->dump_state) {
 227         cpu_synchronize_state(cpu);
 228         cc->dump_state(cpu, f, cpu_fprintf, flags);
 229     }
 230 }
 231
 232 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 233                          int flags)
 234 {
 235     CPUClass *cc = CPU_GET_CLASS(cpu);
 236
 237     if (cc->dump_statistics) {
 238         cc->dump_statistics(cpu, f, cpu_fprintf, flags);
 239     }
 240 }
 241
 242 void cpu_reset(CPUState *cpu)
 243 {
 244     CPUClass *klass = CPU_GET_CLASS(cpu);
 245
 246     if (klass->reset != NULL) {
 247         (*klass->reset)(cpu);
 248     }
 249
 250     trace_guest_cpu_reset(cpu);
 251 }
 252
 253 static void cpu_common_reset(CPUState *cpu)
 254 {
 255     CPUClass *cc = CPU_GET_CLASS(cpu);
 256     int i;
 257
 258     if (qemu_loglevel_mask(CPU_LOG_RESET)) {
 259         qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
 260         log_cpu_state(cpu, cc->reset_dump_flags);
 261     }
 262
 263     cpu->interrupt_request = 0;
 264     cpu->halted = 0;
 265     cpu->mem_io_pc = 0;
 266     cpu->mem_io_vaddr = 0;
 267     cpu->icount_extra = 0;
 268     cpu->icount_decr.u32 = 0;
 269     cpu->can_do_io = 1;
 270     cpu->exception_index = -1;
 271     cpu->crash_occurred = false;
 272
 273     if (tcg_enabled()) {
 274         for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) {
 275             atomic_set(&cpu->tb_jmp_cache[i], NULL);
 276         }
 277
 278 #ifdef CONFIG_SOFTMMU
 279         tlb_flush(cpu, 0);
 280 #endif
 281     }
 282 }
 283
 284 static bool cpu_common_has_work(CPUState *cs)
 285 {
 286     return false;
 287 }
 288
 289 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
 290 {
 291     CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
 292
 293     return cc->class_by_name(cpu_model);
 294 }
 295
 296 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
 297 {
 298     return NULL;
 299 }
 300
 301 static void cpu_common_parse_features(const char *typename, char *features,
 302                                       Error **errp)
 303 {
 304     char *featurestr; /* Single "key=value" string being parsed */
 305     char *val;
 306     static bool cpu_globals_initialized;
 307
 308     /* TODO: all callers of ->parse_features() need to be changed to
 309      * call it only once, so we can remove this check (or change it
 310      * to assert(!cpu_globals_initialized).
 311      * Current callers of ->parse_features() are:
 312      * - cpu_generic_init()
 313      */
 314     if (cpu_globals_initialized) {
 315         return;
 316     }
 317     cpu_globals_initialized = true;
 318
 319     featurestr = features ? strtok(features, ",") : NULL;
 320
 321     while (featurestr) {
 322         val = strchr(featurestr, '=');
 323         if (val) {
 324             GlobalProperty *prop = g_new0(typeof(*prop), 1);
 325             *val = 0;
 326             val++;
 327             prop->driver = typename;
 328             prop->property = g_strdup(featurestr);
 329             prop->value = g_strdup(val);
 330             prop->errp = &error_fatal;
 331             qdev_prop_register_global(prop);
 332         } else {
 333             error_setg(errp, "Expected key=value format, found %s.",
 334                        featurestr);
 335             return;
 336         }
 337         featurestr = strtok(NULL, ",");
 338     }
 339 }
 340
 341 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
 342 {
 343     CPUState *cpu = CPU(dev);
 344
 345     if (dev->hotplugged) {
 346         cpu_synchronize_post_init(cpu);
 347         cpu_resume(cpu);
 348     }
 349
 350     /* NOTE: latest generic point where the cpu is fully realized */
 351     trace_init_vcpu(cpu);
 352 }
 353
 354 static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
 355 {
 356     CPUState *cpu = CPU(dev);
 357     /* NOTE: latest generic point before the cpu is fully unrealized */
 358     trace_fini_vcpu(cpu);
 359     cpu_exec_unrealizefn(cpu);
 360 }
 361
 362 static void cpu_common_initfn(Object *obj)
 363 {
 364     CPUState *cpu = CPU(obj);
 365     CPUClass *cc = CPU_GET_CLASS(obj);
 366
 367     cpu->cpu_index = UNASSIGNED_CPU_INDEX;
 368     cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
 369     /* *-user doesn't have configurable SMP topology */
 370     /* the default value is changed by qemu_init_vcpu() for softmmu */
 371     cpu->nr_cores = 1;
 372     cpu->nr_threads = 1;
 373
 374     qemu_mutex_init(&cpu->work_mutex);
 375     QTAILQ_INIT(&cpu->breakpoints);
 376     QTAILQ_INIT(&cpu->watchpoints);
 377
 378     cpu->trace_dstate = bitmap_new(trace_get_vcpu_event_count());
 379
 380     cpu_exec_initfn(cpu);
 381 }
 382
 383 static void cpu_common_finalize(Object *obj)
 384 {
 385     CPUState *cpu = CPU(obj);
 386     g_free(cpu->trace_dstate);
 387 }
 388
 389 static int64_t cpu_common_get_arch_id(CPUState *cpu)
 390 {
 391     return cpu->cpu_index;
 392 }
 393
 394 static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
 395 {
 396     return addr;
 397 }
 398
 399 static void cpu_class_init(ObjectClass *klass, void *data)
 400 {
 401     DeviceClass *dc = DEVICE_CLASS(klass);
 402     CPUClass *k = CPU_CLASS(klass);
 403
 404     k->class_by_name = cpu_common_class_by_name;
 405     k->parse_features = cpu_common_parse_features;
 406     k->reset = cpu_common_reset;
 407     k->get_arch_id = cpu_common_get_arch_id;
 408     k->has_work = cpu_common_has_work;
 409     k->get_paging_enabled = cpu_common_get_paging_enabled;
 410     k->get_memory_mapping = cpu_common_get_memory_mapping;
 411     k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
 412     k->write_elf32_note = cpu_common_write_elf32_note;
 413     k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
 414     k->write_elf64_note = cpu_common_write_elf64_note;
 415     k->gdb_read_register = cpu_common_gdb_read_register;
 416     k->gdb_write_register = cpu_common_gdb_write_register;
 417     k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
 418     k->debug_excp_handler = cpu_common_noop;
 419     k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
 420     k->cpu_exec_enter = cpu_common_noop;
 421     k->cpu_exec_exit = cpu_common_noop;
 422     k->cpu_exec_interrupt = cpu_common_exec_interrupt;
 423     k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
 424     set_bit(DEVICE_CATEGORY_CPU, dc->categories);
 425     dc->realize = cpu_common_realizefn;
 426     dc->unrealize = cpu_common_unrealizefn;
 427     /*
 428      * Reason: CPUs still need special care by board code: wiring up
 429      * IRQs, adding reset handlers, halting non-first CPUs, ...
 430      */
 431     dc->cannot_instantiate_with_device_add_yet = true;
 432 }
 433
 434 static const TypeInfo cpu_type_info = {
 435     .name = TYPE_CPU,
 436     .parent = TYPE_DEVICE,
 437     .instance_size = sizeof(CPUState),
 438     .instance_init = cpu_common_initfn,
 439     .instance_finalize = cpu_common_finalize,
 440     .abstract = true,
 441     .class_size = sizeof(CPUClass),
 442     .class_init = cpu_class_init,
 443 };
 444
 445 static void cpu_register_types(void)
 446 {
 447     type_register_static(&cpu_type_info);
 448 }
 449
 450 type_init(cpu_register_types)