2 * QEMU rocker switch emulation - PCI device
4 * Copyright (c) 2014 Scott Feldman <sfeldma@gmail.com>
5 * Copyright (c) 2014 Jiri Pirko <jiri@resnulli.us>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include "qemu/osdep.h"
20 #include "hw/pci/pci.h"
21 #include "hw/pci/msix.h"
25 #include "qemu/bitops.h"
26 #include "qmp-commands.h"
29 #include "rocker_hw.h"
30 #include "rocker_fp.h"
31 #include "rocker_desc.h"
32 #include "rocker_tlv.h"
33 #include "rocker_world.h"
34 #include "rocker_of_dpa.h"
42 MemoryRegion msix_bar
;
44 /* switch configuration */
45 char *name
; /* switch name */
46 char *world_name
; /* world name */
47 uint32_t fp_ports
; /* front-panel port count */
48 NICPeers
*fp_ports_peers
;
49 MACAddr fp_start_macaddr
; /* front-panel port 0 mac addr */
50 uint64_t switch_id
; /* switch id */
52 /* front-panel ports */
53 FpPort
*fp_port
[ROCKER_FP_PORTS_MAX
];
55 /* register backings */
58 dma_addr_t test_dma_addr
;
59 uint32_t test_dma_size
;
60 uint64_t lower32
; /* lower 32-bit val in 2-part 64-bit access */
66 World
*worlds
[ROCKER_WORLD_TYPE_MAX
];
69 QLIST_ENTRY(rocker
) next
;
72 #define TYPE_ROCKER "rocker"
75 OBJECT_CHECK(Rocker, (obj), TYPE_ROCKER)
77 static QLIST_HEAD(, rocker
) rockers
;
79 Rocker
*rocker_find(const char *name
)
83 QLIST_FOREACH(r
, &rockers
, next
)
84 if (strcmp(r
->name
, name
) == 0) {
91 World
*rocker_get_world(Rocker
*r
, enum rocker_world_type type
)
93 if (type
< ROCKER_WORLD_TYPE_MAX
) {
94 return r
->worlds
[type
];
99 RockerSwitch
*qmp_query_rocker(const char *name
, Error
**errp
)
101 RockerSwitch
*rocker
;
104 r
= rocker_find(name
);
106 error_setg(errp
, "rocker %s not found", name
);
110 rocker
= g_new0(RockerSwitch
, 1);
111 rocker
->name
= g_strdup(r
->name
);
112 rocker
->id
= r
->switch_id
;
113 rocker
->ports
= r
->fp_ports
;
118 RockerPortList
*qmp_query_rocker_ports(const char *name
, Error
**errp
)
120 RockerPortList
*list
= NULL
;
124 r
= rocker_find(name
);
126 error_setg(errp
, "rocker %s not found", name
);
130 for (i
= r
->fp_ports
- 1; i
>= 0; i
--) {
131 RockerPortList
*info
= g_malloc0(sizeof(*info
));
132 info
->value
= g_malloc0(sizeof(*info
->value
));
133 struct fp_port
*port
= r
->fp_port
[i
];
135 fp_port_get_info(port
, info
);
143 uint32_t rocker_fp_ports(Rocker
*r
)
148 static uint32_t rocker_get_pport_by_tx_ring(Rocker
*r
,
151 return (desc_ring_index(ring
) - 2) / 2 + 1;
154 static int tx_consume(Rocker
*r
, DescInfo
*info
)
156 PCIDevice
*dev
= PCI_DEVICE(r
);
157 char *buf
= desc_get_buf(info
, true);
159 RockerTlv
*tlvs
[ROCKER_TLV_TX_MAX
+ 1];
160 struct iovec iov
[ROCKER_TX_FRAGS_MAX
] = { { 0, }, };
163 uint16_t tx_offload
= ROCKER_TX_OFFLOAD_NONE
;
164 uint16_t tx_l3_csum_off
= 0;
165 uint16_t tx_tso_mss
= 0;
166 uint16_t tx_tso_hdr_len
= 0;
173 return -ROCKER_ENXIO
;
176 rocker_tlv_parse(tlvs
, ROCKER_TLV_TX_MAX
, buf
, desc_tlv_size(info
));
178 if (!tlvs
[ROCKER_TLV_TX_FRAGS
]) {
179 return -ROCKER_EINVAL
;
182 pport
= rocker_get_pport_by_tx_ring(r
, desc_get_ring(info
));
183 if (!fp_port_from_pport(pport
, &port
)) {
184 return -ROCKER_EINVAL
;
187 if (tlvs
[ROCKER_TLV_TX_OFFLOAD
]) {
188 tx_offload
= rocker_tlv_get_u8(tlvs
[ROCKER_TLV_TX_OFFLOAD
]);
191 switch (tx_offload
) {
192 case ROCKER_TX_OFFLOAD_L3_CSUM
:
193 if (!tlvs
[ROCKER_TLV_TX_L3_CSUM_OFF
]) {
194 return -ROCKER_EINVAL
;
197 case ROCKER_TX_OFFLOAD_TSO
:
198 if (!tlvs
[ROCKER_TLV_TX_TSO_MSS
] ||
199 !tlvs
[ROCKER_TLV_TX_TSO_HDR_LEN
]) {
200 return -ROCKER_EINVAL
;
205 if (tlvs
[ROCKER_TLV_TX_L3_CSUM_OFF
]) {
206 tx_l3_csum_off
= rocker_tlv_get_le16(tlvs
[ROCKER_TLV_TX_L3_CSUM_OFF
]);
209 if (tlvs
[ROCKER_TLV_TX_TSO_MSS
]) {
210 tx_tso_mss
= rocker_tlv_get_le16(tlvs
[ROCKER_TLV_TX_TSO_MSS
]);
213 if (tlvs
[ROCKER_TLV_TX_TSO_HDR_LEN
]) {
214 tx_tso_hdr_len
= rocker_tlv_get_le16(tlvs
[ROCKER_TLV_TX_TSO_HDR_LEN
]);
217 rocker_tlv_for_each_nested(tlv_frag
, tlvs
[ROCKER_TLV_TX_FRAGS
], rem
) {
221 if (rocker_tlv_type(tlv_frag
) != ROCKER_TLV_TX_FRAG
) {
222 err
= -ROCKER_EINVAL
;
226 rocker_tlv_parse_nested(tlvs
, ROCKER_TLV_TX_FRAG_ATTR_MAX
, tlv_frag
);
228 if (!tlvs
[ROCKER_TLV_TX_FRAG_ATTR_ADDR
] ||
229 !tlvs
[ROCKER_TLV_TX_FRAG_ATTR_LEN
]) {
230 err
= -ROCKER_EINVAL
;
234 frag_addr
= rocker_tlv_get_le64(tlvs
[ROCKER_TLV_TX_FRAG_ATTR_ADDR
]);
235 frag_len
= rocker_tlv_get_le16(tlvs
[ROCKER_TLV_TX_FRAG_ATTR_LEN
]);
237 if (iovcnt
>= ROCKER_TX_FRAGS_MAX
) {
238 goto err_too_many_frags
;
240 iov
[iovcnt
].iov_len
= frag_len
;
241 iov
[iovcnt
].iov_base
= g_malloc(frag_len
);
243 pci_dma_read(dev
, frag_addr
, iov
[iovcnt
].iov_base
,
244 iov
[iovcnt
].iov_len
);
250 /* XXX perform Tx offloads */
251 /* XXX silence compiler for now */
252 tx_l3_csum_off
+= tx_tso_mss
= tx_tso_hdr_len
= 0;
255 err
= fp_port_eg(r
->fp_port
[port
], iov
, iovcnt
);
259 for (i
= 0; i
< ROCKER_TX_FRAGS_MAX
; i
++) {
260 g_free(iov
[i
].iov_base
);
266 static int cmd_get_port_settings(Rocker
*r
,
267 DescInfo
*info
, char *buf
,
268 RockerTlv
*cmd_info_tlv
)
270 RockerTlv
*tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_MAX
+ 1];
281 enum rocker_world_type mode
;
286 rocker_tlv_parse_nested(tlvs
, ROCKER_TLV_CMD_PORT_SETTINGS_MAX
,
289 if (!tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_PPORT
]) {
290 return -ROCKER_EINVAL
;
293 pport
= rocker_tlv_get_le32(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_PPORT
]);
294 if (!fp_port_from_pport(pport
, &port
)) {
295 return -ROCKER_EINVAL
;
297 fp_port
= r
->fp_port
[port
];
299 err
= fp_port_get_settings(fp_port
, &speed
, &duplex
, &autoneg
);
304 fp_port_get_macaddr(fp_port
, &macaddr
);
305 mode
= world_type(fp_port_get_world(fp_port
));
306 learning
= fp_port_get_learning(fp_port
);
307 phys_name
= fp_port_get_name(fp_port
);
309 tlv_size
= rocker_tlv_total_size(0) + /* nest */
310 rocker_tlv_total_size(sizeof(uint32_t)) + /* pport */
311 rocker_tlv_total_size(sizeof(uint32_t)) + /* speed */
312 rocker_tlv_total_size(sizeof(uint8_t)) + /* duplex */
313 rocker_tlv_total_size(sizeof(uint8_t)) + /* autoneg */
314 rocker_tlv_total_size(sizeof(macaddr
.a
)) + /* macaddr */
315 rocker_tlv_total_size(sizeof(uint8_t)) + /* mode */
316 rocker_tlv_total_size(sizeof(uint8_t)) + /* learning */
317 rocker_tlv_total_size(strlen(phys_name
));
319 if (tlv_size
> desc_buf_size(info
)) {
320 return -ROCKER_EMSGSIZE
;
324 nest
= rocker_tlv_nest_start(buf
, &pos
, ROCKER_TLV_CMD_INFO
);
325 rocker_tlv_put_le32(buf
, &pos
, ROCKER_TLV_CMD_PORT_SETTINGS_PPORT
, pport
);
326 rocker_tlv_put_le32(buf
, &pos
, ROCKER_TLV_CMD_PORT_SETTINGS_SPEED
, speed
);
327 rocker_tlv_put_u8(buf
, &pos
, ROCKER_TLV_CMD_PORT_SETTINGS_DUPLEX
, duplex
);
328 rocker_tlv_put_u8(buf
, &pos
, ROCKER_TLV_CMD_PORT_SETTINGS_AUTONEG
, autoneg
);
329 rocker_tlv_put(buf
, &pos
, ROCKER_TLV_CMD_PORT_SETTINGS_MACADDR
,
330 sizeof(macaddr
.a
), macaddr
.a
);
331 rocker_tlv_put_u8(buf
, &pos
, ROCKER_TLV_CMD_PORT_SETTINGS_MODE
, mode
);
332 rocker_tlv_put_u8(buf
, &pos
, ROCKER_TLV_CMD_PORT_SETTINGS_LEARNING
,
334 rocker_tlv_put(buf
, &pos
, ROCKER_TLV_CMD_PORT_SETTINGS_PHYS_NAME
,
335 strlen(phys_name
), phys_name
);
336 rocker_tlv_nest_end(buf
, &pos
, nest
);
338 return desc_set_buf(info
, tlv_size
);
341 static int cmd_set_port_settings(Rocker
*r
,
342 RockerTlv
*cmd_info_tlv
)
344 RockerTlv
*tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_MAX
+ 1];
353 enum rocker_world_type mode
;
356 rocker_tlv_parse_nested(tlvs
, ROCKER_TLV_CMD_PORT_SETTINGS_MAX
,
359 if (!tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_PPORT
]) {
360 return -ROCKER_EINVAL
;
363 pport
= rocker_tlv_get_le32(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_PPORT
]);
364 if (!fp_port_from_pport(pport
, &port
)) {
365 return -ROCKER_EINVAL
;
367 fp_port
= r
->fp_port
[port
];
369 if (tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_SPEED
] &&
370 tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_DUPLEX
] &&
371 tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_AUTONEG
]) {
373 speed
= rocker_tlv_get_le32(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_SPEED
]);
374 duplex
= rocker_tlv_get_u8(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_DUPLEX
]);
375 autoneg
= rocker_tlv_get_u8(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_AUTONEG
]);
377 err
= fp_port_set_settings(fp_port
, speed
, duplex
, autoneg
);
383 if (tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_MACADDR
]) {
384 if (rocker_tlv_len(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_MACADDR
]) !=
386 return -ROCKER_EINVAL
;
389 rocker_tlv_data(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_MACADDR
]),
391 fp_port_set_macaddr(fp_port
, &macaddr
);
394 if (tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_MODE
]) {
395 mode
= rocker_tlv_get_u8(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_MODE
]);
396 if (mode
>= ROCKER_WORLD_TYPE_MAX
) {
397 return -ROCKER_EINVAL
;
399 /* We don't support world change. */
400 if (!fp_port_check_world(fp_port
, r
->worlds
[mode
])) {
401 return -ROCKER_EINVAL
;
405 if (tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_LEARNING
]) {
407 rocker_tlv_get_u8(tlvs
[ROCKER_TLV_CMD_PORT_SETTINGS_LEARNING
]);
408 fp_port_set_learning(fp_port
, learning
);
414 static int cmd_consume(Rocker
*r
, DescInfo
*info
)
416 char *buf
= desc_get_buf(info
, false);
417 RockerTlv
*tlvs
[ROCKER_TLV_CMD_MAX
+ 1];
424 return -ROCKER_ENXIO
;
427 rocker_tlv_parse(tlvs
, ROCKER_TLV_CMD_MAX
, buf
, desc_tlv_size(info
));
429 if (!tlvs
[ROCKER_TLV_CMD_TYPE
] || !tlvs
[ROCKER_TLV_CMD_INFO
]) {
430 return -ROCKER_EINVAL
;
433 cmd
= rocker_tlv_get_le16(tlvs
[ROCKER_TLV_CMD_TYPE
]);
434 info_tlv
= tlvs
[ROCKER_TLV_CMD_INFO
];
436 /* This might be reworked to something like this:
437 * Every world will have an array of command handlers from
438 * ROCKER_TLV_CMD_TYPE_UNSPEC to ROCKER_TLV_CMD_TYPE_MAX. There is
439 * up to each world to implement whatever command it want.
440 * It can reference "generic" commands as cmd_set_port_settings or
441 * cmd_get_port_settings
445 case ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_ADD
:
446 case ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_MOD
:
447 case ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_DEL
:
448 case ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_GET_STATS
:
449 case ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_ADD
:
450 case ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_MOD
:
451 case ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_DEL
:
452 case ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_GET_STATS
:
453 world
= r
->worlds
[ROCKER_WORLD_TYPE_OF_DPA
];
454 err
= world_do_cmd(world
, info
, buf
, cmd
, info_tlv
);
456 case ROCKER_TLV_CMD_TYPE_GET_PORT_SETTINGS
:
457 err
= cmd_get_port_settings(r
, info
, buf
, info_tlv
);
459 case ROCKER_TLV_CMD_TYPE_SET_PORT_SETTINGS
:
460 err
= cmd_set_port_settings(r
, info_tlv
);
463 err
= -ROCKER_EINVAL
;
470 static void rocker_msix_irq(Rocker
*r
, unsigned vector
)
472 PCIDevice
*dev
= PCI_DEVICE(r
);
474 DPRINTF("MSI-X notify request for vector %d\n", vector
);
475 if (vector
>= ROCKER_MSIX_VEC_COUNT(r
->fp_ports
)) {
476 DPRINTF("incorrect vector %d\n", vector
);
479 msix_notify(dev
, vector
);
482 int rocker_event_link_changed(Rocker
*r
, uint32_t pport
, bool link_up
)
484 DescRing
*ring
= r
->rings
[ROCKER_RING_EVENT
];
485 DescInfo
*info
= desc_ring_fetch_desc(ring
);
493 return -ROCKER_ENOBUFS
;
496 tlv_size
= rocker_tlv_total_size(sizeof(uint16_t)) + /* event type */
497 rocker_tlv_total_size(0) + /* nest */
498 rocker_tlv_total_size(sizeof(uint32_t)) + /* pport */
499 rocker_tlv_total_size(sizeof(uint8_t)); /* link up */
501 if (tlv_size
> desc_buf_size(info
)) {
502 err
= -ROCKER_EMSGSIZE
;
506 buf
= desc_get_buf(info
, false);
508 err
= -ROCKER_ENOMEM
;
513 rocker_tlv_put_le32(buf
, &pos
, ROCKER_TLV_EVENT_TYPE
,
514 ROCKER_TLV_EVENT_TYPE_LINK_CHANGED
);
515 nest
= rocker_tlv_nest_start(buf
, &pos
, ROCKER_TLV_EVENT_INFO
);
516 rocker_tlv_put_le32(buf
, &pos
, ROCKER_TLV_EVENT_LINK_CHANGED_PPORT
, pport
);
517 rocker_tlv_put_u8(buf
, &pos
, ROCKER_TLV_EVENT_LINK_CHANGED_LINKUP
,
519 rocker_tlv_nest_end(buf
, &pos
, nest
);
521 err
= desc_set_buf(info
, tlv_size
);
525 if (desc_ring_post_desc(ring
, err
)) {
526 rocker_msix_irq(r
, ROCKER_MSIX_VEC_EVENT
);
532 int rocker_event_mac_vlan_seen(Rocker
*r
, uint32_t pport
, uint8_t *addr
,
535 DescRing
*ring
= r
->rings
[ROCKER_RING_EVENT
];
545 if (!fp_port_from_pport(pport
, &port
)) {
546 return -ROCKER_EINVAL
;
548 fp_port
= r
->fp_port
[port
];
549 if (!fp_port_get_learning(fp_port
)) {
553 info
= desc_ring_fetch_desc(ring
);
555 return -ROCKER_ENOBUFS
;
558 tlv_size
= rocker_tlv_total_size(sizeof(uint16_t)) + /* event type */
559 rocker_tlv_total_size(0) + /* nest */
560 rocker_tlv_total_size(sizeof(uint32_t)) + /* pport */
561 rocker_tlv_total_size(ETH_ALEN
) + /* mac addr */
562 rocker_tlv_total_size(sizeof(uint16_t)); /* vlan_id */
564 if (tlv_size
> desc_buf_size(info
)) {
565 err
= -ROCKER_EMSGSIZE
;
569 buf
= desc_get_buf(info
, false);
571 err
= -ROCKER_ENOMEM
;
576 rocker_tlv_put_le32(buf
, &pos
, ROCKER_TLV_EVENT_TYPE
,
577 ROCKER_TLV_EVENT_TYPE_MAC_VLAN_SEEN
);
578 nest
= rocker_tlv_nest_start(buf
, &pos
, ROCKER_TLV_EVENT_INFO
);
579 rocker_tlv_put_le32(buf
, &pos
, ROCKER_TLV_EVENT_MAC_VLAN_PPORT
, pport
);
580 rocker_tlv_put(buf
, &pos
, ROCKER_TLV_EVENT_MAC_VLAN_MAC
, ETH_ALEN
, addr
);
581 rocker_tlv_put_u16(buf
, &pos
, ROCKER_TLV_EVENT_MAC_VLAN_VLAN_ID
, vlan_id
);
582 rocker_tlv_nest_end(buf
, &pos
, nest
);
584 err
= desc_set_buf(info
, tlv_size
);
588 if (desc_ring_post_desc(ring
, err
)) {
589 rocker_msix_irq(r
, ROCKER_MSIX_VEC_EVENT
);
595 static DescRing
*rocker_get_rx_ring_by_pport(Rocker
*r
,
598 return r
->rings
[(pport
- 1) * 2 + 3];
601 int rx_produce(World
*world
, uint32_t pport
,
602 const struct iovec
*iov
, int iovcnt
, uint8_t copy_to_cpu
)
604 Rocker
*r
= world_rocker(world
);
605 PCIDevice
*dev
= (PCIDevice
*)r
;
606 DescRing
*ring
= rocker_get_rx_ring_by_pport(r
, pport
);
607 DescInfo
*info
= desc_ring_fetch_desc(ring
);
609 size_t data_size
= iov_size(iov
, iovcnt
);
611 uint16_t rx_flags
= 0;
612 uint16_t rx_csum
= 0;
614 RockerTlv
*tlvs
[ROCKER_TLV_RX_MAX
+ 1];
616 uint16_t frag_max_len
;
621 return -ROCKER_ENOBUFS
;
624 buf
= desc_get_buf(info
, false);
629 rocker_tlv_parse(tlvs
, ROCKER_TLV_RX_MAX
, buf
, desc_tlv_size(info
));
631 if (!tlvs
[ROCKER_TLV_RX_FRAG_ADDR
] ||
632 !tlvs
[ROCKER_TLV_RX_FRAG_MAX_LEN
]) {
633 err
= -ROCKER_EINVAL
;
637 frag_addr
= rocker_tlv_get_le64(tlvs
[ROCKER_TLV_RX_FRAG_ADDR
]);
638 frag_max_len
= rocker_tlv_get_le16(tlvs
[ROCKER_TLV_RX_FRAG_MAX_LEN
]);
640 if (data_size
> frag_max_len
) {
641 err
= -ROCKER_EMSGSIZE
;
646 rx_flags
|= ROCKER_RX_FLAGS_FWD_OFFLOAD
;
649 /* XXX calc rx flags/csum */
651 tlv_size
= rocker_tlv_total_size(sizeof(uint16_t)) + /* flags */
652 rocker_tlv_total_size(sizeof(uint16_t)) + /* scum */
653 rocker_tlv_total_size(sizeof(uint64_t)) + /* frag addr */
654 rocker_tlv_total_size(sizeof(uint16_t)) + /* frag max len */
655 rocker_tlv_total_size(sizeof(uint16_t)); /* frag len */
657 if (tlv_size
> desc_buf_size(info
)) {
658 err
= -ROCKER_EMSGSIZE
;
663 * iov dma write can be optimized in similar way e1000 does it in
664 * e1000_receive_iov. But maybe if would make sense to introduce
665 * generic helper iov_dma_write.
668 data
= g_malloc(data_size
);
670 iov_to_buf(iov
, iovcnt
, 0, data
, data_size
);
671 pci_dma_write(dev
, frag_addr
, data
, data_size
);
675 rocker_tlv_put_le16(buf
, &pos
, ROCKER_TLV_RX_FLAGS
, rx_flags
);
676 rocker_tlv_put_le16(buf
, &pos
, ROCKER_TLV_RX_CSUM
, rx_csum
);
677 rocker_tlv_put_le64(buf
, &pos
, ROCKER_TLV_RX_FRAG_ADDR
, frag_addr
);
678 rocker_tlv_put_le16(buf
, &pos
, ROCKER_TLV_RX_FRAG_MAX_LEN
, frag_max_len
);
679 rocker_tlv_put_le16(buf
, &pos
, ROCKER_TLV_RX_FRAG_LEN
, data_size
);
681 err
= desc_set_buf(info
, tlv_size
);
684 if (desc_ring_post_desc(ring
, err
)) {
685 rocker_msix_irq(r
, ROCKER_MSIX_VEC_RX(pport
- 1));
691 int rocker_port_eg(Rocker
*r
, uint32_t pport
,
692 const struct iovec
*iov
, int iovcnt
)
697 if (!fp_port_from_pport(pport
, &port
)) {
698 return -ROCKER_EINVAL
;
701 fp_port
= r
->fp_port
[port
];
703 return fp_port_eg(fp_port
, iov
, iovcnt
);
706 static void rocker_test_dma_ctrl(Rocker
*r
, uint32_t val
)
708 PCIDevice
*dev
= PCI_DEVICE(r
);
712 buf
= g_malloc(r
->test_dma_size
);
715 case ROCKER_TEST_DMA_CTRL_CLEAR
:
716 memset(buf
, 0, r
->test_dma_size
);
718 case ROCKER_TEST_DMA_CTRL_FILL
:
719 memset(buf
, 0x96, r
->test_dma_size
);
721 case ROCKER_TEST_DMA_CTRL_INVERT
:
722 pci_dma_read(dev
, r
->test_dma_addr
, buf
, r
->test_dma_size
);
723 for (i
= 0; i
< r
->test_dma_size
; i
++) {
728 DPRINTF("not test dma control val=0x%08x\n", val
);
731 pci_dma_write(dev
, r
->test_dma_addr
, buf
, r
->test_dma_size
);
733 rocker_msix_irq(r
, ROCKER_MSIX_VEC_TEST
);
739 static void rocker_reset(DeviceState
*dev
);
741 static void rocker_control(Rocker
*r
, uint32_t val
)
743 if (val
& ROCKER_CONTROL_RESET
) {
744 rocker_reset(DEVICE(r
));
748 static int rocker_pci_ring_count(Rocker
*r
)
753 * - tx and rx ring per each port
755 return 2 + (2 * r
->fp_ports
);
758 static bool rocker_addr_is_desc_reg(Rocker
*r
, hwaddr addr
)
760 hwaddr start
= ROCKER_DMA_DESC_BASE
;
761 hwaddr end
= start
+ (ROCKER_DMA_DESC_SIZE
* rocker_pci_ring_count(r
));
763 return addr
>= start
&& addr
< end
;
766 static void rocker_port_phys_enable_write(Rocker
*r
, uint64_t new)
773 for (i
= 0; i
< r
->fp_ports
; i
++) {
774 fp_port
= r
->fp_port
[i
];
775 old_enabled
= fp_port_enabled(fp_port
);
776 new_enabled
= (new >> (i
+ 1)) & 0x1;
777 if (new_enabled
== old_enabled
) {
781 fp_port_enable(r
->fp_port
[i
]);
783 fp_port_disable(r
->fp_port
[i
]);
788 static void rocker_io_writel(void *opaque
, hwaddr addr
, uint32_t val
)
792 if (rocker_addr_is_desc_reg(r
, addr
)) {
793 unsigned index
= ROCKER_RING_INDEX(addr
);
794 unsigned offset
= addr
& ROCKER_DMA_DESC_MASK
;
797 case ROCKER_DMA_DESC_ADDR_OFFSET
:
798 r
->lower32
= (uint64_t)val
;
800 case ROCKER_DMA_DESC_ADDR_OFFSET
+ 4:
801 desc_ring_set_base_addr(r
->rings
[index
],
802 ((uint64_t)val
) << 32 | r
->lower32
);
805 case ROCKER_DMA_DESC_SIZE_OFFSET
:
806 desc_ring_set_size(r
->rings
[index
], val
);
808 case ROCKER_DMA_DESC_HEAD_OFFSET
:
809 if (desc_ring_set_head(r
->rings
[index
], val
)) {
810 rocker_msix_irq(r
, desc_ring_get_msix_vector(r
->rings
[index
]));
813 case ROCKER_DMA_DESC_CTRL_OFFSET
:
814 desc_ring_set_ctrl(r
->rings
[index
], val
);
816 case ROCKER_DMA_DESC_CREDITS_OFFSET
:
817 if (desc_ring_ret_credits(r
->rings
[index
], val
)) {
818 rocker_msix_irq(r
, desc_ring_get_msix_vector(r
->rings
[index
]));
822 DPRINTF("not implemented dma reg write(l) addr=0x" TARGET_FMT_plx
823 " val=0x%08x (ring %d, addr=0x%02x)\n",
824 addr
, val
, index
, offset
);
831 case ROCKER_TEST_REG
:
834 case ROCKER_TEST_REG64
:
835 case ROCKER_TEST_DMA_ADDR
:
836 case ROCKER_PORT_PHYS_ENABLE
:
837 r
->lower32
= (uint64_t)val
;
839 case ROCKER_TEST_REG64
+ 4:
840 r
->test_reg64
= ((uint64_t)val
) << 32 | r
->lower32
;
843 case ROCKER_TEST_IRQ
:
844 rocker_msix_irq(r
, val
);
846 case ROCKER_TEST_DMA_SIZE
:
847 r
->test_dma_size
= val
& 0xFFFF;
849 case ROCKER_TEST_DMA_ADDR
+ 4:
850 r
->test_dma_addr
= ((uint64_t)val
) << 32 | r
->lower32
;
853 case ROCKER_TEST_DMA_CTRL
:
854 rocker_test_dma_ctrl(r
, val
);
857 rocker_control(r
, val
);
859 case ROCKER_PORT_PHYS_ENABLE
+ 4:
860 rocker_port_phys_enable_write(r
, ((uint64_t)val
) << 32 | r
->lower32
);
864 DPRINTF("not implemented write(l) addr=0x" TARGET_FMT_plx
865 " val=0x%08x\n", addr
, val
);
870 static void rocker_io_writeq(void *opaque
, hwaddr addr
, uint64_t val
)
874 if (rocker_addr_is_desc_reg(r
, addr
)) {
875 unsigned index
= ROCKER_RING_INDEX(addr
);
876 unsigned offset
= addr
& ROCKER_DMA_DESC_MASK
;
879 case ROCKER_DMA_DESC_ADDR_OFFSET
:
880 desc_ring_set_base_addr(r
->rings
[index
], val
);
883 DPRINTF("not implemented dma reg write(q) addr=0x" TARGET_FMT_plx
884 " val=0x" TARGET_FMT_plx
" (ring %d, offset=0x%02x)\n",
885 addr
, val
, index
, offset
);
892 case ROCKER_TEST_REG64
:
895 case ROCKER_TEST_DMA_ADDR
:
896 r
->test_dma_addr
= val
;
898 case ROCKER_PORT_PHYS_ENABLE
:
899 rocker_port_phys_enable_write(r
, val
);
902 DPRINTF("not implemented write(q) addr=0x" TARGET_FMT_plx
903 " val=0x" TARGET_FMT_plx
"\n", addr
, val
);
909 #define regname(reg) case (reg): return #reg
910 static const char *rocker_reg_name(void *opaque
, hwaddr addr
)
914 if (rocker_addr_is_desc_reg(r
, addr
)) {
915 unsigned index
= ROCKER_RING_INDEX(addr
);
916 unsigned offset
= addr
& ROCKER_DMA_DESC_MASK
;
917 static char buf
[100];
922 sprintf(ring_name
, "cmd");
925 sprintf(ring_name
, "event");
928 sprintf(ring_name
, "%s-%d", index
% 2 ? "rx" : "tx",
933 case ROCKER_DMA_DESC_ADDR_OFFSET
:
934 sprintf(buf
, "Ring[%s] ADDR", ring_name
);
936 case ROCKER_DMA_DESC_ADDR_OFFSET
+4:
937 sprintf(buf
, "Ring[%s] ADDR+4", ring_name
);
939 case ROCKER_DMA_DESC_SIZE_OFFSET
:
940 sprintf(buf
, "Ring[%s] SIZE", ring_name
);
942 case ROCKER_DMA_DESC_HEAD_OFFSET
:
943 sprintf(buf
, "Ring[%s] HEAD", ring_name
);
945 case ROCKER_DMA_DESC_TAIL_OFFSET
:
946 sprintf(buf
, "Ring[%s] TAIL", ring_name
);
948 case ROCKER_DMA_DESC_CTRL_OFFSET
:
949 sprintf(buf
, "Ring[%s] CTRL", ring_name
);
951 case ROCKER_DMA_DESC_CREDITS_OFFSET
:
952 sprintf(buf
, "Ring[%s] CREDITS", ring_name
);
955 sprintf(buf
, "Ring[%s] ???", ring_name
);
960 regname(ROCKER_BOGUS_REG0
);
961 regname(ROCKER_BOGUS_REG1
);
962 regname(ROCKER_BOGUS_REG2
);
963 regname(ROCKER_BOGUS_REG3
);
964 regname(ROCKER_TEST_REG
);
965 regname(ROCKER_TEST_REG64
);
966 regname(ROCKER_TEST_REG64
+4);
967 regname(ROCKER_TEST_IRQ
);
968 regname(ROCKER_TEST_DMA_ADDR
);
969 regname(ROCKER_TEST_DMA_ADDR
+4);
970 regname(ROCKER_TEST_DMA_SIZE
);
971 regname(ROCKER_TEST_DMA_CTRL
);
972 regname(ROCKER_CONTROL
);
973 regname(ROCKER_PORT_PHYS_COUNT
);
974 regname(ROCKER_PORT_PHYS_LINK_STATUS
);
975 regname(ROCKER_PORT_PHYS_LINK_STATUS
+4);
976 regname(ROCKER_PORT_PHYS_ENABLE
);
977 regname(ROCKER_PORT_PHYS_ENABLE
+4);
978 regname(ROCKER_SWITCH_ID
);
979 regname(ROCKER_SWITCH_ID
+4);
985 static const char *rocker_reg_name(void *opaque
, hwaddr addr
)
991 static void rocker_mmio_write(void *opaque
, hwaddr addr
, uint64_t val
,
994 DPRINTF("Write %s addr " TARGET_FMT_plx
995 ", size %u, val " TARGET_FMT_plx
"\n",
996 rocker_reg_name(opaque
, addr
), addr
, size
, val
);
1000 rocker_io_writel(opaque
, addr
, val
);
1003 rocker_io_writeq(opaque
, addr
, val
);
1008 static uint64_t rocker_port_phys_link_status(Rocker
*r
)
1011 uint64_t status
= 0;
1013 for (i
= 0; i
< r
->fp_ports
; i
++) {
1014 FpPort
*port
= r
->fp_port
[i
];
1016 if (fp_port_get_link_up(port
)) {
1017 status
|= 1 << (i
+ 1);
1023 static uint64_t rocker_port_phys_enable_read(Rocker
*r
)
1028 for (i
= 0; i
< r
->fp_ports
; i
++) {
1029 FpPort
*port
= r
->fp_port
[i
];
1031 if (fp_port_enabled(port
)) {
1032 ret
|= 1 << (i
+ 1);
1038 static uint32_t rocker_io_readl(void *opaque
, hwaddr addr
)
1043 if (rocker_addr_is_desc_reg(r
, addr
)) {
1044 unsigned index
= ROCKER_RING_INDEX(addr
);
1045 unsigned offset
= addr
& ROCKER_DMA_DESC_MASK
;
1048 case ROCKER_DMA_DESC_ADDR_OFFSET
:
1049 ret
= (uint32_t)desc_ring_get_base_addr(r
->rings
[index
]);
1051 case ROCKER_DMA_DESC_ADDR_OFFSET
+ 4:
1052 ret
= (uint32_t)(desc_ring_get_base_addr(r
->rings
[index
]) >> 32);
1054 case ROCKER_DMA_DESC_SIZE_OFFSET
:
1055 ret
= desc_ring_get_size(r
->rings
[index
]);
1057 case ROCKER_DMA_DESC_HEAD_OFFSET
:
1058 ret
= desc_ring_get_head(r
->rings
[index
]);
1060 case ROCKER_DMA_DESC_TAIL_OFFSET
:
1061 ret
= desc_ring_get_tail(r
->rings
[index
]);
1063 case ROCKER_DMA_DESC_CREDITS_OFFSET
:
1064 ret
= desc_ring_get_credits(r
->rings
[index
]);
1067 DPRINTF("not implemented dma reg read(l) addr=0x" TARGET_FMT_plx
1068 " (ring %d, addr=0x%02x)\n", addr
, index
, offset
);
1076 case ROCKER_BOGUS_REG0
:
1077 case ROCKER_BOGUS_REG1
:
1078 case ROCKER_BOGUS_REG2
:
1079 case ROCKER_BOGUS_REG3
:
1082 case ROCKER_TEST_REG
:
1083 ret
= r
->test_reg
* 2;
1085 case ROCKER_TEST_REG64
:
1086 ret
= (uint32_t)(r
->test_reg64
* 2);
1088 case ROCKER_TEST_REG64
+ 4:
1089 ret
= (uint32_t)((r
->test_reg64
* 2) >> 32);
1091 case ROCKER_TEST_DMA_SIZE
:
1092 ret
= r
->test_dma_size
;
1094 case ROCKER_TEST_DMA_ADDR
:
1095 ret
= (uint32_t)r
->test_dma_addr
;
1097 case ROCKER_TEST_DMA_ADDR
+ 4:
1098 ret
= (uint32_t)(r
->test_dma_addr
>> 32);
1100 case ROCKER_PORT_PHYS_COUNT
:
1103 case ROCKER_PORT_PHYS_LINK_STATUS
:
1104 ret
= (uint32_t)rocker_port_phys_link_status(r
);
1106 case ROCKER_PORT_PHYS_LINK_STATUS
+ 4:
1107 ret
= (uint32_t)(rocker_port_phys_link_status(r
) >> 32);
1109 case ROCKER_PORT_PHYS_ENABLE
:
1110 ret
= (uint32_t)rocker_port_phys_enable_read(r
);
1112 case ROCKER_PORT_PHYS_ENABLE
+ 4:
1113 ret
= (uint32_t)(rocker_port_phys_enable_read(r
) >> 32);
1115 case ROCKER_SWITCH_ID
:
1116 ret
= (uint32_t)r
->switch_id
;
1118 case ROCKER_SWITCH_ID
+ 4:
1119 ret
= (uint32_t)(r
->switch_id
>> 32);
1122 DPRINTF("not implemented read(l) addr=0x" TARGET_FMT_plx
"\n", addr
);
1129 static uint64_t rocker_io_readq(void *opaque
, hwaddr addr
)
1134 if (rocker_addr_is_desc_reg(r
, addr
)) {
1135 unsigned index
= ROCKER_RING_INDEX(addr
);
1136 unsigned offset
= addr
& ROCKER_DMA_DESC_MASK
;
1138 switch (addr
& ROCKER_DMA_DESC_MASK
) {
1139 case ROCKER_DMA_DESC_ADDR_OFFSET
:
1140 ret
= desc_ring_get_base_addr(r
->rings
[index
]);
1143 DPRINTF("not implemented dma reg read(q) addr=0x" TARGET_FMT_plx
1144 " (ring %d, addr=0x%02x)\n", addr
, index
, offset
);
1152 case ROCKER_BOGUS_REG0
:
1153 case ROCKER_BOGUS_REG2
:
1154 ret
= 0xDEADBABEDEADBABEULL
;
1156 case ROCKER_TEST_REG64
:
1157 ret
= r
->test_reg64
* 2;
1159 case ROCKER_TEST_DMA_ADDR
:
1160 ret
= r
->test_dma_addr
;
1162 case ROCKER_PORT_PHYS_LINK_STATUS
:
1163 ret
= rocker_port_phys_link_status(r
);
1165 case ROCKER_PORT_PHYS_ENABLE
:
1166 ret
= rocker_port_phys_enable_read(r
);
1168 case ROCKER_SWITCH_ID
:
1172 DPRINTF("not implemented read(q) addr=0x" TARGET_FMT_plx
"\n", addr
);
1179 static uint64_t rocker_mmio_read(void *opaque
, hwaddr addr
, unsigned size
)
1181 DPRINTF("Read %s addr " TARGET_FMT_plx
", size %u\n",
1182 rocker_reg_name(opaque
, addr
), addr
, size
);
1186 return rocker_io_readl(opaque
, addr
);
1188 return rocker_io_readq(opaque
, addr
);
1194 static const MemoryRegionOps rocker_mmio_ops
= {
1195 .read
= rocker_mmio_read
,
1196 .write
= rocker_mmio_write
,
1197 .endianness
= DEVICE_LITTLE_ENDIAN
,
1199 .min_access_size
= 4,
1200 .max_access_size
= 8,
1203 .min_access_size
= 4,
1204 .max_access_size
= 8,
1208 static void rocker_msix_vectors_unuse(Rocker
*r
,
1209 unsigned int num_vectors
)
1211 PCIDevice
*dev
= PCI_DEVICE(r
);
1214 for (i
= 0; i
< num_vectors
; i
++) {
1215 msix_vector_unuse(dev
, i
);
1219 static int rocker_msix_vectors_use(Rocker
*r
,
1220 unsigned int num_vectors
)
1222 PCIDevice
*dev
= PCI_DEVICE(r
);
1226 for (i
= 0; i
< num_vectors
; i
++) {
1227 err
= msix_vector_use(dev
, i
);
1235 rocker_msix_vectors_unuse(r
, i
);
1239 static int rocker_msix_init(Rocker
*r
, Error
**errp
)
1241 PCIDevice
*dev
= PCI_DEVICE(r
);
1244 err
= msix_init(dev
, ROCKER_MSIX_VEC_COUNT(r
->fp_ports
),
1246 ROCKER_PCI_MSIX_BAR_IDX
, ROCKER_PCI_MSIX_TABLE_OFFSET
,
1248 ROCKER_PCI_MSIX_BAR_IDX
, ROCKER_PCI_MSIX_PBA_OFFSET
,
1254 err
= rocker_msix_vectors_use(r
, ROCKER_MSIX_VEC_COUNT(r
->fp_ports
));
1256 goto err_msix_vectors_use
;
1261 err_msix_vectors_use
:
1262 msix_uninit(dev
, &r
->msix_bar
, &r
->msix_bar
);
1266 static void rocker_msix_uninit(Rocker
*r
)
1268 PCIDevice
*dev
= PCI_DEVICE(r
);
1270 msix_uninit(dev
, &r
->msix_bar
, &r
->msix_bar
);
1271 rocker_msix_vectors_unuse(r
, ROCKER_MSIX_VEC_COUNT(r
->fp_ports
));
1274 static World
*rocker_world_type_by_name(Rocker
*r
, const char *name
)
1278 for (i
= 0; i
< ROCKER_WORLD_TYPE_MAX
; i
++) {
1279 if (strcmp(name
, world_name(r
->worlds
[i
])) == 0) {
1280 return r
->worlds
[i
];
1286 static void pci_rocker_realize(PCIDevice
*dev
, Error
**errp
)
1288 Rocker
*r
= ROCKER(dev
);
1289 const MACAddr zero
= { .a
= { 0, 0, 0, 0, 0, 0 } };
1290 const MACAddr dflt
= { .a
= { 0x52, 0x54, 0x00, 0x12, 0x35, 0x01 } };
1291 static int sw_index
;
1294 /* allocate worlds */
1296 r
->worlds
[ROCKER_WORLD_TYPE_OF_DPA
] = of_dpa_world_alloc(r
);
1298 if (!r
->world_name
) {
1299 r
->world_name
= g_strdup(world_name(r
->worlds
[ROCKER_WORLD_TYPE_OF_DPA
]));
1302 r
->world_dflt
= rocker_world_type_by_name(r
, r
->world_name
);
1303 if (!r
->world_dflt
) {
1305 "invalid argument requested world %s does not exist",
1307 goto err_world_type_by_name
;
1310 /* set up memory-mapped region at BAR0 */
1312 memory_region_init_io(&r
->mmio
, OBJECT(r
), &rocker_mmio_ops
, r
,
1313 "rocker-mmio", ROCKER_PCI_BAR0_SIZE
);
1314 pci_register_bar(dev
, ROCKER_PCI_BAR0_IDX
,
1315 PCI_BASE_ADDRESS_SPACE_MEMORY
, &r
->mmio
);
1317 /* set up memory-mapped region for MSI-X */
1319 memory_region_init(&r
->msix_bar
, OBJECT(r
), "rocker-msix-bar",
1320 ROCKER_PCI_MSIX_BAR_SIZE
);
1321 pci_register_bar(dev
, ROCKER_PCI_MSIX_BAR_IDX
,
1322 PCI_BASE_ADDRESS_SPACE_MEMORY
, &r
->msix_bar
);
1326 err
= rocker_msix_init(r
, errp
);
1331 /* validate switch properties */
1334 r
->name
= g_strdup(TYPE_ROCKER
);
1337 if (rocker_find(r
->name
)) {
1338 error_setg(errp
, "%s already exists", r
->name
);
1342 /* Rocker name is passed in port name requests to OS with the intention
1343 * that the name is used in interface names. Limit the length of the
1344 * rocker name to avoid naming problems in the OS. Also, adding the
1345 * port number as p# and unganged breakout b#, where # is at most 2
1346 * digits, so leave room for it too (-1 for string terminator, -3 for
1349 #define ROCKER_IFNAMSIZ 16
1350 #define MAX_ROCKER_NAME_LEN (ROCKER_IFNAMSIZ - 1 - 3 - 3)
1351 if (strlen(r
->name
) > MAX_ROCKER_NAME_LEN
) {
1353 "name too long; please shorten to at most %d chars",
1354 MAX_ROCKER_NAME_LEN
);
1355 goto err_name_too_long
;
1358 if (memcmp(&r
->fp_start_macaddr
, &zero
, sizeof(zero
)) == 0) {
1359 memcpy(&r
->fp_start_macaddr
, &dflt
, sizeof(dflt
));
1360 r
->fp_start_macaddr
.a
[4] += (sw_index
++);
1363 if (!r
->switch_id
) {
1364 memcpy(&r
->switch_id
, &r
->fp_start_macaddr
,
1365 sizeof(r
->fp_start_macaddr
));
1368 if (r
->fp_ports
> ROCKER_FP_PORTS_MAX
) {
1369 r
->fp_ports
= ROCKER_FP_PORTS_MAX
;
1372 r
->rings
= g_new(DescRing
*, rocker_pci_ring_count(r
));
1374 /* Rings are ordered like this:
1384 for (i
= 0; i
< rocker_pci_ring_count(r
); i
++) {
1385 DescRing
*ring
= desc_ring_alloc(r
, i
);
1387 if (i
== ROCKER_RING_CMD
) {
1388 desc_ring_set_consume(ring
, cmd_consume
, ROCKER_MSIX_VEC_CMD
);
1389 } else if (i
== ROCKER_RING_EVENT
) {
1390 desc_ring_set_consume(ring
, NULL
, ROCKER_MSIX_VEC_EVENT
);
1391 } else if (i
% 2 == 0) {
1392 desc_ring_set_consume(ring
, tx_consume
,
1393 ROCKER_MSIX_VEC_TX((i
- 2) / 2));
1394 } else if (i
% 2 == 1) {
1395 desc_ring_set_consume(ring
, NULL
, ROCKER_MSIX_VEC_RX((i
- 3) / 2));
1401 for (i
= 0; i
< r
->fp_ports
; i
++) {
1403 fp_port_alloc(r
, r
->name
, &r
->fp_start_macaddr
,
1404 i
, &r
->fp_ports_peers
[i
]);
1406 r
->fp_port
[i
] = port
;
1407 fp_port_set_world(port
, r
->world_dflt
);
1410 QLIST_INSERT_HEAD(&rockers
, r
, next
);
1416 rocker_msix_uninit(r
);
1418 object_unparent(OBJECT(&r
->msix_bar
));
1419 object_unparent(OBJECT(&r
->mmio
));
1420 err_world_type_by_name
:
1421 for (i
= 0; i
< ROCKER_WORLD_TYPE_MAX
; i
++) {
1423 world_free(r
->worlds
[i
]);
1428 static void pci_rocker_uninit(PCIDevice
*dev
)
1430 Rocker
*r
= ROCKER(dev
);
1433 QLIST_REMOVE(r
, next
);
1435 for (i
= 0; i
< r
->fp_ports
; i
++) {
1436 FpPort
*port
= r
->fp_port
[i
];
1439 r
->fp_port
[i
] = NULL
;
1442 for (i
= 0; i
< rocker_pci_ring_count(r
); i
++) {
1444 desc_ring_free(r
->rings
[i
]);
1449 rocker_msix_uninit(r
);
1450 object_unparent(OBJECT(&r
->msix_bar
));
1451 object_unparent(OBJECT(&r
->mmio
));
1453 for (i
= 0; i
< ROCKER_WORLD_TYPE_MAX
; i
++) {
1455 world_free(r
->worlds
[i
]);
1458 g_free(r
->fp_ports_peers
);
1461 static void rocker_reset(DeviceState
*dev
)
1463 Rocker
*r
= ROCKER(dev
);
1466 for (i
= 0; i
< ROCKER_WORLD_TYPE_MAX
; i
++) {
1468 world_reset(r
->worlds
[i
]);
1471 for (i
= 0; i
< r
->fp_ports
; i
++) {
1472 fp_port_reset(r
->fp_port
[i
]);
1473 fp_port_set_world(r
->fp_port
[i
], r
->world_dflt
);
1478 r
->test_dma_addr
= 0;
1479 r
->test_dma_size
= 0;
1481 for (i
= 0; i
< rocker_pci_ring_count(r
); i
++) {
1482 desc_ring_reset(r
->rings
[i
]);
1485 DPRINTF("Reset done\n");
1488 static Property rocker_properties
[] = {
1489 DEFINE_PROP_STRING("name", Rocker
, name
),
1490 DEFINE_PROP_STRING("world", Rocker
, world_name
),
1491 DEFINE_PROP_MACADDR("fp_start_macaddr", Rocker
,
1493 DEFINE_PROP_UINT64("switch_id", Rocker
,
1495 DEFINE_PROP_ARRAY("ports", Rocker
, fp_ports
,
1496 fp_ports_peers
, qdev_prop_netdev
, NICPeers
),
1497 DEFINE_PROP_END_OF_LIST(),
1500 static const VMStateDescription rocker_vmsd
= {
1501 .name
= TYPE_ROCKER
,
1505 static void rocker_class_init(ObjectClass
*klass
, void *data
)
1507 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1508 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1510 k
->realize
= pci_rocker_realize
;
1511 k
->exit
= pci_rocker_uninit
;
1512 k
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
1513 k
->device_id
= PCI_DEVICE_ID_REDHAT_ROCKER
;
1514 k
->revision
= ROCKER_PCI_REVISION
;
1515 k
->class_id
= PCI_CLASS_NETWORK_OTHER
;
1516 set_bit(DEVICE_CATEGORY_NETWORK
, dc
->categories
);
1517 dc
->desc
= "Rocker Switch";
1518 dc
->reset
= rocker_reset
;
1519 dc
->props
= rocker_properties
;
1520 dc
->vmsd
= &rocker_vmsd
;
1523 static const TypeInfo rocker_info
= {
1524 .name
= TYPE_ROCKER
,
1525 .parent
= TYPE_PCI_DEVICE
,
1526 .instance_size
= sizeof(Rocker
),
1527 .class_init
= rocker_class_init
,
1528 .interfaces
= (InterfaceInfo
[]) {
1529 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
1534 static void rocker_register_types(void)
1536 type_register_static(&rocker_info
);
1539 type_init(rocker_register_types
)