target-sparc/int64_helper.c

   1 /*
   2  * Sparc64 interrupt helpers
   3  *
   4  *  Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "cpu.h"
  22 #include "exec/helper-proto.h"
  23 #include "trace.h"
  24
  25 #define DEBUG_PCALL
  26
  27 #ifdef DEBUG_PCALL
  28 static const char * const excp_names[0x80] = {
  29     [TT_TFAULT] = "Instruction Access Fault",
  30     [TT_TMISS] = "Instruction Access MMU Miss",
  31     [TT_CODE_ACCESS] = "Instruction Access Error",
  32     [TT_ILL_INSN] = "Illegal Instruction",
  33     [TT_PRIV_INSN] = "Privileged Instruction",
  34     [TT_NFPU_INSN] = "FPU Disabled",
  35     [TT_FP_EXCP] = "FPU Exception",
  36     [TT_TOVF] = "Tag Overflow",
  37     [TT_CLRWIN] = "Clean Windows",
  38     [TT_DIV_ZERO] = "Division By Zero",
  39     [TT_DFAULT] = "Data Access Fault",
  40     [TT_DMISS] = "Data Access MMU Miss",
  41     [TT_DATA_ACCESS] = "Data Access Error",
  42     [TT_DPROT] = "Data Protection Error",
  43     [TT_UNALIGNED] = "Unaligned Memory Access",
  44     [TT_PRIV_ACT] = "Privileged Action",
  45     [TT_EXTINT | 0x1] = "External Interrupt 1",
  46     [TT_EXTINT | 0x2] = "External Interrupt 2",
  47     [TT_EXTINT | 0x3] = "External Interrupt 3",
  48     [TT_EXTINT | 0x4] = "External Interrupt 4",
  49     [TT_EXTINT | 0x5] = "External Interrupt 5",
  50     [TT_EXTINT | 0x6] = "External Interrupt 6",
  51     [TT_EXTINT | 0x7] = "External Interrupt 7",
  52     [TT_EXTINT | 0x8] = "External Interrupt 8",
  53     [TT_EXTINT | 0x9] = "External Interrupt 9",
  54     [TT_EXTINT | 0xa] = "External Interrupt 10",
  55     [TT_EXTINT | 0xb] = "External Interrupt 11",
  56     [TT_EXTINT | 0xc] = "External Interrupt 12",
  57     [TT_EXTINT | 0xd] = "External Interrupt 13",
  58     [TT_EXTINT | 0xe] = "External Interrupt 14",
  59     [TT_EXTINT | 0xf] = "External Interrupt 15",
  60 };
  61 #endif
  62
  63 void sparc_cpu_do_interrupt(CPUState *cs)
  64 {
  65     SPARCCPU *cpu = SPARC_CPU(cs);
  66     CPUSPARCState *env = &cpu->env;
  67     int intno = cs->exception_index;
  68     trap_state *tsptr;
  69
  70     /* Compute PSR before exposing state.  */
  71     if (env->cc_op != CC_OP_FLAGS) {
  72         cpu_get_psr(env);
  73     }
  74
  75 #ifdef DEBUG_PCALL
  76     if (qemu_loglevel_mask(CPU_LOG_INT)) {
  77         static int count;
  78         const char *name;
  79
  80         if (intno < 0 || intno >= 0x180) {
  81             name = "Unknown";
  82         } else if (intno >= 0x100) {
  83             name = "Trap Instruction";
  84         } else if (intno >= 0xc0) {
  85             name = "Window Fill";
  86         } else if (intno >= 0x80) {
  87             name = "Window Spill";
  88         } else {
  89             name = excp_names[intno];
  90             if (!name) {
  91                 name = "Unknown";
  92             }
  93         }
  94
  95         qemu_log("%6d: %s (v=%04x)\n", count, name, intno);
  96         log_cpu_state(cs, 0);
  97 #if 0
  98         {
  99             int i;
 100             uint8_t *ptr;
 101
 102             qemu_log("       code=");
 103             ptr = (uint8_t *)env->pc;
 104             for (i = 0; i < 16; i++) {
 105                 qemu_log(" %02x", ldub(ptr + i));
 106             }
 107             qemu_log("\n");
 108         }
 109 #endif
 110         count++;
 111     }
 112 #endif
 113 #if !defined(CONFIG_USER_ONLY)
 114     if (env->tl >= env->maxtl) {
 115         cpu_abort(cs, "Trap 0x%04x while trap level (%d) >= MAXTL (%d),"
 116                   " Error state", cs->exception_index, env->tl, env->maxtl);
 117         return;
 118     }
 119 #endif
 120     if (env->tl < env->maxtl - 1) {
 121         env->tl++;
 122     } else {
 123         env->pstate |= PS_RED;
 124         if (env->tl < env->maxtl) {
 125             env->tl++;
 126         }
 127     }
 128     tsptr = cpu_tsptr(env);
 129
 130     tsptr->tstate = (cpu_get_ccr(env) << 32) |
 131         ((env->asi & 0xff) << 24) | ((env->pstate & 0xf3f) << 8) |
 132         cpu_get_cwp64(env);
 133     tsptr->tpc = env->pc;
 134     tsptr->tnpc = env->npc;
 135     tsptr->tt = intno;
 136
 137     switch (intno) {
 138     case TT_IVEC:
 139         cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_IG);
 140         break;
 141     case TT_TFAULT:
 142     case TT_DFAULT:
 143     case TT_TMISS ... TT_TMISS + 3:
 144     case TT_DMISS ... TT_DMISS + 3:
 145     case TT_DPROT ... TT_DPROT + 3:
 146         cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_MG);
 147         break;
 148     default:
 149         cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_AG);
 150         break;
 151     }
 152
 153     if (intno == TT_CLRWIN) {
 154         cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - 1));
 155     } else if ((intno & 0x1c0) == TT_SPILL) {
 156         cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2));
 157     } else if ((intno & 0x1c0) == TT_FILL) {
 158         cpu_set_cwp(env, cpu_cwp_inc(env, env->cwp + 1));
 159     }
 160     env->tbr &= ~0x7fffULL;
 161     env->tbr |= ((env->tl > 1) ? 1 << 14 : 0) | (intno << 5);
 162     env->pc = env->tbr;
 163     env->npc = env->pc + 4;
 164     cs->exception_index = -1;
 165 }
 166
 167 trap_state *cpu_tsptr(CPUSPARCState* env)
 168 {
 169     return &env->ts[env->tl & MAXTL_MASK];
 170 }
 171
 172 static bool do_modify_softint(CPUSPARCState *env, uint32_t value)
 173 {
 174     if (env->softint != value) {
 175         env->softint = value;
 176 #if !defined(CONFIG_USER_ONLY)
 177         if (cpu_interrupts_enabled(env)) {
 178             cpu_check_irqs(env);
 179         }
 180 #endif
 181         return true;
 182     }
 183     return false;
 184 }
 185
 186 void helper_set_softint(CPUSPARCState *env, uint64_t value)
 187 {
 188     if (do_modify_softint(env, env->softint | (uint32_t)value)) {
 189         trace_int_helper_set_softint(env->softint);
 190     }
 191 }
 192
 193 void helper_clear_softint(CPUSPARCState *env, uint64_t value)
 194 {
 195     if (do_modify_softint(env, env->softint & (uint32_t)~value)) {
 196         trace_int_helper_clear_softint(env->softint);
 197     }
 198 }
 199
 200 void helper_write_softint(CPUSPARCState *env, uint64_t value)
 201 {
 202     if (do_modify_softint(env, (uint32_t)value)) {
 203         trace_int_helper_write_softint(env->softint);
 204     }
 205 }