fuzz: ignore address_space_map is_write flag
[qemu/ar7.git] / tests / qtest / fuzz / generic_fuzz.c
blobdeb74f15bedba60c6c10254e69d082ef56741e1e
1 /*
2 * Generic Virtual-Device Fuzzing Target
4 * Copyright Red Hat Inc., 2020
6 * Authors:
7 * Alexander Bulekov <alxndr@bu.edu>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
15 #include <wordexp.h>
17 #include "hw/core/cpu.h"
18 #include "tests/qtest/libqos/libqtest.h"
19 #include "tests/qtest/libqos/pci-pc.h"
20 #include "fuzz.h"
21 #include "fork_fuzz.h"
22 #include "exec/address-spaces.h"
23 #include "string.h"
24 #include "exec/memory.h"
25 #include "exec/ramblock.h"
26 #include "exec/address-spaces.h"
27 #include "hw/qdev-core.h"
28 #include "hw/pci/pci.h"
29 #include "hw/boards.h"
30 #include "generic_fuzz_configs.h"
33 * SEPARATOR is used to separate "operations" in the fuzz input
35 #define SEPARATOR "FUZZ"
37 enum cmds {
38 OP_IN,
39 OP_OUT,
40 OP_READ,
41 OP_WRITE,
42 OP_PCI_READ,
43 OP_PCI_WRITE,
44 OP_DISABLE_PCI,
45 OP_ADD_DMA_PATTERN,
46 OP_CLEAR_DMA_PATTERNS,
47 OP_CLOCK_STEP,
50 #define DEFAULT_TIMEOUT_US 100000
51 #define USEC_IN_SEC 1000000000
53 #define MAX_DMA_FILL_SIZE 0x10000
55 #define PCI_HOST_BRIDGE_CFG 0xcf8
56 #define PCI_HOST_BRIDGE_DATA 0xcfc
58 typedef struct {
59 ram_addr_t addr;
60 ram_addr_t size; /* The number of bytes until the end of the I/O region */
61 } address_range;
63 static useconds_t timeout = DEFAULT_TIMEOUT_US;
65 static bool qtest_log_enabled;
68 * A pattern used to populate a DMA region or perform a memwrite. This is
69 * useful for e.g. populating tables of unique addresses.
70 * Example {.index = 1; .stride = 2; .len = 3; .data = "\x00\x01\x02"}
71 * Renders as: 00 01 02 00 03 02 00 05 02 00 07 02 ...
73 typedef struct {
74 uint8_t index; /* Index of a byte to increment by stride */
75 uint8_t stride; /* Increment each index'th byte by this amount */
76 size_t len;
77 const uint8_t *data;
78 } pattern;
80 /* Avoid filling the same DMA region between MMIO/PIO commands ? */
81 static bool avoid_double_fetches;
83 static QTestState *qts_global; /* Need a global for the DMA callback */
86 * List of memory regions that are children of QOM objects specified by the
87 * user for fuzzing.
89 static GHashTable *fuzzable_memoryregions;
90 static GPtrArray *fuzzable_pci_devices;
92 struct get_io_cb_info {
93 int index;
94 int found;
95 address_range result;
98 static int get_io_address_cb(Int128 start, Int128 size,
99 const MemoryRegion *mr, void *opaque) {
100 struct get_io_cb_info *info = opaque;
101 if (g_hash_table_lookup(fuzzable_memoryregions, mr)) {
102 if (info->index == 0) {
103 info->result.addr = (ram_addr_t)start;
104 info->result.size = (ram_addr_t)size;
105 info->found = 1;
106 return 1;
108 info->index--;
110 return 0;
114 * List of dma regions populated since the last fuzzing command. Used to ensure
115 * that we only write to each DMA address once, to avoid race conditions when
116 * building reproducers.
118 static GArray *dma_regions;
120 static GArray *dma_patterns;
121 static int dma_pattern_index;
122 static bool pci_disabled;
125 * Allocate a block of memory and populate it with a pattern.
127 static void *pattern_alloc(pattern p, size_t len)
129 int i;
130 uint8_t *buf = g_malloc(len);
131 uint8_t sum = 0;
133 for (i = 0; i < len; ++i) {
134 buf[i] = p.data[i % p.len];
135 if ((i % p.len) == p.index) {
136 buf[i] += sum;
137 sum += p.stride;
140 return buf;
143 static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
145 unsigned access_size_max = mr->ops->valid.max_access_size;
148 * Regions are assumed to support 1-4 byte accesses unless
149 * otherwise specified.
151 if (access_size_max == 0) {
152 access_size_max = 4;
155 /* Bound the maximum access by the alignment of the address. */
156 if (!mr->ops->impl.unaligned) {
157 unsigned align_size_max = addr & -addr;
158 if (align_size_max != 0 && align_size_max < access_size_max) {
159 access_size_max = align_size_max;
163 /* Don't attempt accesses larger than the maximum. */
164 if (l > access_size_max) {
165 l = access_size_max;
167 l = pow2floor(l);
169 return l;
173 * Call-back for functions that perform DMA reads from guest memory. Confirm
174 * that the region has not already been populated since the last loop in
175 * generic_fuzz(), avoiding potential race-conditions, which we don't have
176 * a good way for reproducing right now.
178 void fuzz_dma_read_cb(size_t addr, size_t len, MemoryRegion *mr)
180 /* Are we in the generic-fuzzer or are we using another fuzz-target? */
181 if (!qts_global) {
182 return;
186 * Return immediately if:
187 * - We have no DMA patterns defined
188 * - The length of the DMA read request is zero
189 * - The DMA read is hitting an MR other than the machine's main RAM
190 * - The DMA request hits past the bounds of our RAM
192 if (dma_patterns->len == 0
193 || len == 0
194 || mr != current_machine->ram
195 || addr > current_machine->ram_size) {
196 return;
200 * If we overlap with any existing dma_regions, split the range and only
201 * populate the non-overlapping parts.
203 address_range region;
204 bool double_fetch = false;
205 for (int i = 0;
206 i < dma_regions->len && (avoid_double_fetches || qtest_log_enabled);
207 ++i) {
208 region = g_array_index(dma_regions, address_range, i);
209 if (addr < region.addr + region.size && addr + len > region.addr) {
210 double_fetch = true;
211 if (addr < region.addr
212 && avoid_double_fetches) {
213 fuzz_dma_read_cb(addr, region.addr - addr, mr);
215 if (addr + len > region.addr + region.size
216 && avoid_double_fetches) {
217 fuzz_dma_read_cb(region.addr + region.size,
218 addr + len - (region.addr + region.size), mr);
220 return;
224 /* Cap the length of the DMA access to something reasonable */
225 len = MIN(len, MAX_DMA_FILL_SIZE);
227 address_range ar = {addr, len};
228 g_array_append_val(dma_regions, ar);
229 pattern p = g_array_index(dma_patterns, pattern, dma_pattern_index);
230 void *buf_base = pattern_alloc(p, ar.size);
231 void *buf = buf_base;
232 hwaddr l, addr1;
233 MemoryRegion *mr1;
234 while (len > 0) {
235 l = len;
236 mr1 = address_space_translate(first_cpu->as,
237 addr, &addr1, &l, true,
238 MEMTXATTRS_UNSPECIFIED);
240 if (!(memory_region_is_ram(mr1) ||
241 memory_region_is_romd(mr1))) {
242 l = memory_access_size(mr1, l, addr1);
243 } else {
244 /* ROM/RAM case */
245 if (qtest_log_enabled) {
247 * With QTEST_LOG, use a normal, slow QTest memwrite. Prefix the log
248 * that will be written by qtest.c with a DMA tag, so we can reorder
249 * the resulting QTest trace so the DMA fills precede the last PIO/MMIO
250 * command.
252 fprintf(stderr, "[DMA] ");
253 if (double_fetch) {
254 fprintf(stderr, "[DOUBLE-FETCH] ");
256 fflush(stderr);
258 qtest_memwrite(qts_global, addr, buf, l);
260 len -= l;
261 buf += l;
262 addr += l;
265 g_free(buf_base);
267 /* Increment the index of the pattern for the next DMA access */
268 dma_pattern_index = (dma_pattern_index + 1) % dma_patterns->len;
272 * Here we want to convert a fuzzer-provided [io-region-index, offset] to
273 * a physical address. To do this, we iterate over all of the matched
274 * MemoryRegions. Check whether each region exists within the particular io
275 * space. Return the absolute address of the offset within the index'th region
276 * that is a subregion of the io_space and the distance until the end of the
277 * memory region.
279 static bool get_io_address(address_range *result, AddressSpace *as,
280 uint8_t index,
281 uint32_t offset) {
282 FlatView *view;
283 view = as->current_map;
284 g_assert(view);
285 struct get_io_cb_info cb_info = {};
287 cb_info.index = index;
290 * Loop around the FlatView until we match "index" number of
291 * fuzzable_memoryregions, or until we know that there are no matching
292 * memory_regions.
294 do {
295 flatview_for_each_range(view, get_io_address_cb , &cb_info);
296 } while (cb_info.index != index && !cb_info.found);
298 *result = cb_info.result;
299 if (result->size) {
300 offset = offset % result->size;
301 result->addr += offset;
302 result->size -= offset;
304 return cb_info.found;
307 static bool get_pio_address(address_range *result,
308 uint8_t index, uint16_t offset)
311 * PIO BARs can be set past the maximum port address (0xFFFF). Thus, result
312 * can contain an addr that extends past the PIO space. When we pass this
313 * address to qtest_in/qtest_out, it is cast to a uint16_t, so we might end
314 * up fuzzing a completely different MemoryRegion/Device. Therefore, check
315 * that the address here is within the PIO space limits.
317 bool found = get_io_address(result, &address_space_io, index, offset);
318 return result->addr <= 0xFFFF ? found : false;
321 static bool get_mmio_address(address_range *result,
322 uint8_t index, uint32_t offset)
324 return get_io_address(result, &address_space_memory, index, offset);
327 static void op_in(QTestState *s, const unsigned char * data, size_t len)
329 enum Sizes {Byte, Word, Long, end_sizes};
330 struct {
331 uint8_t size;
332 uint8_t base;
333 uint16_t offset;
334 } a;
335 address_range abs;
337 if (len < sizeof(a)) {
338 return;
340 memcpy(&a, data, sizeof(a));
341 if (get_pio_address(&abs, a.base, a.offset) == 0) {
342 return;
345 switch (a.size %= end_sizes) {
346 case Byte:
347 qtest_inb(s, abs.addr);
348 break;
349 case Word:
350 if (abs.size >= 2) {
351 qtest_inw(s, abs.addr);
353 break;
354 case Long:
355 if (abs.size >= 4) {
356 qtest_inl(s, abs.addr);
358 break;
362 static void op_out(QTestState *s, const unsigned char * data, size_t len)
364 enum Sizes {Byte, Word, Long, end_sizes};
365 struct {
366 uint8_t size;
367 uint8_t base;
368 uint16_t offset;
369 uint32_t value;
370 } a;
371 address_range abs;
373 if (len < sizeof(a)) {
374 return;
376 memcpy(&a, data, sizeof(a));
378 if (get_pio_address(&abs, a.base, a.offset) == 0) {
379 return;
382 switch (a.size %= end_sizes) {
383 case Byte:
384 qtest_outb(s, abs.addr, a.value & 0xFF);
385 break;
386 case Word:
387 if (abs.size >= 2) {
388 qtest_outw(s, abs.addr, a.value & 0xFFFF);
390 break;
391 case Long:
392 if (abs.size >= 4) {
393 qtest_outl(s, abs.addr, a.value);
395 break;
399 static void op_read(QTestState *s, const unsigned char * data, size_t len)
401 enum Sizes {Byte, Word, Long, Quad, end_sizes};
402 struct {
403 uint8_t size;
404 uint8_t base;
405 uint32_t offset;
406 } a;
407 address_range abs;
409 if (len < sizeof(a)) {
410 return;
412 memcpy(&a, data, sizeof(a));
414 if (get_mmio_address(&abs, a.base, a.offset) == 0) {
415 return;
418 switch (a.size %= end_sizes) {
419 case Byte:
420 qtest_readb(s, abs.addr);
421 break;
422 case Word:
423 if (abs.size >= 2) {
424 qtest_readw(s, abs.addr);
426 break;
427 case Long:
428 if (abs.size >= 4) {
429 qtest_readl(s, abs.addr);
431 break;
432 case Quad:
433 if (abs.size >= 8) {
434 qtest_readq(s, abs.addr);
436 break;
440 static void op_write(QTestState *s, const unsigned char * data, size_t len)
442 enum Sizes {Byte, Word, Long, Quad, end_sizes};
443 struct {
444 uint8_t size;
445 uint8_t base;
446 uint32_t offset;
447 uint64_t value;
448 } a;
449 address_range abs;
451 if (len < sizeof(a)) {
452 return;
454 memcpy(&a, data, sizeof(a));
456 if (get_mmio_address(&abs, a.base, a.offset) == 0) {
457 return;
460 switch (a.size %= end_sizes) {
461 case Byte:
462 qtest_writeb(s, abs.addr, a.value & 0xFF);
463 break;
464 case Word:
465 if (abs.size >= 2) {
466 qtest_writew(s, abs.addr, a.value & 0xFFFF);
468 break;
469 case Long:
470 if (abs.size >= 4) {
471 qtest_writel(s, abs.addr, a.value & 0xFFFFFFFF);
473 break;
474 case Quad:
475 if (abs.size >= 8) {
476 qtest_writeq(s, abs.addr, a.value);
478 break;
482 static void op_pci_read(QTestState *s, const unsigned char * data, size_t len)
484 enum Sizes {Byte, Word, Long, end_sizes};
485 struct {
486 uint8_t size;
487 uint8_t base;
488 uint8_t offset;
489 } a;
490 if (len < sizeof(a) || fuzzable_pci_devices->len == 0 || pci_disabled) {
491 return;
493 memcpy(&a, data, sizeof(a));
494 PCIDevice *dev = g_ptr_array_index(fuzzable_pci_devices,
495 a.base % fuzzable_pci_devices->len);
496 int devfn = dev->devfn;
497 qtest_outl(s, PCI_HOST_BRIDGE_CFG, (1U << 31) | (devfn << 8) | a.offset);
498 switch (a.size %= end_sizes) {
499 case Byte:
500 qtest_inb(s, PCI_HOST_BRIDGE_DATA);
501 break;
502 case Word:
503 qtest_inw(s, PCI_HOST_BRIDGE_DATA);
504 break;
505 case Long:
506 qtest_inl(s, PCI_HOST_BRIDGE_DATA);
507 break;
511 static void op_pci_write(QTestState *s, const unsigned char * data, size_t len)
513 enum Sizes {Byte, Word, Long, end_sizes};
514 struct {
515 uint8_t size;
516 uint8_t base;
517 uint8_t offset;
518 uint32_t value;
519 } a;
520 if (len < sizeof(a) || fuzzable_pci_devices->len == 0 || pci_disabled) {
521 return;
523 memcpy(&a, data, sizeof(a));
524 PCIDevice *dev = g_ptr_array_index(fuzzable_pci_devices,
525 a.base % fuzzable_pci_devices->len);
526 int devfn = dev->devfn;
527 qtest_outl(s, PCI_HOST_BRIDGE_CFG, (1U << 31) | (devfn << 8) | a.offset);
528 switch (a.size %= end_sizes) {
529 case Byte:
530 qtest_outb(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFF);
531 break;
532 case Word:
533 qtest_outw(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFFFF);
534 break;
535 case Long:
536 qtest_outl(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFFFFFFFF);
537 break;
541 static void op_add_dma_pattern(QTestState *s,
542 const unsigned char *data, size_t len)
544 struct {
546 * index and stride can be used to increment the index-th byte of the
547 * pattern by the value stride, for each loop of the pattern.
549 uint8_t index;
550 uint8_t stride;
551 } a;
553 if (len < sizeof(a) + 1) {
554 return;
556 memcpy(&a, data, sizeof(a));
557 pattern p = {a.index, a.stride, len - sizeof(a), data + sizeof(a)};
558 p.index = a.index % p.len;
559 g_array_append_val(dma_patterns, p);
560 return;
563 static void op_clear_dma_patterns(QTestState *s,
564 const unsigned char *data, size_t len)
566 g_array_set_size(dma_patterns, 0);
567 dma_pattern_index = 0;
570 static void op_clock_step(QTestState *s, const unsigned char *data, size_t len)
572 qtest_clock_step_next(s);
575 static void op_disable_pci(QTestState *s, const unsigned char *data, size_t len)
577 pci_disabled = true;
580 static void handle_timeout(int sig)
582 if (qtest_log_enabled) {
583 fprintf(stderr, "[Timeout]\n");
584 fflush(stderr);
586 _Exit(0);
590 * Here, we interpret random bytes from the fuzzer, as a sequence of commands.
591 * Some commands can be variable-width, so we use a separator, SEPARATOR, to
592 * specify the boundaries between commands. SEPARATOR is used to separate
593 * "operations" in the fuzz input. Why use a separator, instead of just using
594 * the operations' length to identify operation boundaries?
595 * 1. This is a simple way to support variable-length operations
596 * 2. This adds "stability" to the input.
597 * For example take the input "AbBcgDefg", where there is no separator and
598 * Opcodes are capitalized.
599 * Simply, by removing the first byte, we end up with a very different
600 * sequence:
601 * BbcGdefg...
602 * By adding a separator, we avoid this problem:
603 * Ab SEP Bcg SEP Defg -> B SEP Bcg SEP Defg
604 * Since B uses two additional bytes as operands, the first "B" will be
605 * ignored. The fuzzer actively tries to reduce inputs, so such unused
606 * bytes are likely to be pruned, eventually.
608 * SEPARATOR is trivial for the fuzzer to discover when using ASan. Optionally,
609 * SEPARATOR can be manually specified as a dictionary value (see libfuzzer's
610 * -dict), though this should not be necessary.
612 * As a result, the stream of bytes is converted into a sequence of commands.
613 * In a simplified example where SEPARATOR is 0xFF:
614 * 00 01 02 FF 03 04 05 06 FF 01 FF ...
615 * becomes this sequence of commands:
616 * 00 01 02 -> op00 (0102) -> in (0102, 2)
617 * 03 04 05 06 -> op03 (040506) -> write (040506, 3)
618 * 01 -> op01 (-,0) -> out (-,0)
619 * ...
621 * Note here that it is the job of the individual opcode functions to check
622 * that enough data was provided. I.e. in the last command out (,0), out needs
623 * to check that there is not enough data provided to select an address/value
624 * for the operation.
626 static void generic_fuzz(QTestState *s, const unsigned char *Data, size_t Size)
628 void (*ops[]) (QTestState *s, const unsigned char* , size_t) = {
629 [OP_IN] = op_in,
630 [OP_OUT] = op_out,
631 [OP_READ] = op_read,
632 [OP_WRITE] = op_write,
633 [OP_PCI_READ] = op_pci_read,
634 [OP_PCI_WRITE] = op_pci_write,
635 [OP_DISABLE_PCI] = op_disable_pci,
636 [OP_ADD_DMA_PATTERN] = op_add_dma_pattern,
637 [OP_CLEAR_DMA_PATTERNS] = op_clear_dma_patterns,
638 [OP_CLOCK_STEP] = op_clock_step,
640 const unsigned char *cmd = Data;
641 const unsigned char *nextcmd;
642 size_t cmd_len;
643 uint8_t op;
645 if (fork() == 0) {
647 * Sometimes the fuzzer will find inputs that take quite a long time to
648 * process. Often times, these inputs do not result in new coverage.
649 * Even if these inputs might be interesting, they can slow down the
650 * fuzzer, overall. Set a timeout to avoid hurting performance, too much
652 if (timeout) {
653 struct sigaction sact;
654 struct itimerval timer;
656 sigemptyset(&sact.sa_mask);
657 sact.sa_flags = SA_NODEFER;
658 sact.sa_handler = handle_timeout;
659 sigaction(SIGALRM, &sact, NULL);
661 memset(&timer, 0, sizeof(timer));
662 timer.it_value.tv_sec = timeout / USEC_IN_SEC;
663 timer.it_value.tv_usec = timeout % USEC_IN_SEC;
664 setitimer(ITIMER_VIRTUAL, &timer, NULL);
667 op_clear_dma_patterns(s, NULL, 0);
668 pci_disabled = false;
670 while (cmd && Size) {
671 /* Get the length until the next command or end of input */
672 nextcmd = memmem(cmd, Size, SEPARATOR, strlen(SEPARATOR));
673 cmd_len = nextcmd ? nextcmd - cmd : Size;
675 if (cmd_len > 0) {
676 /* Interpret the first byte of the command as an opcode */
677 op = *cmd % (sizeof(ops) / sizeof((ops)[0]));
678 ops[op](s, cmd + 1, cmd_len - 1);
680 /* Run the main loop */
681 flush_events(s);
683 /* Advance to the next command */
684 cmd = nextcmd ? nextcmd + sizeof(SEPARATOR) - 1 : nextcmd;
685 Size = Size - (cmd_len + sizeof(SEPARATOR) - 1);
686 g_array_set_size(dma_regions, 0);
688 _Exit(0);
689 } else {
690 flush_events(s);
691 wait(0);
695 static void usage(void)
697 printf("Please specify the following environment variables:\n");
698 printf("QEMU_FUZZ_ARGS= the command line arguments passed to qemu\n");
699 printf("QEMU_FUZZ_OBJECTS= "
700 "a space separated list of QOM type names for objects to fuzz\n");
701 printf("Optionally: QEMU_AVOID_DOUBLE_FETCH= "
702 "Try to avoid racy DMA double fetch bugs? %d by default\n",
703 avoid_double_fetches);
704 printf("Optionally: QEMU_FUZZ_TIMEOUT= Specify a custom timeout (us). "
705 "0 to disable. %d by default\n", timeout);
706 exit(0);
709 static int locate_fuzz_memory_regions(Object *child, void *opaque)
711 const char *name;
712 MemoryRegion *mr;
713 if (object_dynamic_cast(child, TYPE_MEMORY_REGION)) {
714 mr = MEMORY_REGION(child);
715 if ((memory_region_is_ram(mr) ||
716 memory_region_is_ram_device(mr) ||
717 memory_region_is_rom(mr)) == false) {
718 name = object_get_canonical_path_component(child);
720 * We don't want duplicate pointers to the same MemoryRegion, so
721 * try to remove copies of the pointer, before adding it.
723 g_hash_table_insert(fuzzable_memoryregions, mr, (gpointer)true);
726 return 0;
729 static int locate_fuzz_objects(Object *child, void *opaque)
731 char *pattern = opaque;
732 if (g_pattern_match_simple(pattern, object_get_typename(child))) {
733 /* Find and save ptrs to any child MemoryRegions */
734 object_child_foreach_recursive(child, locate_fuzz_memory_regions, NULL);
737 * We matched an object. If its a PCI device, store a pointer to it so
738 * we can map BARs and fuzz its config space.
740 if (object_dynamic_cast(OBJECT(child), TYPE_PCI_DEVICE)) {
742 * Don't want duplicate pointers to the same PCIDevice, so remove
743 * copies of the pointer, before adding it.
745 g_ptr_array_remove_fast(fuzzable_pci_devices, PCI_DEVICE(child));
746 g_ptr_array_add(fuzzable_pci_devices, PCI_DEVICE(child));
748 } else if (object_dynamic_cast(OBJECT(child), TYPE_MEMORY_REGION)) {
749 if (g_pattern_match_simple(pattern,
750 object_get_canonical_path_component(child))) {
751 MemoryRegion *mr;
752 mr = MEMORY_REGION(child);
753 if ((memory_region_is_ram(mr) ||
754 memory_region_is_ram_device(mr) ||
755 memory_region_is_rom(mr)) == false) {
756 g_hash_table_insert(fuzzable_memoryregions, mr, (gpointer)true);
760 return 0;
764 static void pci_enum(gpointer pcidev, gpointer bus)
766 PCIDevice *dev = pcidev;
767 QPCIDevice *qdev;
768 int i;
770 qdev = qpci_device_find(bus, dev->devfn);
771 g_assert(qdev != NULL);
772 for (i = 0; i < 6; i++) {
773 if (dev->io_regions[i].size) {
774 qpci_iomap(qdev, i, NULL);
777 qpci_device_enable(qdev);
778 g_free(qdev);
781 static void generic_pre_fuzz(QTestState *s)
783 GHashTableIter iter;
784 MemoryRegion *mr;
785 QPCIBus *pcibus;
786 char **result;
788 if (!getenv("QEMU_FUZZ_OBJECTS")) {
789 usage();
791 if (getenv("QTEST_LOG")) {
792 qtest_log_enabled = 1;
794 if (getenv("QEMU_AVOID_DOUBLE_FETCH")) {
795 avoid_double_fetches = 1;
797 if (getenv("QEMU_FUZZ_TIMEOUT")) {
798 timeout = g_ascii_strtoll(getenv("QEMU_FUZZ_TIMEOUT"), NULL, 0);
800 qts_global = s;
802 dma_regions = g_array_new(false, false, sizeof(address_range));
803 dma_patterns = g_array_new(false, false, sizeof(pattern));
805 fuzzable_memoryregions = g_hash_table_new(NULL, NULL);
806 fuzzable_pci_devices = g_ptr_array_new();
808 result = g_strsplit(getenv("QEMU_FUZZ_OBJECTS"), " ", -1);
809 for (int i = 0; result[i] != NULL; i++) {
810 printf("Matching objects by name %s\n", result[i]);
811 object_child_foreach_recursive(qdev_get_machine(),
812 locate_fuzz_objects,
813 result[i]);
815 g_strfreev(result);
816 printf("This process will try to fuzz the following MemoryRegions:\n");
818 g_hash_table_iter_init(&iter, fuzzable_memoryregions);
819 while (g_hash_table_iter_next(&iter, (gpointer)&mr, NULL)) {
820 printf(" * %s (size %lx)\n",
821 object_get_canonical_path_component(&(mr->parent_obj)),
822 (uint64_t)mr->size);
825 if (!g_hash_table_size(fuzzable_memoryregions)) {
826 printf("No fuzzable memory regions found...\n");
827 exit(1);
830 pcibus = qpci_new_pc(s, NULL);
831 g_ptr_array_foreach(fuzzable_pci_devices, pci_enum, pcibus);
832 qpci_free_pc(pcibus);
834 counter_shm_init();
838 * When libfuzzer gives us two inputs to combine, return a new input with the
839 * following structure:
841 * Input 1 (data1)
842 * SEPARATOR
843 * Clear out the DMA Patterns
844 * SEPARATOR
845 * Disable the pci_read/write instructions
846 * SEPARATOR
847 * Input 2 (data2)
849 * The idea is to collate the core behaviors of the two inputs.
850 * For example:
851 * Input 1: maps a device's BARs, sets up three DMA patterns, and triggers
852 * device functionality A
853 * Input 2: maps a device's BARs, sets up one DMA pattern, and triggers device
854 * functionality B
856 * This function attempts to produce an input that:
857 * Ouptut: maps a device's BARs, set up three DMA patterns, triggers
858 * functionality A device, replaces the DMA patterns with a single
859 * patten, and triggers device functionality B.
861 static size_t generic_fuzz_crossover(const uint8_t *data1, size_t size1, const
862 uint8_t *data2, size_t size2, uint8_t *out,
863 size_t max_out_size, unsigned int seed)
865 size_t copy_len = 0, size = 0;
867 /* Check that we have enough space for data1 and at least part of data2 */
868 if (max_out_size <= size1 + strlen(SEPARATOR) * 3 + 2) {
869 return 0;
872 /* Copy_Len in the first input */
873 copy_len = size1;
874 memcpy(out + size, data1, copy_len);
875 size += copy_len;
876 max_out_size -= copy_len;
878 /* Append a separator */
879 copy_len = strlen(SEPARATOR);
880 memcpy(out + size, SEPARATOR, copy_len);
881 size += copy_len;
882 max_out_size -= copy_len;
884 /* Clear out the DMA Patterns */
885 copy_len = 1;
886 if (copy_len) {
887 out[size] = OP_CLEAR_DMA_PATTERNS;
889 size += copy_len;
890 max_out_size -= copy_len;
892 /* Append a separator */
893 copy_len = strlen(SEPARATOR);
894 memcpy(out + size, SEPARATOR, copy_len);
895 size += copy_len;
896 max_out_size -= copy_len;
898 /* Disable PCI ops. Assume data1 took care of setting up PCI */
899 copy_len = 1;
900 if (copy_len) {
901 out[size] = OP_DISABLE_PCI;
903 size += copy_len;
904 max_out_size -= copy_len;
906 /* Append a separator */
907 copy_len = strlen(SEPARATOR);
908 memcpy(out + size, SEPARATOR, copy_len);
909 size += copy_len;
910 max_out_size -= copy_len;
912 /* Copy_Len over the second input */
913 copy_len = MIN(size2, max_out_size);
914 memcpy(out + size, data2, copy_len);
915 size += copy_len;
916 max_out_size -= copy_len;
918 return size;
922 static GString *generic_fuzz_cmdline(FuzzTarget *t)
924 GString *cmd_line = g_string_new(TARGET_NAME);
925 if (!getenv("QEMU_FUZZ_ARGS")) {
926 usage();
928 g_string_append_printf(cmd_line, " -display none \
929 -machine accel=qtest, \
930 -m 512M %s ", getenv("QEMU_FUZZ_ARGS"));
931 return cmd_line;
934 static GString *generic_fuzz_predefined_config_cmdline(FuzzTarget *t)
936 const generic_fuzz_config *config;
937 g_assert(t->opaque);
939 config = t->opaque;
940 setenv("QEMU_AVOID_DOUBLE_FETCH", "1", 1);
941 setenv("QEMU_FUZZ_ARGS", config->args, 1);
942 setenv("QEMU_FUZZ_OBJECTS", config->objects, 1);
943 return generic_fuzz_cmdline(t);
946 static void register_generic_fuzz_targets(void)
948 fuzz_add_target(&(FuzzTarget){
949 .name = "generic-fuzz",
950 .description = "Fuzz based on any qemu command-line args. ",
951 .get_init_cmdline = generic_fuzz_cmdline,
952 .pre_fuzz = generic_pre_fuzz,
953 .fuzz = generic_fuzz,
954 .crossover = generic_fuzz_crossover
957 GString *name;
958 const generic_fuzz_config *config;
960 for (int i = 0;
961 i < sizeof(predefined_configs) / sizeof(generic_fuzz_config);
962 i++) {
963 config = predefined_configs + i;
964 name = g_string_new("generic-fuzz");
965 g_string_append_printf(name, "-%s", config->name);
966 fuzz_add_target(&(FuzzTarget){
967 .name = name->str,
968 .description = "Predefined generic-fuzz config.",
969 .get_init_cmdline = generic_fuzz_predefined_config_cmdline,
970 .pre_fuzz = generic_pre_fuzz,
971 .fuzz = generic_fuzz,
972 .crossover = generic_fuzz_crossover,
973 .opaque = (void *)config
978 fuzz_target_init(register_generic_fuzz_targets);