2 * NVDIMM ACPI Implementation
4 * Copyright(C) 2015 Intel Corporation.
7 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
9 * NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)
10 * and the DSM specification can be found at:
11 * http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf
13 * Currently, it only supports PMEM Virtualization.
15 * This library is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU Lesser General Public
17 * License as published by the Free Software Foundation; either
18 * version 2 of the License, or (at your option) any later version.
20 * This library is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
23 * Lesser General Public License for more details.
25 * You should have received a copy of the GNU Lesser General Public
26 * License along with this library; if not, see <http://www.gnu.org/licenses/>
29 #include "qemu/osdep.h"
30 #include "hw/acpi/acpi.h"
31 #include "hw/acpi/aml-build.h"
32 #include "hw/acpi/bios-linker-loader.h"
33 #include "hw/nvram/fw_cfg.h"
34 #include "hw/mem/nvdimm.h"
35 #include "qemu/nvdimm-utils.h"
37 #define NVDIMM_UUID_LE(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
38 { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
39 (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, \
40 (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }
43 * define Byte Addressable Persistent Memory (PM) Region according to
44 * ACPI 6.0: 5.2.25.1 System Physical Address Range Structure.
46 static const uint8_t nvdimm_nfit_spa_uuid
[] =
47 NVDIMM_UUID_LE(0x66f0d379, 0xb4f3, 0x4074, 0xac, 0x43, 0x0d, 0x33,
48 0x18, 0xb7, 0x8c, 0xdb);
51 * NVDIMM Firmware Interface Table
54 * It provides information that allows OSPM to enumerate NVDIMM present in
55 * the platform and associate system physical address ranges created by the
58 * It is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)
60 struct NvdimmNfitHeader
{
64 typedef struct NvdimmNfitHeader NvdimmNfitHeader
;
67 * define NFIT structures according to ACPI 6.0: 5.2.25 NVDIMM Firmware
68 * Interface Table (NFIT).
72 * System Physical Address Range Structure
74 * It describes the system physical address ranges occupied by NVDIMMs and
75 * the types of the regions.
77 struct NvdimmNfitSpa
{
83 uint32_t proximity_domain
;
84 uint8_t type_guid
[16];
89 typedef struct NvdimmNfitSpa NvdimmNfitSpa
;
92 * Memory Device to System Physical Address Range Mapping Structure
94 * It enables identifying each NVDIMM region and the corresponding SPA
95 * describing the memory interleave
97 struct NvdimmNfitMemDev
{
100 uint32_t nfit_handle
;
106 uint64_t region_offset
;
108 uint16_t interleave_index
;
109 uint16_t interleave_ways
;
113 typedef struct NvdimmNfitMemDev NvdimmNfitMemDev
;
115 #define ACPI_NFIT_MEM_NOT_ARMED (1 << 3)
118 * NVDIMM Control Region Structure
120 * It describes the NVDIMM and if applicable, Block Control Window.
122 struct NvdimmNfitControlRegion
{
128 uint16_t revision_id
;
129 uint16_t sub_vendor_id
;
130 uint16_t sub_device_id
;
131 uint16_t sub_revision_id
;
133 uint32_t serial_number
;
139 uint64_t status_offset
;
140 uint64_t status_size
;
142 uint8_t reserved2
[6];
144 typedef struct NvdimmNfitControlRegion NvdimmNfitControlRegion
;
147 * NVDIMM Platform Capabilities Structure
149 * Defined in section 5.2.25.9 of ACPI 6.2 Errata A, September 2017
151 struct NvdimmNfitPlatformCaps
{
156 uint32_t capabilities
;
157 uint8_t reserved2
[4];
159 typedef struct NvdimmNfitPlatformCaps NvdimmNfitPlatformCaps
;
162 * Module serial number is a unique number for each device. We use the
163 * slot id of NVDIMM device to generate this number so that each device
164 * associates with a different number.
166 * 0x123456 is a magic number we arbitrarily chose.
168 static uint32_t nvdimm_slot_to_sn(int slot
)
170 return 0x123456 + slot
;
174 * handle is used to uniquely associate nfit_memdev structure with NVDIMM
175 * ACPI device - nfit_memdev.nfit_handle matches with the value returned
176 * by ACPI device _ADR method.
178 * We generate the handle with the slot id of NVDIMM device and reserve
179 * 0 for NVDIMM root device.
181 static uint32_t nvdimm_slot_to_handle(int slot
)
187 * index uniquely identifies the structure, 0 is reserved which indicates
188 * that the structure is not valid or the associated structure is not
191 * Each NVDIMM device needs two indexes, one for nfit_spa and another for
192 * nfit_dc which are generated by the slot id of NVDIMM device.
194 static uint16_t nvdimm_slot_to_spa_index(int slot
)
196 return (slot
+ 1) << 1;
199 /* See the comments of nvdimm_slot_to_spa_index(). */
200 static uint32_t nvdimm_slot_to_dcr_index(int slot
)
202 return nvdimm_slot_to_spa_index(slot
) + 1;
205 static NVDIMMDevice
*nvdimm_get_device_by_handle(uint32_t handle
)
207 NVDIMMDevice
*nvdimm
= NULL
;
208 GSList
*list
, *device_list
= nvdimm_get_device_list();
210 for (list
= device_list
; list
; list
= list
->next
) {
211 NVDIMMDevice
*nvd
= list
->data
;
212 int slot
= object_property_get_int(OBJECT(nvd
), PC_DIMM_SLOT_PROP
,
215 if (nvdimm_slot_to_handle(slot
) == handle
) {
221 g_slist_free(device_list
);
225 /* ACPI 6.0: 5.2.25.1 System Physical Address Range Structure */
227 nvdimm_build_structure_spa(GArray
*structures
, DeviceState
*dev
)
229 NvdimmNfitSpa
*nfit_spa
;
230 uint64_t addr
= object_property_get_uint(OBJECT(dev
), PC_DIMM_ADDR_PROP
,
232 uint64_t size
= object_property_get_uint(OBJECT(dev
), PC_DIMM_SIZE_PROP
,
234 uint32_t node
= object_property_get_uint(OBJECT(dev
), PC_DIMM_NODE_PROP
,
236 int slot
= object_property_get_int(OBJECT(dev
), PC_DIMM_SLOT_PROP
,
239 nfit_spa
= acpi_data_push(structures
, sizeof(*nfit_spa
));
241 nfit_spa
->type
= cpu_to_le16(0 /* System Physical Address Range
243 nfit_spa
->length
= cpu_to_le16(sizeof(*nfit_spa
));
244 nfit_spa
->spa_index
= cpu_to_le16(nvdimm_slot_to_spa_index(slot
));
247 * Control region is strict as all the device info, such as SN, index,
248 * is associated with slot id.
250 nfit_spa
->flags
= cpu_to_le16(1 /* Control region is strictly for
251 management during hot add/online
253 2 /* Data in Proximity Domain field is
257 nfit_spa
->proximity_domain
= cpu_to_le32(node
);
258 /* the region reported as PMEM. */
259 memcpy(nfit_spa
->type_guid
, nvdimm_nfit_spa_uuid
,
260 sizeof(nvdimm_nfit_spa_uuid
));
262 nfit_spa
->spa_base
= cpu_to_le64(addr
);
263 nfit_spa
->spa_length
= cpu_to_le64(size
);
265 /* It is the PMEM and can be cached as writeback. */
266 nfit_spa
->mem_attr
= cpu_to_le64(0x8ULL
/* EFI_MEMORY_WB */ |
267 0x8000ULL
/* EFI_MEMORY_NV */);
271 * ACPI 6.0: 5.2.25.2 Memory Device to System Physical Address Range Mapping
275 nvdimm_build_structure_memdev(GArray
*structures
, DeviceState
*dev
)
277 NvdimmNfitMemDev
*nfit_memdev
;
278 NVDIMMDevice
*nvdimm
= NVDIMM(OBJECT(dev
));
279 uint64_t size
= object_property_get_uint(OBJECT(dev
), PC_DIMM_SIZE_PROP
,
281 int slot
= object_property_get_int(OBJECT(dev
), PC_DIMM_SLOT_PROP
,
283 uint32_t handle
= nvdimm_slot_to_handle(slot
);
285 nfit_memdev
= acpi_data_push(structures
, sizeof(*nfit_memdev
));
287 nfit_memdev
->type
= cpu_to_le16(1 /* Memory Device to System Address
288 Range Map Structure*/);
289 nfit_memdev
->length
= cpu_to_le16(sizeof(*nfit_memdev
));
290 nfit_memdev
->nfit_handle
= cpu_to_le32(handle
);
293 * associate memory device with System Physical Address Range
296 nfit_memdev
->spa_index
= cpu_to_le16(nvdimm_slot_to_spa_index(slot
));
297 /* associate memory device with Control Region Structure. */
298 nfit_memdev
->dcr_index
= cpu_to_le16(nvdimm_slot_to_dcr_index(slot
));
300 /* The memory region on the device. */
301 nfit_memdev
->region_len
= cpu_to_le64(size
);
302 /* The device address starts from 0. */
303 nfit_memdev
->region_dpa
= cpu_to_le64(0);
305 /* Only one interleave for PMEM. */
306 nfit_memdev
->interleave_ways
= cpu_to_le16(1);
308 if (nvdimm
->unarmed
) {
309 nfit_memdev
->flags
|= cpu_to_le16(ACPI_NFIT_MEM_NOT_ARMED
);
314 * ACPI 6.0: 5.2.25.5 NVDIMM Control Region Structure.
316 static void nvdimm_build_structure_dcr(GArray
*structures
, DeviceState
*dev
)
318 NvdimmNfitControlRegion
*nfit_dcr
;
319 int slot
= object_property_get_int(OBJECT(dev
), PC_DIMM_SLOT_PROP
,
321 uint32_t sn
= nvdimm_slot_to_sn(slot
);
323 nfit_dcr
= acpi_data_push(structures
, sizeof(*nfit_dcr
));
325 nfit_dcr
->type
= cpu_to_le16(4 /* NVDIMM Control Region Structure */);
326 nfit_dcr
->length
= cpu_to_le16(sizeof(*nfit_dcr
));
327 nfit_dcr
->dcr_index
= cpu_to_le16(nvdimm_slot_to_dcr_index(slot
));
330 nfit_dcr
->vendor_id
= cpu_to_le16(0x8086);
331 nfit_dcr
->device_id
= cpu_to_le16(1);
333 /* The _DSM method is following Intel's DSM specification. */
334 nfit_dcr
->revision_id
= cpu_to_le16(1 /* Current Revision supported
335 in ACPI 6.0 is 1. */);
336 nfit_dcr
->serial_number
= cpu_to_le32(sn
);
337 nfit_dcr
->fic
= cpu_to_le16(0x301 /* Format Interface Code:
338 Byte addressable, no energy backed.
339 See ACPI 6.2, sect 5.2.25.6 and
340 JEDEC Annex L Release 3. */);
344 * ACPI 6.2 Errata A: 5.2.25.9 NVDIMM Platform Capabilities Structure
347 nvdimm_build_structure_caps(GArray
*structures
, uint32_t capabilities
)
349 NvdimmNfitPlatformCaps
*nfit_caps
;
351 nfit_caps
= acpi_data_push(structures
, sizeof(*nfit_caps
));
353 nfit_caps
->type
= cpu_to_le16(7 /* NVDIMM Platform Capabilities */);
354 nfit_caps
->length
= cpu_to_le16(sizeof(*nfit_caps
));
355 nfit_caps
->highest_cap
= 31 - clz32(capabilities
);
356 nfit_caps
->capabilities
= cpu_to_le32(capabilities
);
359 static GArray
*nvdimm_build_device_structure(NVDIMMState
*state
)
361 GSList
*device_list
= nvdimm_get_device_list();
362 GArray
*structures
= g_array_new(false, true /* clear */, 1);
364 for (; device_list
; device_list
= device_list
->next
) {
365 DeviceState
*dev
= device_list
->data
;
367 /* build System Physical Address Range Structure. */
368 nvdimm_build_structure_spa(structures
, dev
);
371 * build Memory Device to System Physical Address Range Mapping
374 nvdimm_build_structure_memdev(structures
, dev
);
376 /* build NVDIMM Control Region Structure. */
377 nvdimm_build_structure_dcr(structures
, dev
);
379 g_slist_free(device_list
);
381 if (state
->persistence
) {
382 nvdimm_build_structure_caps(structures
, state
->persistence
);
388 static void nvdimm_init_fit_buffer(NvdimmFitBuffer
*fit_buf
)
390 fit_buf
->fit
= g_array_new(false, true /* clear */, 1);
393 static void nvdimm_build_fit_buffer(NVDIMMState
*state
)
395 NvdimmFitBuffer
*fit_buf
= &state
->fit_buf
;
397 g_array_free(fit_buf
->fit
, true);
398 fit_buf
->fit
= nvdimm_build_device_structure(state
);
399 fit_buf
->dirty
= true;
402 void nvdimm_plug(NVDIMMState
*state
)
404 nvdimm_build_fit_buffer(state
);
407 static void nvdimm_build_nfit(NVDIMMState
*state
, GArray
*table_offsets
,
408 GArray
*table_data
, BIOSLinker
*linker
)
410 NvdimmFitBuffer
*fit_buf
= &state
->fit_buf
;
413 acpi_add_table(table_offsets
, table_data
);
416 header
= table_data
->len
;
417 acpi_data_push(table_data
, sizeof(NvdimmNfitHeader
));
418 /* NVDIMM device structures. */
419 g_array_append_vals(table_data
, fit_buf
->fit
->data
, fit_buf
->fit
->len
);
421 build_header(linker
, table_data
,
422 (void *)(table_data
->data
+ header
), "NFIT",
423 sizeof(NvdimmNfitHeader
) + fit_buf
->fit
->len
, 1, NULL
, NULL
);
426 #define NVDIMM_DSM_MEMORY_SIZE 4096
432 /* the remaining size in the page is used by arg3. */
437 typedef struct NvdimmDsmIn NvdimmDsmIn
;
438 QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmIn
) != NVDIMM_DSM_MEMORY_SIZE
);
440 struct NvdimmDsmOut
{
441 /* the size of buffer filled by QEMU. */
445 typedef struct NvdimmDsmOut NvdimmDsmOut
;
446 QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmOut
) != NVDIMM_DSM_MEMORY_SIZE
);
448 struct NvdimmDsmFunc0Out
{
449 /* the size of buffer filled by QEMU. */
451 uint32_t supported_func
;
453 typedef struct NvdimmDsmFunc0Out NvdimmDsmFunc0Out
;
455 struct NvdimmDsmFuncNoPayloadOut
{
456 /* the size of buffer filled by QEMU. */
458 uint32_t func_ret_status
;
460 typedef struct NvdimmDsmFuncNoPayloadOut NvdimmDsmFuncNoPayloadOut
;
462 struct NvdimmFuncGetLabelSizeOut
{
463 /* the size of buffer filled by QEMU. */
465 uint32_t func_ret_status
; /* return status code. */
466 uint32_t label_size
; /* the size of label data area. */
468 * Maximum size of the namespace label data length supported by
469 * the platform in Get/Set Namespace Label Data functions.
473 typedef struct NvdimmFuncGetLabelSizeOut NvdimmFuncGetLabelSizeOut
;
474 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelSizeOut
) > NVDIMM_DSM_MEMORY_SIZE
);
476 struct NvdimmFuncGetLabelDataIn
{
477 uint32_t offset
; /* the offset in the namespace label data area. */
478 uint32_t length
; /* the size of data is to be read via the function. */
480 typedef struct NvdimmFuncGetLabelDataIn NvdimmFuncGetLabelDataIn
;
481 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataIn
) +
482 offsetof(NvdimmDsmIn
, arg3
) > NVDIMM_DSM_MEMORY_SIZE
);
484 struct NvdimmFuncGetLabelDataOut
{
485 /* the size of buffer filled by QEMU. */
487 uint32_t func_ret_status
; /* return status code. */
488 uint8_t out_buf
[]; /* the data got via Get Namesapce Label function. */
490 typedef struct NvdimmFuncGetLabelDataOut NvdimmFuncGetLabelDataOut
;
491 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataOut
) > NVDIMM_DSM_MEMORY_SIZE
);
493 struct NvdimmFuncSetLabelDataIn
{
494 uint32_t offset
; /* the offset in the namespace label data area. */
495 uint32_t length
; /* the size of data is to be written via the function. */
496 uint8_t in_buf
[]; /* the data written to label data area. */
498 typedef struct NvdimmFuncSetLabelDataIn NvdimmFuncSetLabelDataIn
;
499 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncSetLabelDataIn
) +
500 offsetof(NvdimmDsmIn
, arg3
) > NVDIMM_DSM_MEMORY_SIZE
);
502 struct NvdimmFuncReadFITIn
{
503 uint32_t offset
; /* the offset into FIT buffer. */
505 typedef struct NvdimmFuncReadFITIn NvdimmFuncReadFITIn
;
506 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncReadFITIn
) +
507 offsetof(NvdimmDsmIn
, arg3
) > NVDIMM_DSM_MEMORY_SIZE
);
509 struct NvdimmFuncReadFITOut
{
510 /* the size of buffer filled by QEMU. */
512 uint32_t func_ret_status
; /* return status code. */
513 uint8_t fit
[]; /* the FIT data. */
515 typedef struct NvdimmFuncReadFITOut NvdimmFuncReadFITOut
;
516 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncReadFITOut
) > NVDIMM_DSM_MEMORY_SIZE
);
519 nvdimm_dsm_function0(uint32_t supported_func
, hwaddr dsm_mem_addr
)
521 NvdimmDsmFunc0Out func0
= {
522 .len
= cpu_to_le32(sizeof(func0
)),
523 .supported_func
= cpu_to_le32(supported_func
),
525 cpu_physical_memory_write(dsm_mem_addr
, &func0
, sizeof(func0
));
529 nvdimm_dsm_no_payload(uint32_t func_ret_status
, hwaddr dsm_mem_addr
)
531 NvdimmDsmFuncNoPayloadOut out
= {
532 .len
= cpu_to_le32(sizeof(out
)),
533 .func_ret_status
= cpu_to_le32(func_ret_status
),
535 cpu_physical_memory_write(dsm_mem_addr
, &out
, sizeof(out
));
538 #define NVDIMM_DSM_RET_STATUS_SUCCESS 0 /* Success */
539 #define NVDIMM_DSM_RET_STATUS_UNSUPPORT 1 /* Not Supported */
540 #define NVDIMM_DSM_RET_STATUS_NOMEMDEV 2 /* Non-Existing Memory Device */
541 #define NVDIMM_DSM_RET_STATUS_INVALID 3 /* Invalid Input Parameters */
542 #define NVDIMM_DSM_RET_STATUS_FIT_CHANGED 0x100 /* FIT Changed */
544 #define NVDIMM_QEMU_RSVD_HANDLE_ROOT 0x10000
546 /* Read FIT data, defined in docs/specs/acpi_nvdimm.txt. */
547 static void nvdimm_dsm_func_read_fit(NVDIMMState
*state
, NvdimmDsmIn
*in
,
550 NvdimmFitBuffer
*fit_buf
= &state
->fit_buf
;
551 NvdimmFuncReadFITIn
*read_fit
;
552 NvdimmFuncReadFITOut
*read_fit_out
;
554 uint32_t read_len
= 0, func_ret_status
;
557 read_fit
= (NvdimmFuncReadFITIn
*)in
->arg3
;
558 read_fit
->offset
= le32_to_cpu(read_fit
->offset
);
562 nvdimm_debug("Read FIT: offset %#x FIT size %#x Dirty %s.\n",
563 read_fit
->offset
, fit
->len
, fit_buf
->dirty
? "Yes" : "No");
565 if (read_fit
->offset
> fit
->len
) {
566 func_ret_status
= NVDIMM_DSM_RET_STATUS_INVALID
;
570 /* It is the first time to read FIT. */
571 if (!read_fit
->offset
) {
572 fit_buf
->dirty
= false;
573 } else if (fit_buf
->dirty
) { /* FIT has been changed during RFIT. */
574 func_ret_status
= NVDIMM_DSM_RET_STATUS_FIT_CHANGED
;
578 func_ret_status
= NVDIMM_DSM_RET_STATUS_SUCCESS
;
579 read_len
= MIN(fit
->len
- read_fit
->offset
,
580 NVDIMM_DSM_MEMORY_SIZE
- sizeof(NvdimmFuncReadFITOut
));
583 size
= sizeof(NvdimmFuncReadFITOut
) + read_len
;
584 read_fit_out
= g_malloc(size
);
586 read_fit_out
->len
= cpu_to_le32(size
);
587 read_fit_out
->func_ret_status
= cpu_to_le32(func_ret_status
);
588 memcpy(read_fit_out
->fit
, fit
->data
+ read_fit
->offset
, read_len
);
590 cpu_physical_memory_write(dsm_mem_addr
, read_fit_out
, size
);
592 g_free(read_fit_out
);
596 nvdimm_dsm_handle_reserved_root_method(NVDIMMState
*state
,
597 NvdimmDsmIn
*in
, hwaddr dsm_mem_addr
)
599 switch (in
->function
) {
601 nvdimm_dsm_function0(0x1 | 1 << 1 /* Read FIT */, dsm_mem_addr
);
603 case 0x1 /* Read FIT */:
604 nvdimm_dsm_func_read_fit(state
, in
, dsm_mem_addr
);
608 nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT
, dsm_mem_addr
);
611 static void nvdimm_dsm_root(NvdimmDsmIn
*in
, hwaddr dsm_mem_addr
)
614 * function 0 is called to inquire which functions are supported by
618 nvdimm_dsm_function0(0 /* No function supported other than
619 function 0 */, dsm_mem_addr
);
623 /* No function except function 0 is supported yet. */
624 nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT
, dsm_mem_addr
);
628 * the max transfer size is the max size transferred by both a
629 * 'Get Namespace Label Data' function and a 'Set Namespace Label Data'
632 static uint32_t nvdimm_get_max_xfer_label_size(void)
634 uint32_t max_get_size
, max_set_size
, dsm_memory_size
;
636 dsm_memory_size
= NVDIMM_DSM_MEMORY_SIZE
;
639 * the max data ACPI can read one time which is transferred by
640 * the response of 'Get Namespace Label Data' function.
642 max_get_size
= dsm_memory_size
- sizeof(NvdimmFuncGetLabelDataOut
);
645 * the max data ACPI can write one time which is transferred by
646 * 'Set Namespace Label Data' function.
648 max_set_size
= dsm_memory_size
- offsetof(NvdimmDsmIn
, arg3
) -
649 sizeof(NvdimmFuncSetLabelDataIn
);
651 return MIN(max_get_size
, max_set_size
);
655 * DSM Spec Rev1 4.4 Get Namespace Label Size (Function Index 4).
657 * It gets the size of Namespace Label data area and the max data size
658 * that Get/Set Namespace Label Data functions can transfer.
660 static void nvdimm_dsm_label_size(NVDIMMDevice
*nvdimm
, hwaddr dsm_mem_addr
)
662 NvdimmFuncGetLabelSizeOut label_size_out
= {
663 .len
= cpu_to_le32(sizeof(label_size_out
)),
665 uint32_t label_size
, mxfer
;
667 label_size
= nvdimm
->label_size
;
668 mxfer
= nvdimm_get_max_xfer_label_size();
670 nvdimm_debug("label_size %#x, max_xfer %#x.\n", label_size
, mxfer
);
672 label_size_out
.func_ret_status
= cpu_to_le32(NVDIMM_DSM_RET_STATUS_SUCCESS
);
673 label_size_out
.label_size
= cpu_to_le32(label_size
);
674 label_size_out
.max_xfer
= cpu_to_le32(mxfer
);
676 cpu_physical_memory_write(dsm_mem_addr
, &label_size_out
,
677 sizeof(label_size_out
));
680 static uint32_t nvdimm_rw_label_data_check(NVDIMMDevice
*nvdimm
,
681 uint32_t offset
, uint32_t length
)
683 uint32_t ret
= NVDIMM_DSM_RET_STATUS_INVALID
;
685 if (offset
+ length
< offset
) {
686 nvdimm_debug("offset %#x + length %#x is overflow.\n", offset
,
691 if (nvdimm
->label_size
< offset
+ length
) {
692 nvdimm_debug("position %#x is beyond label data (len = %" PRIx64
").\n",
693 offset
+ length
, nvdimm
->label_size
);
697 if (length
> nvdimm_get_max_xfer_label_size()) {
698 nvdimm_debug("length (%#x) is larger than max_xfer (%#x).\n",
699 length
, nvdimm_get_max_xfer_label_size());
703 return NVDIMM_DSM_RET_STATUS_SUCCESS
;
707 * DSM Spec Rev1 4.5 Get Namespace Label Data (Function Index 5).
709 static void nvdimm_dsm_get_label_data(NVDIMMDevice
*nvdimm
, NvdimmDsmIn
*in
,
712 NVDIMMClass
*nvc
= NVDIMM_GET_CLASS(nvdimm
);
713 NvdimmFuncGetLabelDataIn
*get_label_data
;
714 NvdimmFuncGetLabelDataOut
*get_label_data_out
;
718 get_label_data
= (NvdimmFuncGetLabelDataIn
*)in
->arg3
;
719 get_label_data
->offset
= le32_to_cpu(get_label_data
->offset
);
720 get_label_data
->length
= le32_to_cpu(get_label_data
->length
);
722 nvdimm_debug("Read Label Data: offset %#x length %#x.\n",
723 get_label_data
->offset
, get_label_data
->length
);
725 status
= nvdimm_rw_label_data_check(nvdimm
, get_label_data
->offset
,
726 get_label_data
->length
);
727 if (status
!= NVDIMM_DSM_RET_STATUS_SUCCESS
) {
728 nvdimm_dsm_no_payload(status
, dsm_mem_addr
);
732 size
= sizeof(*get_label_data_out
) + get_label_data
->length
;
733 assert(size
<= NVDIMM_DSM_MEMORY_SIZE
);
734 get_label_data_out
= g_malloc(size
);
736 get_label_data_out
->len
= cpu_to_le32(size
);
737 get_label_data_out
->func_ret_status
=
738 cpu_to_le32(NVDIMM_DSM_RET_STATUS_SUCCESS
);
739 nvc
->read_label_data(nvdimm
, get_label_data_out
->out_buf
,
740 get_label_data
->length
, get_label_data
->offset
);
742 cpu_physical_memory_write(dsm_mem_addr
, get_label_data_out
, size
);
743 g_free(get_label_data_out
);
747 * DSM Spec Rev1 4.6 Set Namespace Label Data (Function Index 6).
749 static void nvdimm_dsm_set_label_data(NVDIMMDevice
*nvdimm
, NvdimmDsmIn
*in
,
752 NVDIMMClass
*nvc
= NVDIMM_GET_CLASS(nvdimm
);
753 NvdimmFuncSetLabelDataIn
*set_label_data
;
756 set_label_data
= (NvdimmFuncSetLabelDataIn
*)in
->arg3
;
758 set_label_data
->offset
= le32_to_cpu(set_label_data
->offset
);
759 set_label_data
->length
= le32_to_cpu(set_label_data
->length
);
761 nvdimm_debug("Write Label Data: offset %#x length %#x.\n",
762 set_label_data
->offset
, set_label_data
->length
);
764 status
= nvdimm_rw_label_data_check(nvdimm
, set_label_data
->offset
,
765 set_label_data
->length
);
766 if (status
!= NVDIMM_DSM_RET_STATUS_SUCCESS
) {
767 nvdimm_dsm_no_payload(status
, dsm_mem_addr
);
771 assert(offsetof(NvdimmDsmIn
, arg3
) + sizeof(*set_label_data
) +
772 set_label_data
->length
<= NVDIMM_DSM_MEMORY_SIZE
);
774 nvc
->write_label_data(nvdimm
, set_label_data
->in_buf
,
775 set_label_data
->length
, set_label_data
->offset
);
776 nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_SUCCESS
, dsm_mem_addr
);
779 static void nvdimm_dsm_device(NvdimmDsmIn
*in
, hwaddr dsm_mem_addr
)
781 NVDIMMDevice
*nvdimm
= nvdimm_get_device_by_handle(in
->handle
);
783 /* See the comments in nvdimm_dsm_root(). */
785 uint32_t supported_func
= 0;
787 if (nvdimm
&& nvdimm
->label_size
) {
788 supported_func
|= 0x1 /* Bit 0 indicates whether there is
789 support for any functions other
790 than function 0. */ |
791 1 << 4 /* Get Namespace Label Size */ |
792 1 << 5 /* Get Namespace Label Data */ |
793 1 << 6 /* Set Namespace Label Data */;
795 nvdimm_dsm_function0(supported_func
, dsm_mem_addr
);
800 nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_NOMEMDEV
,
805 /* Encode DSM function according to DSM Spec Rev1. */
806 switch (in
->function
) {
807 case 4 /* Get Namespace Label Size */:
808 if (nvdimm
->label_size
) {
809 nvdimm_dsm_label_size(nvdimm
, dsm_mem_addr
);
813 case 5 /* Get Namespace Label Data */:
814 if (nvdimm
->label_size
) {
815 nvdimm_dsm_get_label_data(nvdimm
, in
, dsm_mem_addr
);
819 case 0x6 /* Set Namespace Label Data */:
820 if (nvdimm
->label_size
) {
821 nvdimm_dsm_set_label_data(nvdimm
, in
, dsm_mem_addr
);
827 nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT
, dsm_mem_addr
);
831 nvdimm_dsm_read(void *opaque
, hwaddr addr
, unsigned size
)
833 nvdimm_debug("BUG: we never read _DSM IO Port.\n");
838 nvdimm_dsm_write(void *opaque
, hwaddr addr
, uint64_t val
, unsigned size
)
840 NVDIMMState
*state
= opaque
;
842 hwaddr dsm_mem_addr
= val
;
844 nvdimm_debug("dsm memory address %#" HWADDR_PRIx
".\n", dsm_mem_addr
);
847 * The DSM memory is mapped to guest address space so an evil guest
848 * can change its content while we are doing DSM emulation. Avoid
849 * this by copying DSM memory to QEMU local memory.
851 in
= g_new(NvdimmDsmIn
, 1);
852 cpu_physical_memory_read(dsm_mem_addr
, in
, sizeof(*in
));
854 in
->revision
= le32_to_cpu(in
->revision
);
855 in
->function
= le32_to_cpu(in
->function
);
856 in
->handle
= le32_to_cpu(in
->handle
);
858 nvdimm_debug("Revision %#x Handler %#x Function %#x.\n", in
->revision
,
859 in
->handle
, in
->function
);
861 if (in
->revision
!= 0x1 /* Currently we only support DSM Spec Rev1. */) {
862 nvdimm_debug("Revision %#x is not supported, expect %#x.\n",
864 nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT
, dsm_mem_addr
);
868 if (in
->handle
== NVDIMM_QEMU_RSVD_HANDLE_ROOT
) {
869 nvdimm_dsm_handle_reserved_root_method(state
, in
, dsm_mem_addr
);
873 /* Handle 0 is reserved for NVDIMM Root Device. */
875 nvdimm_dsm_root(in
, dsm_mem_addr
);
879 nvdimm_dsm_device(in
, dsm_mem_addr
);
885 static const MemoryRegionOps nvdimm_dsm_ops
= {
886 .read
= nvdimm_dsm_read
,
887 .write
= nvdimm_dsm_write
,
888 .endianness
= DEVICE_LITTLE_ENDIAN
,
890 .min_access_size
= 4,
891 .max_access_size
= 4,
895 void nvdimm_acpi_plug_cb(HotplugHandler
*hotplug_dev
, DeviceState
*dev
)
897 if (dev
->hotplugged
) {
898 acpi_send_event(DEVICE(hotplug_dev
), ACPI_NVDIMM_HOTPLUG_STATUS
);
902 void nvdimm_init_acpi_state(NVDIMMState
*state
, MemoryRegion
*io
,
903 struct AcpiGenericAddress dsm_io
,
904 FWCfgState
*fw_cfg
, Object
*owner
)
906 state
->dsm_io
= dsm_io
;
907 memory_region_init_io(&state
->io_mr
, owner
, &nvdimm_dsm_ops
, state
,
908 "nvdimm-acpi-io", dsm_io
.bit_width
>> 3);
909 memory_region_add_subregion(io
, dsm_io
.address
, &state
->io_mr
);
911 state
->dsm_mem
= g_array_new(false, true /* clear */, 1);
912 acpi_data_push(state
->dsm_mem
, sizeof(NvdimmDsmIn
));
913 fw_cfg_add_file(fw_cfg
, NVDIMM_DSM_MEM_FILE
, state
->dsm_mem
->data
,
914 state
->dsm_mem
->len
);
916 nvdimm_init_fit_buffer(&state
->fit_buf
);
919 #define NVDIMM_COMMON_DSM "NCAL"
920 #define NVDIMM_ACPI_MEM_ADDR "MEMA"
922 #define NVDIMM_DSM_MEMORY "NRAM"
923 #define NVDIMM_DSM_IOPORT "NPIO"
925 #define NVDIMM_DSM_NOTIFY "NTFI"
926 #define NVDIMM_DSM_HANDLE "HDLE"
927 #define NVDIMM_DSM_REVISION "REVS"
928 #define NVDIMM_DSM_FUNCTION "FUNC"
929 #define NVDIMM_DSM_ARG3 "FARG"
931 #define NVDIMM_DSM_OUT_BUF_SIZE "RLEN"
932 #define NVDIMM_DSM_OUT_BUF "ODAT"
934 #define NVDIMM_DSM_RFIT_STATUS "RSTA"
936 #define NVDIMM_QEMU_RSVD_UUID "648B9CF2-CDA1-4312-8AD9-49C4AF32BD62"
938 static void nvdimm_build_common_dsm(Aml
*dev
,
939 NVDIMMState
*nvdimm_state
)
941 Aml
*method
, *ifctx
, *function
, *handle
, *uuid
, *dsm_mem
, *elsectx2
;
942 Aml
*elsectx
, *unsupport
, *unpatched
, *expected_uuid
, *uuid_invalid
;
943 Aml
*pckg
, *pckg_index
, *pckg_buf
, *field
, *dsm_out_buf
, *dsm_out_buf_size
;
944 Aml
*whilectx
, *offset
;
945 uint8_t byte_list
[1];
948 method
= aml_method(NVDIMM_COMMON_DSM
, 5, AML_SERIALIZED
);
950 function
= aml_arg(2);
952 dsm_mem
= aml_local(6);
953 dsm_out_buf
= aml_local(7);
955 aml_append(method
, aml_store(aml_name(NVDIMM_ACPI_MEM_ADDR
), dsm_mem
));
957 if (nvdimm_state
->dsm_io
.space_id
== AML_AS_SYSTEM_IO
) {
960 rs
= AML_SYSTEM_MEMORY
;
963 /* map DSM memory and IO into ACPI namespace. */
964 aml_append(method
, aml_operation_region(NVDIMM_DSM_IOPORT
, rs
,
965 aml_int(nvdimm_state
->dsm_io
.address
),
966 nvdimm_state
->dsm_io
.bit_width
>> 3));
967 aml_append(method
, aml_operation_region(NVDIMM_DSM_MEMORY
,
968 AML_SYSTEM_MEMORY
, dsm_mem
, sizeof(NvdimmDsmIn
)));
972 * NVDIMM_DSM_NOTIFY: write the address of DSM memory and notify QEMU to
973 * emulate the access.
975 * It is the IO port so that accessing them will cause VM-exit, the
976 * control will be transferred to QEMU.
978 field
= aml_field(NVDIMM_DSM_IOPORT
, AML_DWORD_ACC
, AML_NOLOCK
,
980 aml_append(field
, aml_named_field(NVDIMM_DSM_NOTIFY
,
981 nvdimm_state
->dsm_io
.bit_width
));
982 aml_append(method
, field
);
986 * NVDIMM_DSM_HANDLE: store device's handle, it's zero if the _DSM call
987 * happens on NVDIMM Root Device.
988 * NVDIMM_DSM_REVISION: store the Arg1 of _DSM call.
989 * NVDIMM_DSM_FUNCTION: store the Arg2 of _DSM call.
990 * NVDIMM_DSM_ARG3: store the Arg3 of _DSM call which is a Package
991 * containing function-specific arguments.
993 * They are RAM mapping on host so that these accesses never cause
996 field
= aml_field(NVDIMM_DSM_MEMORY
, AML_DWORD_ACC
, AML_NOLOCK
,
998 aml_append(field
, aml_named_field(NVDIMM_DSM_HANDLE
,
999 sizeof(typeof_field(NvdimmDsmIn
, handle
)) * BITS_PER_BYTE
));
1000 aml_append(field
, aml_named_field(NVDIMM_DSM_REVISION
,
1001 sizeof(typeof_field(NvdimmDsmIn
, revision
)) * BITS_PER_BYTE
));
1002 aml_append(field
, aml_named_field(NVDIMM_DSM_FUNCTION
,
1003 sizeof(typeof_field(NvdimmDsmIn
, function
)) * BITS_PER_BYTE
));
1004 aml_append(field
, aml_named_field(NVDIMM_DSM_ARG3
,
1005 (sizeof(NvdimmDsmIn
) - offsetof(NvdimmDsmIn
, arg3
)) * BITS_PER_BYTE
));
1006 aml_append(method
, field
);
1010 * NVDIMM_DSM_OUT_BUF_SIZE: the size of the buffer filled by QEMU.
1011 * NVDIMM_DSM_OUT_BUF: the buffer QEMU uses to store the result.
1013 * Since the page is reused by both input and out, the input data
1014 * will be lost after storing new result into ODAT so we should fetch
1015 * all the input data before writing the result.
1017 field
= aml_field(NVDIMM_DSM_MEMORY
, AML_DWORD_ACC
, AML_NOLOCK
,
1019 aml_append(field
, aml_named_field(NVDIMM_DSM_OUT_BUF_SIZE
,
1020 sizeof(typeof_field(NvdimmDsmOut
, len
)) * BITS_PER_BYTE
));
1021 aml_append(field
, aml_named_field(NVDIMM_DSM_OUT_BUF
,
1022 (sizeof(NvdimmDsmOut
) - offsetof(NvdimmDsmOut
, data
)) * BITS_PER_BYTE
));
1023 aml_append(method
, field
);
1026 * do not support any method if DSM memory address has not been
1029 unpatched
= aml_equal(dsm_mem
, aml_int(0x0));
1031 expected_uuid
= aml_local(0);
1033 ifctx
= aml_if(aml_equal(handle
, aml_int(0x0)));
1034 aml_append(ifctx
, aml_store(
1035 aml_touuid("2F10E7A4-9E91-11E4-89D3-123B93F75CBA")
1036 /* UUID for NVDIMM Root Device */, expected_uuid
));
1037 aml_append(method
, ifctx
);
1038 elsectx
= aml_else();
1039 ifctx
= aml_if(aml_equal(handle
, aml_int(NVDIMM_QEMU_RSVD_HANDLE_ROOT
)));
1040 aml_append(ifctx
, aml_store(aml_touuid(NVDIMM_QEMU_RSVD_UUID
1041 /* UUID for QEMU internal use */), expected_uuid
));
1042 aml_append(elsectx
, ifctx
);
1043 elsectx2
= aml_else();
1044 aml_append(elsectx2
, aml_store(
1045 aml_touuid("4309AC30-0D11-11E4-9191-0800200C9A66")
1046 /* UUID for NVDIMM Devices */, expected_uuid
));
1047 aml_append(elsectx
, elsectx2
);
1048 aml_append(method
, elsectx
);
1050 uuid_invalid
= aml_lnot(aml_equal(uuid
, expected_uuid
));
1052 unsupport
= aml_if(aml_or(unpatched
, uuid_invalid
, NULL
));
1055 * function 0 is called to inquire what functions are supported by
1058 ifctx
= aml_if(aml_equal(function
, aml_int(0)));
1059 byte_list
[0] = 0 /* No function Supported */;
1060 aml_append(ifctx
, aml_return(aml_buffer(1, byte_list
)));
1061 aml_append(unsupport
, ifctx
);
1063 /* No function is supported yet. */
1064 byte_list
[0] = NVDIMM_DSM_RET_STATUS_UNSUPPORT
;
1065 aml_append(unsupport
, aml_return(aml_buffer(1, byte_list
)));
1066 aml_append(method
, unsupport
);
1069 * The HDLE indicates the DSM function is issued from which device,
1070 * it reserves 0 for root device and is the handle for NVDIMM devices.
1071 * See the comments in nvdimm_slot_to_handle().
1073 aml_append(method
, aml_store(handle
, aml_name(NVDIMM_DSM_HANDLE
)));
1074 aml_append(method
, aml_store(aml_arg(1), aml_name(NVDIMM_DSM_REVISION
)));
1075 aml_append(method
, aml_store(function
, aml_name(NVDIMM_DSM_FUNCTION
)));
1078 * The fourth parameter (Arg3) of _DSM is a package which contains
1079 * a buffer, the layout of the buffer is specified by UUID (Arg0),
1080 * Revision ID (Arg1) and Function Index (Arg2) which are documented
1084 ifctx
= aml_if(aml_and(aml_equal(aml_object_type(pckg
),
1085 aml_int(4 /* Package */)) /* It is a Package? */,
1086 aml_equal(aml_sizeof(pckg
), aml_int(1)) /* 1 element? */,
1089 pckg_index
= aml_local(2);
1090 pckg_buf
= aml_local(3);
1091 aml_append(ifctx
, aml_store(aml_index(pckg
, aml_int(0)), pckg_index
));
1092 aml_append(ifctx
, aml_store(aml_derefof(pckg_index
), pckg_buf
));
1093 aml_append(ifctx
, aml_store(pckg_buf
, aml_name(NVDIMM_DSM_ARG3
)));
1094 aml_append(method
, ifctx
);
1097 * tell QEMU about the real address of DSM memory, then QEMU
1098 * gets the control and fills the result in DSM memory.
1100 aml_append(method
, aml_store(dsm_mem
, aml_name(NVDIMM_DSM_NOTIFY
)));
1102 dsm_out_buf_size
= aml_local(1);
1103 /* RLEN is not included in the payload returned to guest. */
1104 aml_append(method
, aml_subtract(aml_name(NVDIMM_DSM_OUT_BUF_SIZE
),
1105 aml_int(4), dsm_out_buf_size
));
1108 * As per ACPI spec 6.3, Table 19-419 Object Conversion Rules, if
1109 * the Buffer Field <= to the size of an Integer (in bits), it will
1110 * be treated as an integer. Moreover, the integer size depends on
1111 * DSDT tables revision number. If revision number is < 2, integer
1112 * size is 32 bits, otherwise it is 64 bits.
1113 * Because of this CreateField() canot be used if RLEN < Integer Size.
1115 * Also please note that APCI ASL operator SizeOf() doesn't support
1116 * Integer and there isn't any other way to figure out the Integer
1117 * size. Hence we assume 8 byte as Integer size and if RLEN < 8 bytes,
1118 * build dsm_out_buf byte by byte.
1120 ifctx
= aml_if(aml_lless(dsm_out_buf_size
, aml_int(8)));
1121 offset
= aml_local(2);
1122 aml_append(ifctx
, aml_store(aml_int(0), offset
));
1123 aml_append(ifctx
, aml_name_decl("TBUF", aml_buffer(1, NULL
)));
1124 aml_append(ifctx
, aml_store(aml_buffer(0, NULL
), dsm_out_buf
));
1126 whilectx
= aml_while(aml_lless(offset
, dsm_out_buf_size
));
1127 /* Copy 1 byte at offset from ODAT to temporary buffer(TBUF). */
1128 aml_append(whilectx
, aml_store(aml_derefof(aml_index(
1129 aml_name(NVDIMM_DSM_OUT_BUF
), offset
)),
1130 aml_index(aml_name("TBUF"), aml_int(0))));
1131 aml_append(whilectx
, aml_concatenate(dsm_out_buf
, aml_name("TBUF"),
1133 aml_append(whilectx
, aml_increment(offset
));
1134 aml_append(ifctx
, whilectx
);
1136 aml_append(ifctx
, aml_return(dsm_out_buf
));
1137 aml_append(method
, ifctx
);
1139 /* If RLEN >= Integer size, just use CreateField() operator */
1140 aml_append(method
, aml_store(aml_shiftleft(dsm_out_buf_size
, aml_int(3)),
1142 aml_append(method
, aml_create_field(aml_name(NVDIMM_DSM_OUT_BUF
),
1143 aml_int(0), dsm_out_buf_size
, "OBUF"));
1144 aml_append(method
, aml_return(aml_name("OBUF")));
1146 aml_append(dev
, method
);
1149 static void nvdimm_build_device_dsm(Aml
*dev
, uint32_t handle
)
1153 method
= aml_method("_DSM", 4, AML_NOTSERIALIZED
);
1154 aml_append(method
, aml_return(aml_call5(NVDIMM_COMMON_DSM
, aml_arg(0),
1155 aml_arg(1), aml_arg(2), aml_arg(3),
1157 aml_append(dev
, method
);
1160 static void nvdimm_build_fit(Aml
*dev
)
1162 Aml
*method
, *pkg
, *buf
, *buf_size
, *offset
, *call_result
;
1163 Aml
*whilectx
, *ifcond
, *ifctx
, *elsectx
, *fit
;
1166 buf_size
= aml_local(1);
1169 aml_append(dev
, aml_name_decl(NVDIMM_DSM_RFIT_STATUS
, aml_int(0)));
1171 /* build helper function, RFIT. */
1172 method
= aml_method("RFIT", 1, AML_SERIALIZED
);
1173 aml_append(method
, aml_name_decl("OFST", aml_int(0)));
1175 /* prepare input package. */
1176 pkg
= aml_package(1);
1177 aml_append(method
, aml_store(aml_arg(0), aml_name("OFST")));
1178 aml_append(pkg
, aml_name("OFST"));
1180 /* call Read_FIT function. */
1181 call_result
= aml_call5(NVDIMM_COMMON_DSM
,
1182 aml_touuid(NVDIMM_QEMU_RSVD_UUID
),
1183 aml_int(1) /* Revision 1 */,
1184 aml_int(0x1) /* Read FIT */,
1185 pkg
, aml_int(NVDIMM_QEMU_RSVD_HANDLE_ROOT
));
1186 aml_append(method
, aml_store(call_result
, buf
));
1188 /* handle _DSM result. */
1189 aml_append(method
, aml_create_dword_field(buf
,
1190 aml_int(0) /* offset at byte 0 */, "STAU"));
1192 aml_append(method
, aml_store(aml_name("STAU"),
1193 aml_name(NVDIMM_DSM_RFIT_STATUS
)));
1195 /* if something is wrong during _DSM. */
1196 ifcond
= aml_equal(aml_int(NVDIMM_DSM_RET_STATUS_SUCCESS
),
1198 ifctx
= aml_if(aml_lnot(ifcond
));
1199 aml_append(ifctx
, aml_return(aml_buffer(0, NULL
)));
1200 aml_append(method
, ifctx
);
1202 aml_append(method
, aml_store(aml_sizeof(buf
), buf_size
));
1203 aml_append(method
, aml_subtract(buf_size
,
1204 aml_int(4) /* the size of "STAU" */,
1207 /* if we read the end of fit. */
1208 ifctx
= aml_if(aml_equal(buf_size
, aml_int(0)));
1209 aml_append(ifctx
, aml_return(aml_buffer(0, NULL
)));
1210 aml_append(method
, ifctx
);
1212 aml_append(method
, aml_create_field(buf
,
1213 aml_int(4 * BITS_PER_BYTE
), /* offset at byte 4.*/
1214 aml_shiftleft(buf_size
, aml_int(3)), "BUFF"));
1215 aml_append(method
, aml_return(aml_name("BUFF")));
1216 aml_append(dev
, method
);
1219 method
= aml_method("_FIT", 0, AML_SERIALIZED
);
1220 offset
= aml_local(3);
1222 aml_append(method
, aml_store(aml_buffer(0, NULL
), fit
));
1223 aml_append(method
, aml_store(aml_int(0), offset
));
1225 whilectx
= aml_while(aml_int(1));
1226 aml_append(whilectx
, aml_store(aml_call1("RFIT", offset
), buf
));
1227 aml_append(whilectx
, aml_store(aml_sizeof(buf
), buf_size
));
1230 * if fit buffer was changed during RFIT, read from the beginning
1233 ifctx
= aml_if(aml_equal(aml_name(NVDIMM_DSM_RFIT_STATUS
),
1234 aml_int(NVDIMM_DSM_RET_STATUS_FIT_CHANGED
)));
1235 aml_append(ifctx
, aml_store(aml_buffer(0, NULL
), fit
));
1236 aml_append(ifctx
, aml_store(aml_int(0), offset
));
1237 aml_append(whilectx
, ifctx
);
1239 elsectx
= aml_else();
1241 /* finish fit read if no data is read out. */
1242 ifctx
= aml_if(aml_equal(buf_size
, aml_int(0)));
1243 aml_append(ifctx
, aml_return(fit
));
1244 aml_append(elsectx
, ifctx
);
1246 /* update the offset. */
1247 aml_append(elsectx
, aml_add(offset
, buf_size
, offset
));
1248 /* append the data we read out to the fit buffer. */
1249 aml_append(elsectx
, aml_concatenate(fit
, buf
, fit
));
1250 aml_append(whilectx
, elsectx
);
1251 aml_append(method
, whilectx
);
1253 aml_append(dev
, method
);
1256 static void nvdimm_build_nvdimm_devices(Aml
*root_dev
, uint32_t ram_slots
)
1260 for (slot
= 0; slot
< ram_slots
; slot
++) {
1261 uint32_t handle
= nvdimm_slot_to_handle(slot
);
1264 nvdimm_dev
= aml_device("NV%02X", slot
);
1267 * ACPI 6.0: 9.20 NVDIMM Devices:
1269 * _ADR object that is used to supply OSPM with unique address
1270 * of the NVDIMM device. This is done by returning the NFIT Device
1271 * handle that is used to identify the associated entries in ACPI
1272 * table NFIT or _FIT.
1274 aml_append(nvdimm_dev
, aml_name_decl("_ADR", aml_int(handle
)));
1276 nvdimm_build_device_dsm(nvdimm_dev
, handle
);
1277 aml_append(root_dev
, nvdimm_dev
);
1281 static void nvdimm_build_ssdt(GArray
*table_offsets
, GArray
*table_data
,
1283 NVDIMMState
*nvdimm_state
,
1286 Aml
*ssdt
, *sb_scope
, *dev
;
1287 int mem_addr_offset
, nvdimm_ssdt
;
1289 acpi_add_table(table_offsets
, table_data
);
1291 ssdt
= init_aml_allocator();
1292 acpi_data_push(ssdt
->buf
, sizeof(AcpiTableHeader
));
1294 sb_scope
= aml_scope("\\_SB");
1296 dev
= aml_device("NVDR");
1299 * ACPI 6.0: 9.20 NVDIMM Devices:
1301 * The ACPI Name Space device uses _HID of ACPI0012 to identify the root
1302 * NVDIMM interface device. Platform firmware is required to contain one
1303 * such device in _SB scope if NVDIMMs support is exposed by platform to
1305 * For each NVDIMM present or intended to be supported by platform,
1306 * platform firmware also exposes an ACPI Namespace Device under the
1309 aml_append(dev
, aml_name_decl("_HID", aml_string("ACPI0012")));
1311 nvdimm_build_common_dsm(dev
, nvdimm_state
);
1313 /* 0 is reserved for root device. */
1314 nvdimm_build_device_dsm(dev
, 0);
1315 nvdimm_build_fit(dev
);
1317 nvdimm_build_nvdimm_devices(dev
, ram_slots
);
1319 aml_append(sb_scope
, dev
);
1320 aml_append(ssdt
, sb_scope
);
1322 nvdimm_ssdt
= table_data
->len
;
1324 /* copy AML table into ACPI tables blob and patch header there */
1325 g_array_append_vals(table_data
, ssdt
->buf
->data
, ssdt
->buf
->len
);
1326 mem_addr_offset
= build_append_named_dword(table_data
,
1327 NVDIMM_ACPI_MEM_ADDR
);
1329 bios_linker_loader_alloc(linker
,
1330 NVDIMM_DSM_MEM_FILE
, nvdimm_state
->dsm_mem
,
1331 sizeof(NvdimmDsmIn
), false /* high memory */);
1332 bios_linker_loader_add_pointer(linker
,
1333 ACPI_BUILD_TABLE_FILE
, mem_addr_offset
, sizeof(uint32_t),
1334 NVDIMM_DSM_MEM_FILE
, 0);
1335 build_header(linker
, table_data
,
1336 (void *)(table_data
->data
+ nvdimm_ssdt
),
1337 "SSDT", table_data
->len
- nvdimm_ssdt
, 1, NULL
, "NVDIMM");
1338 free_aml_allocator();
1341 void nvdimm_build_acpi(GArray
*table_offsets
, GArray
*table_data
,
1342 BIOSLinker
*linker
, NVDIMMState
*state
,
1345 GSList
*device_list
;
1347 /* no nvdimm device can be plugged. */
1352 nvdimm_build_ssdt(table_offsets
, table_data
, linker
, state
,
1355 device_list
= nvdimm_get_device_list();
1356 /* no NVDIMM device is plugged. */
1361 nvdimm_build_nfit(state
, table_offsets
, table_data
, linker
);
1362 g_slist_free(device_list
);