4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/core/cpu.h"
24 #include "sysemu/hw_accel.h"
25 #include "qemu/notify.h"
27 #include "qemu/main-loop.h"
29 #include "exec/cpu-common.h"
30 #include "qemu/error-report.h"
31 #include "qemu/qemu-print.h"
32 #include "sysemu/tcg.h"
33 #include "hw/boards.h"
34 #include "hw/qdev-properties.h"
35 #include "trace/trace-root.h"
36 #include "qemu/plugin.h"
37 #include "sysemu/hw_accel.h"
39 CPUState
*cpu_by_arch_id(int64_t id
)
44 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
46 if (cc
->get_arch_id(cpu
) == id
) {
53 bool cpu_exists(int64_t id
)
55 return !!cpu_by_arch_id(id
);
58 CPUState
*cpu_create(const char *typename
)
61 CPUState
*cpu
= CPU(object_new(typename
));
62 if (!qdev_realize(DEVICE(cpu
), NULL
, &err
)) {
63 error_report_err(err
);
64 object_unref(OBJECT(cpu
));
70 bool cpu_paging_enabled(const CPUState
*cpu
)
72 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
74 return cc
->get_paging_enabled(cpu
);
77 static bool cpu_common_get_paging_enabled(const CPUState
*cpu
)
82 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
85 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
87 cc
->get_memory_mapping(cpu
, list
, errp
);
90 static void cpu_common_get_memory_mapping(CPUState
*cpu
,
91 MemoryMappingList
*list
,
94 error_setg(errp
, "Obtaining memory mappings is unsupported on this CPU.");
97 /* Resetting the IRQ comes from across the code base so we take the
98 * BQL here if we need to. cpu_interrupt assumes it is held.*/
99 void cpu_reset_interrupt(CPUState
*cpu
, int mask
)
101 bool need_lock
= !qemu_mutex_iothread_locked();
104 qemu_mutex_lock_iothread();
106 cpu
->interrupt_request
&= ~mask
;
108 qemu_mutex_unlock_iothread();
112 void cpu_exit(CPUState
*cpu
)
114 qatomic_set(&cpu
->exit_request
, 1);
115 /* Ensure cpu_exec will see the exit request after TCG has exited. */
117 qatomic_set(&cpu
->icount_decr_ptr
->u16
.high
, -1);
120 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
123 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
125 return (*cc
->write_elf32_qemunote
)(f
, cpu
, opaque
);
128 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f
,
129 CPUState
*cpu
, void *opaque
)
134 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
135 int cpuid
, void *opaque
)
137 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
139 return (*cc
->write_elf32_note
)(f
, cpu
, cpuid
, opaque
);
142 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f
,
143 CPUState
*cpu
, int cpuid
,
149 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
152 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
154 return (*cc
->write_elf64_qemunote
)(f
, cpu
, opaque
);
157 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f
,
158 CPUState
*cpu
, void *opaque
)
163 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
164 int cpuid
, void *opaque
)
166 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
168 return (*cc
->write_elf64_note
)(f
, cpu
, cpuid
, opaque
);
171 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f
,
172 CPUState
*cpu
, int cpuid
,
179 static int cpu_common_gdb_read_register(CPUState
*cpu
, GByteArray
*buf
, int reg
)
184 static int cpu_common_gdb_write_register(CPUState
*cpu
, uint8_t *buf
, int reg
)
189 static bool cpu_common_debug_check_watchpoint(CPUState
*cpu
, CPUWatchpoint
*wp
)
191 /* If no extra check is required, QEMU watchpoint match can be considered
192 * as an architectural match.
197 static bool cpu_common_virtio_is_big_endian(CPUState
*cpu
)
199 return target_words_bigendian();
202 #if !defined(CONFIG_USER_ONLY)
203 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
)
205 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
206 GuestPanicInformation
*res
= NULL
;
208 if (cc
->get_crash_info
) {
209 res
= cc
->get_crash_info(cpu
);
215 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
)
217 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
219 if (cc
->dump_state
) {
220 cpu_synchronize_state(cpu
);
221 cc
->dump_state(cpu
, f
, flags
);
225 void cpu_dump_statistics(CPUState
*cpu
, int flags
)
227 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
229 if (cc
->dump_statistics
) {
230 cc
->dump_statistics(cpu
, flags
);
234 void cpu_reset(CPUState
*cpu
)
236 device_cold_reset(DEVICE(cpu
));
238 trace_guest_cpu_reset(cpu
);
241 static void cpu_common_reset(DeviceState
*dev
)
243 CPUState
*cpu
= CPU(dev
);
244 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
246 if (qemu_loglevel_mask(CPU_LOG_RESET
)) {
247 qemu_log("CPU Reset (CPU %d)\n", cpu
->cpu_index
);
248 log_cpu_state(cpu
, cc
->reset_dump_flags
);
251 cpu
->interrupt_request
= 0;
252 cpu
->halted
= cpu
->start_powered_off
;
254 cpu
->icount_extra
= 0;
255 qatomic_set(&cpu
->icount_decr_ptr
->u32
, 0);
257 cpu
->exception_index
= -1;
258 cpu
->crash_occurred
= false;
259 cpu
->cflags_next_tb
= -1;
262 cpu_tb_jmp_cache_clear(cpu
);
264 tcg_flush_softmmu_tlb(cpu
);
268 static bool cpu_common_has_work(CPUState
*cs
)
273 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
)
275 CPUClass
*cc
= CPU_CLASS(object_class_by_name(typename
));
277 assert(cpu_model
&& cc
->class_by_name
);
278 return cc
->class_by_name(cpu_model
);
281 static void cpu_common_parse_features(const char *typename
, char *features
,
285 static bool cpu_globals_initialized
;
286 /* Single "key=value" string being parsed */
287 char *featurestr
= features
? strtok(features
, ",") : NULL
;
289 /* should be called only once, catch invalid users */
290 assert(!cpu_globals_initialized
);
291 cpu_globals_initialized
= true;
294 val
= strchr(featurestr
, '=');
296 GlobalProperty
*prop
= g_new0(typeof(*prop
), 1);
299 prop
->driver
= typename
;
300 prop
->property
= g_strdup(featurestr
);
301 prop
->value
= g_strdup(val
);
302 qdev_prop_register_global(prop
);
304 error_setg(errp
, "Expected key=value format, found %s.",
308 featurestr
= strtok(NULL
, ",");
312 static void cpu_common_realizefn(DeviceState
*dev
, Error
**errp
)
314 CPUState
*cpu
= CPU(dev
);
315 Object
*machine
= qdev_get_machine();
317 /* qdev_get_machine() can return something that's not TYPE_MACHINE
318 * if this is one of the user-only emulators; in that case there's
319 * no need to check the ignore_memory_transaction_failures board flag.
321 if (object_dynamic_cast(machine
, TYPE_MACHINE
)) {
322 ObjectClass
*oc
= object_get_class(machine
);
323 MachineClass
*mc
= MACHINE_CLASS(oc
);
326 cpu
->ignore_memory_transaction_failures
=
327 mc
->ignore_memory_transaction_failures
;
331 if (dev
->hotplugged
) {
332 cpu_synchronize_post_init(cpu
);
336 /* NOTE: latest generic point where the cpu is fully realized */
337 trace_init_vcpu(cpu
);
340 static void cpu_common_unrealizefn(DeviceState
*dev
)
342 CPUState
*cpu
= CPU(dev
);
343 /* NOTE: latest generic point before the cpu is fully unrealized */
344 trace_fini_vcpu(cpu
);
345 qemu_plugin_vcpu_exit_hook(cpu
);
346 cpu_exec_unrealizefn(cpu
);
349 static void cpu_common_initfn(Object
*obj
)
351 CPUState
*cpu
= CPU(obj
);
352 CPUClass
*cc
= CPU_GET_CLASS(obj
);
354 cpu
->cpu_index
= UNASSIGNED_CPU_INDEX
;
355 cpu
->cluster_index
= UNASSIGNED_CLUSTER_INDEX
;
356 cpu
->gdb_num_regs
= cpu
->gdb_num_g_regs
= cc
->gdb_num_core_regs
;
357 /* *-user doesn't have configurable SMP topology */
358 /* the default value is changed by qemu_init_vcpu() for softmmu */
362 qemu_mutex_init(&cpu
->work_mutex
);
363 QSIMPLEQ_INIT(&cpu
->work_list
);
364 QTAILQ_INIT(&cpu
->breakpoints
);
365 QTAILQ_INIT(&cpu
->watchpoints
);
367 cpu_exec_initfn(cpu
);
370 static void cpu_common_finalize(Object
*obj
)
372 CPUState
*cpu
= CPU(obj
);
374 qemu_mutex_destroy(&cpu
->work_mutex
);
377 static int64_t cpu_common_get_arch_id(CPUState
*cpu
)
379 return cpu
->cpu_index
;
382 static vaddr
cpu_adjust_watchpoint_address(CPUState
*cpu
, vaddr addr
, int len
)
387 static Property cpu_common_props
[] = {
388 #ifndef CONFIG_USER_ONLY
389 /* Create a memory property for softmmu CPU object,
390 * so users can wire up its memory. (This can't go in hw/core/cpu.c
391 * because that file is compiled only once for both user-mode
392 * and system builds.) The default if no link is set up is to use
393 * the system address space.
395 DEFINE_PROP_LINK("memory", CPUState
, memory
, TYPE_MEMORY_REGION
,
398 DEFINE_PROP_BOOL("start-powered-off", CPUState
, start_powered_off
, false),
399 DEFINE_PROP_END_OF_LIST(),
402 static void cpu_class_init(ObjectClass
*klass
, void *data
)
404 DeviceClass
*dc
= DEVICE_CLASS(klass
);
405 CPUClass
*k
= CPU_CLASS(klass
);
407 k
->parse_features
= cpu_common_parse_features
;
408 k
->get_arch_id
= cpu_common_get_arch_id
;
409 k
->has_work
= cpu_common_has_work
;
410 k
->get_paging_enabled
= cpu_common_get_paging_enabled
;
411 k
->get_memory_mapping
= cpu_common_get_memory_mapping
;
412 k
->write_elf32_qemunote
= cpu_common_write_elf32_qemunote
;
413 k
->write_elf32_note
= cpu_common_write_elf32_note
;
414 k
->write_elf64_qemunote
= cpu_common_write_elf64_qemunote
;
415 k
->write_elf64_note
= cpu_common_write_elf64_note
;
416 k
->gdb_read_register
= cpu_common_gdb_read_register
;
417 k
->gdb_write_register
= cpu_common_gdb_write_register
;
418 k
->virtio_is_big_endian
= cpu_common_virtio_is_big_endian
;
419 k
->debug_check_watchpoint
= cpu_common_debug_check_watchpoint
;
420 k
->adjust_watchpoint_address
= cpu_adjust_watchpoint_address
;
421 set_bit(DEVICE_CATEGORY_CPU
, dc
->categories
);
422 dc
->realize
= cpu_common_realizefn
;
423 dc
->unrealize
= cpu_common_unrealizefn
;
424 dc
->reset
= cpu_common_reset
;
425 device_class_set_props(dc
, cpu_common_props
);
427 * Reason: CPUs still need special care by board code: wiring up
428 * IRQs, adding reset handlers, halting non-first CPUs, ...
430 dc
->user_creatable
= false;
433 static const TypeInfo cpu_type_info
= {
435 .parent
= TYPE_DEVICE
,
436 .instance_size
= sizeof(CPUState
),
437 .instance_init
= cpu_common_initfn
,
438 .instance_finalize
= cpu_common_finalize
,
440 .class_size
= sizeof(CPUClass
),
441 .class_init
= cpu_class_init
,
444 static void cpu_register_types(void)
446 type_register_static(&cpu_type_info
);
449 type_init(cpu_register_types
)