spapr: Fixes a leak in CAS
[qemu/ar7.git] / hw / sh4 / shix.c
blob2fc29154287168364de2f0e82496697bc8a722af
1 /*
2 * SHIX 2.0 board description
4 * Copyright (c) 2005 Samuel Tardieu
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 Shix 2.0 board by Alexis Polti, described at
26 https://web.archive.org/web/20070917001736/perso.enst.fr/~polti/realisations/shix20
28 More information in target/sh4/README.sh4
30 #include "qemu/osdep.h"
31 #include "qapi/error.h"
32 #include "cpu.h"
33 #include "hw/sh4/sh.h"
34 #include "sysemu/sysemu.h"
35 #include "sysemu/qtest.h"
36 #include "hw/boards.h"
37 #include "hw/loader.h"
38 #include "exec/address-spaces.h"
39 #include "qemu/error-report.h"
41 #define BIOS_FILENAME "shix_bios.bin"
42 #define BIOS_ADDRESS 0xA0000000
44 static void shix_init(MachineState *machine)
46 int ret;
47 SuperHCPU *cpu;
48 struct SH7750State *s;
49 MemoryRegion *sysmem = get_system_memory();
50 MemoryRegion *rom = g_new(MemoryRegion, 1);
51 MemoryRegion *sdram = g_new(MemoryRegion, 2);
53 cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
55 /* Allocate memory space */
56 memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal);
57 memory_region_set_readonly(rom, true);
58 memory_region_add_subregion(sysmem, 0x00000000, rom);
59 memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000,
60 &error_fatal);
61 memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
62 memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000,
63 &error_fatal);
64 memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
66 /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
67 if (bios_name == NULL)
68 bios_name = BIOS_FILENAME;
69 ret = load_image_targphys(bios_name, 0, 0x4000);
70 if (ret < 0 && !qtest_enabled()) {
71 error_report("Could not load SHIX bios '%s'", bios_name);
72 exit(1);
75 /* Register peripherals */
76 s = sh7750_init(cpu, sysmem);
77 /* XXXXX Check success */
78 tc58128_init(s, "shix_linux_nand.bin", NULL);
81 static void shix_machine_init(MachineClass *mc)
83 mc->desc = "shix card";
84 mc->init = shix_init;
85 mc->is_default = 1;
86 mc->default_cpu_type = TYPE_SH7750R_CPU;
89 DEFINE_MACHINE("shix", shix_machine_init)