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target/riscv: add vector index load and store instructions
[qemu/ar7.git] / memory.c
blob9200b201305b16f391e840a896768c254785c36f
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "cpu.h"
19 #include "exec/memory.h"
20 #include "exec/address-spaces.h"
21 #include "qapi/visitor.h"
22 #include "qemu/bitops.h"
23 #include "qemu/error-report.h"
24 #include "qemu/main-loop.h"
25 #include "qemu/qemu-print.h"
26 #include "qom/object.h"
27 #include "trace-root.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/runstate.h"
33 #include "sysemu/tcg.h"
34 #include "sysemu/accel.h"
35 #include "hw/boards.h"
36 #include "migration/vmstate.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 bool global_dirty_log;
44
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
137 if (_listener->_callback) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
176 {
177 if (int128_lt(a->addr.start, b->addr.start)) {
178 return true;
179 } else if (int128_gt(a->addr.start, b->addr.start)) {
180 return false;
181 } else if (int128_lt(a->addr.size, b->addr.size)) {
182 return true;
183 } else if (int128_gt(a->addr.size, b->addr.size)) {
184 return false;
185 } else if (a->match_data < b->match_data) {
186 return true;
187 } else if (a->match_data > b->match_data) {
188 return false;
189 } else if (a->match_data) {
190 if (a->data < b->data) {
191 return true;
192 } else if (a->data > b->data) {
193 return false;
194 }
195 }
196 if (a->e < b->e) {
197 return true;
198 } else if (a->e > b->e) {
199 return false;
200 }
201 return false;
202 }
203
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
206 {
207 return !memory_region_ioeventfd_before(a, b)
208 && !memory_region_ioeventfd_before(b, a);
209 }
210
211 /* Range of memory in the global map. Addresses are absolute. */
212 struct FlatRange {
213 MemoryRegion *mr;
214 hwaddr offset_in_region;
215 AddrRange addr;
216 uint8_t dirty_log_mask;
217 bool romd_mode;
218 bool readonly;
219 bool nonvolatile;
220 };
221
222 #define FOR_EACH_FLAT_RANGE(var, view) \
223 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
224
225 static inline MemoryRegionSection
226 section_from_flat_range(FlatRange *fr, FlatView *fv)
227 {
228 return (MemoryRegionSection) {
229 .mr = fr->mr,
230 .fv = fv,
231 .offset_within_region = fr->offset_in_region,
232 .size = fr->addr.size,
233 .offset_within_address_space = int128_get64(fr->addr.start),
234 .readonly = fr->readonly,
235 .nonvolatile = fr->nonvolatile,
236 };
237 }
238
239 static bool flatrange_equal(FlatRange *a, FlatRange *b)
240 {
241 return a->mr == b->mr
242 && addrrange_equal(a->addr, b->addr)
243 && a->offset_in_region == b->offset_in_region
244 && a->romd_mode == b->romd_mode
245 && a->readonly == b->readonly
246 && a->nonvolatile == b->nonvolatile;
247 }
248
249 static FlatView *flatview_new(MemoryRegion *mr_root)
250 {
251 FlatView *view;
252
253 view = g_new0(FlatView, 1);
254 view->ref = 1;
255 view->root = mr_root;
256 memory_region_ref(mr_root);
257 trace_flatview_new(view, mr_root);
258
259 return view;
260 }
261
262 /* Insert a range into a given position. Caller is responsible for maintaining
263 * sorting order.
264 */
265 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
266 {
267 if (view->nr == view->nr_allocated) {
268 view->nr_allocated = MAX(2 * view->nr, 10);
269 view->ranges = g_realloc(view->ranges,
270 view->nr_allocated * sizeof(*view->ranges));
271 }
272 memmove(view->ranges + pos + 1, view->ranges + pos,
273 (view->nr - pos) * sizeof(FlatRange));
274 view->ranges[pos] = *range;
275 memory_region_ref(range->mr);
276 ++view->nr;
277 }
278
279 static void flatview_destroy(FlatView *view)
280 {
281 int i;
282
283 trace_flatview_destroy(view, view->root);
284 if (view->dispatch) {
285 address_space_dispatch_free(view->dispatch);
286 }
287 for (i = 0; i < view->nr; i++) {
288 memory_region_unref(view->ranges[i].mr);
289 }
290 g_free(view->ranges);
291 memory_region_unref(view->root);
292 g_free(view);
293 }
294
295 static bool flatview_ref(FlatView *view)
296 {
297 return atomic_fetch_inc_nonzero(&view->ref) > 0;
298 }
299
300 void flatview_unref(FlatView *view)
301 {
302 if (atomic_fetch_dec(&view->ref) == 1) {
303 trace_flatview_destroy_rcu(view, view->root);
304 assert(view->root);
305 call_rcu(view, flatview_destroy, rcu);
306 }
307 }
308
309 static bool can_merge(FlatRange *r1, FlatRange *r2)
310 {
311 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
312 && r1->mr == r2->mr
313 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
314 r1->addr.size),
315 int128_make64(r2->offset_in_region))
316 && r1->dirty_log_mask == r2->dirty_log_mask
317 && r1->romd_mode == r2->romd_mode
318 && r1->readonly == r2->readonly
319 && r1->nonvolatile == r2->nonvolatile;
320 }
321
322 /* Attempt to simplify a view by merging adjacent ranges */
323 static void flatview_simplify(FlatView *view)
324 {
325 unsigned i, j, k;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
333 ++j;
334 }
335 ++i;
336 for (k = i; k < j; k++) {
337 memory_region_unref(view->ranges[k].mr);
338 }
339 memmove(&view->ranges[i], &view->ranges[j],
340 (view->nr - j) * sizeof(view->ranges[j]));
341 view->nr -= j - i;
342 }
343 }
344
345 static bool memory_region_big_endian(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
355 {
356 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
357 switch (op & MO_SIZE) {
358 case MO_8:
359 break;
360 case MO_16:
361 *data = bswap16(*data);
362 break;
363 case MO_32:
364 *data = bswap32(*data);
365 break;
366 case MO_64:
367 *data = bswap64(*data);
368 break;
369 default:
370 g_assert_not_reached();
371 }
372 }
373 }
374
375 static inline void memory_region_shift_read_access(uint64_t *value,
376 signed shift,
377 uint64_t mask,
378 uint64_t tmp)
379 {
380 if (shift >= 0) {
381 *value |= (tmp & mask) << shift;
382 } else {
383 *value |= (tmp & mask) >> -shift;
384 }
385 }
386
387 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
388 signed shift,
389 uint64_t mask)
390 {
391 uint64_t tmp;
392
393 if (shift >= 0) {
394 tmp = (*value >> shift) & mask;
395 } else {
396 tmp = (*value << -shift) & mask;
397 }
398
399 return tmp;
400 }
401
402 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
403 {
404 MemoryRegion *root;
405 hwaddr abs_addr = offset;
406
407 abs_addr += mr->addr;
408 for (root = mr; root->container; ) {
409 root = root->container;
410 abs_addr += root->addr;
411 }
412
413 return abs_addr;
414 }
415
416 static int get_cpu_index(void)
417 {
418 if (current_cpu) {
419 return current_cpu->cpu_index;
420 }
421 return -1;
422 }
423
424 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 signed shift,
429 uint64_t mask,
430 MemTxAttrs attrs)
431 {
432 uint64_t tmp;
433
434 tmp = mr->ops->read(mr->opaque, addr, size);
435 if (mr->subpage) {
436 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
437 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
438 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
439 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
440 }
441 memory_region_shift_read_access(value, shift, mask, tmp);
442 return MEMTX_OK;
443 }
444
445 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
446 hwaddr addr,
447 uint64_t *value,
448 unsigned size,
449 signed shift,
450 uint64_t mask,
451 MemTxAttrs attrs)
452 {
453 uint64_t tmp = 0;
454 MemTxResult r;
455
456 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
457 if (mr->subpage) {
458 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
459 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
460 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
461 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
462 }
463 memory_region_shift_read_access(value, shift, mask, tmp);
464 return r;
465 }
466
467 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
468 hwaddr addr,
469 uint64_t *value,
470 unsigned size,
471 signed shift,
472 uint64_t mask,
473 MemTxAttrs attrs)
474 {
475 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
476
477 if (mr->subpage) {
478 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
479 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
480 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
481 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
482 }
483 mr->ops->write(mr->opaque, addr, tmp, size);
484 return MEMTX_OK;
485 }
486
487 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
488 hwaddr addr,
489 uint64_t *value,
490 unsigned size,
491 signed shift,
492 uint64_t mask,
493 MemTxAttrs attrs)
494 {
495 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
496
497 if (mr->subpage) {
498 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
499 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
500 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
501 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
502 }
503 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
504 }
505
506 static MemTxResult access_with_adjusted_size(hwaddr addr,
507 uint64_t *value,
508 unsigned size,
509 unsigned access_size_min,
510 unsigned access_size_max,
511 MemTxResult (*access_fn)
512 (MemoryRegion *mr,
513 hwaddr addr,
514 uint64_t *value,
515 unsigned size,
516 signed shift,
517 uint64_t mask,
518 MemTxAttrs attrs),
519 MemoryRegion *mr,
520 MemTxAttrs attrs)
521 {
522 uint64_t access_mask;
523 unsigned access_size;
524 unsigned i;
525 MemTxResult r = MEMTX_OK;
526
527 if (!access_size_min) {
528 access_size_min = 1;
529 }
530 if (!access_size_max) {
531 access_size_max = 4;
532 }
533
534 /* FIXME: support unaligned access? */
535 access_size = MAX(MIN(size, access_size_max), access_size_min);
536 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
537 if (memory_region_big_endian(mr)) {
538 for (i = 0; i < size; i += access_size) {
539 r |= access_fn(mr, addr + i, value, access_size,
540 (size - access_size - i) * 8, access_mask, attrs);
541 }
542 } else {
543 for (i = 0; i < size; i += access_size) {
544 r |= access_fn(mr, addr + i, value, access_size, i * 8,
545 access_mask, attrs);
546 }
547 }
548 return r;
549 }
550
551 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
552 {
553 AddressSpace *as;
554
555 while (mr->container) {
556 mr = mr->container;
557 }
558 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
559 if (mr == as->root) {
560 return as;
561 }
562 }
563 return NULL;
564 }
565
566 /* Render a memory region into the global view. Ranges in @view obscure
567 * ranges in @mr.
568 */
569 static void render_memory_region(FlatView *view,
570 MemoryRegion *mr,
571 Int128 base,
572 AddrRange clip,
573 bool readonly,
574 bool nonvolatile)
575 {
576 MemoryRegion *subregion;
577 unsigned i;
578 hwaddr offset_in_region;
579 Int128 remain;
580 Int128 now;
581 FlatRange fr;
582 AddrRange tmp;
583
584 if (!mr->enabled) {
585 return;
586 }
587
588 int128_addto(&base, int128_make64(mr->addr));
589 readonly |= mr->readonly;
590 nonvolatile |= mr->nonvolatile;
591
592 tmp = addrrange_make(base, mr->size);
593
594 if (!addrrange_intersects(tmp, clip)) {
595 return;
596 }
597
598 clip = addrrange_intersection(tmp, clip);
599
600 if (mr->alias) {
601 int128_subfrom(&base, int128_make64(mr->alias->addr));
602 int128_subfrom(&base, int128_make64(mr->alias_offset));
603 render_memory_region(view, mr->alias, base, clip,
604 readonly, nonvolatile);
605 return;
606 }
607
608 /* Render subregions in priority order. */
609 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
610 render_memory_region(view, subregion, base, clip,
611 readonly, nonvolatile);
612 }
613
614 if (!mr->terminates) {
615 return;
616 }
617
618 offset_in_region = int128_get64(int128_sub(clip.start, base));
619 base = clip.start;
620 remain = clip.size;
621
622 fr.mr = mr;
623 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
624 fr.romd_mode = mr->romd_mode;
625 fr.readonly = readonly;
626 fr.nonvolatile = nonvolatile;
627
628 /* Render the region itself into any gaps left by the current view. */
629 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
630 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
631 continue;
632 }
633 if (int128_lt(base, view->ranges[i].addr.start)) {
634 now = int128_min(remain,
635 int128_sub(view->ranges[i].addr.start, base));
636 fr.offset_in_region = offset_in_region;
637 fr.addr = addrrange_make(base, now);
638 flatview_insert(view, i, &fr);
639 ++i;
640 int128_addto(&base, now);
641 offset_in_region += int128_get64(now);
642 int128_subfrom(&remain, now);
643 }
644 now = int128_sub(int128_min(int128_add(base, remain),
645 addrrange_end(view->ranges[i].addr)),
646 base);
647 int128_addto(&base, now);
648 offset_in_region += int128_get64(now);
649 int128_subfrom(&remain, now);
650 }
651 if (int128_nz(remain)) {
652 fr.offset_in_region = offset_in_region;
653 fr.addr = addrrange_make(base, remain);
654 flatview_insert(view, i, &fr);
655 }
656 }
657
658 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
659 {
660 while (mr->enabled) {
661 if (mr->alias) {
662 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
663 /* The alias is included in its entirety. Use it as
664 * the "real" root, so that we can share more FlatViews.
665 */
666 mr = mr->alias;
667 continue;
668 }
669 } else if (!mr->terminates) {
670 unsigned int found = 0;
671 MemoryRegion *child, *next = NULL;
672 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
673 if (child->enabled) {
674 if (++found > 1) {
675 next = NULL;
676 break;
677 }
678 if (!child->addr && int128_ge(mr->size, child->size)) {
679 /* A child is included in its entirety. If it's the only
680 * enabled one, use it in the hope of finding an alias down the
681 * way. This will also let us share FlatViews.
682 */
683 next = child;
684 }
685 }
686 }
687 if (found == 0) {
688 return NULL;
689 }
690 if (next) {
691 mr = next;
692 continue;
693 }
694 }
695
696 return mr;
697 }
698
699 return NULL;
700 }
701
702 /* Render a memory topology into a list of disjoint absolute ranges. */
703 static FlatView *generate_memory_topology(MemoryRegion *mr)
704 {
705 int i;
706 FlatView *view;
707
708 view = flatview_new(mr);
709
710 if (mr) {
711 render_memory_region(view, mr, int128_zero(),
712 addrrange_make(int128_zero(), int128_2_64()),
713 false, false);
714 }
715 flatview_simplify(view);
716
717 view->dispatch = address_space_dispatch_new(view);
718 for (i = 0; i < view->nr; i++) {
719 MemoryRegionSection mrs =
720 section_from_flat_range(&view->ranges[i], view);
721 flatview_add_to_dispatch(view, &mrs);
722 }
723 address_space_dispatch_compact(view->dispatch);
724 g_hash_table_replace(flat_views, mr, view);
725
726 return view;
727 }
728
729 static void address_space_add_del_ioeventfds(AddressSpace *as,
730 MemoryRegionIoeventfd *fds_new,
731 unsigned fds_new_nb,
732 MemoryRegionIoeventfd *fds_old,
733 unsigned fds_old_nb)
734 {
735 unsigned iold, inew;
736 MemoryRegionIoeventfd *fd;
737 MemoryRegionSection section;
738
739 /* Generate a symmetric difference of the old and new fd sets, adding
740 * and deleting as necessary.
741 */
742
743 iold = inew = 0;
744 while (iold < fds_old_nb || inew < fds_new_nb) {
745 if (iold < fds_old_nb
746 && (inew == fds_new_nb
747 || memory_region_ioeventfd_before(&fds_old[iold],
748 &fds_new[inew]))) {
749 fd = &fds_old[iold];
750 section = (MemoryRegionSection) {
751 .fv = address_space_to_flatview(as),
752 .offset_within_address_space = int128_get64(fd->addr.start),
753 .size = fd->addr.size,
754 };
755 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
756 fd->match_data, fd->data, fd->e);
757 ++iold;
758 } else if (inew < fds_new_nb
759 && (iold == fds_old_nb
760 || memory_region_ioeventfd_before(&fds_new[inew],
761 &fds_old[iold]))) {
762 fd = &fds_new[inew];
763 section = (MemoryRegionSection) {
764 .fv = address_space_to_flatview(as),
765 .offset_within_address_space = int128_get64(fd->addr.start),
766 .size = fd->addr.size,
767 };
768 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
769 fd->match_data, fd->data, fd->e);
770 ++inew;
771 } else {
772 ++iold;
773 ++inew;
774 }
775 }
776 }
777
778 FlatView *address_space_get_flatview(AddressSpace *as)
779 {
780 FlatView *view;
781
782 RCU_READ_LOCK_GUARD();
783 do {
784 view = address_space_to_flatview(as);
785 /* If somebody has replaced as->current_map concurrently,
786 * flatview_ref returns false.
787 */
788 } while (!flatview_ref(view));
789 return view;
790 }
791
792 static void address_space_update_ioeventfds(AddressSpace *as)
793 {
794 FlatView *view;
795 FlatRange *fr;
796 unsigned ioeventfd_nb = 0;
797 unsigned ioeventfd_max;
798 MemoryRegionIoeventfd *ioeventfds;
799 AddrRange tmp;
800 unsigned i;
801
802 /*
803 * It is likely that the number of ioeventfds hasn't changed much, so use
804 * the previous size as the starting value, with some headroom to avoid
805 * gratuitous reallocations.
806 */
807 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
808 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
809
810 view = address_space_get_flatview(as);
811 FOR_EACH_FLAT_RANGE(fr, view) {
812 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
813 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
814 int128_sub(fr->addr.start,
815 int128_make64(fr->offset_in_region)));
816 if (addrrange_intersects(fr->addr, tmp)) {
817 ++ioeventfd_nb;
818 if (ioeventfd_nb > ioeventfd_max) {
819 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
820 ioeventfds = g_realloc(ioeventfds,
821 ioeventfd_max * sizeof(*ioeventfds));
822 }
823 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
824 ioeventfds[ioeventfd_nb-1].addr = tmp;
825 }
826 }
827 }
828
829 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
830 as->ioeventfds, as->ioeventfd_nb);
831
832 g_free(as->ioeventfds);
833 as->ioeventfds = ioeventfds;
834 as->ioeventfd_nb = ioeventfd_nb;
835 flatview_unref(view);
836 }
837
838 /*
839 * Notify the memory listeners about the coalesced IO change events of
840 * range `cmr'. Only the part that has intersection of the specified
841 * FlatRange will be sent.
842 */
843 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
844 CoalescedMemoryRange *cmr, bool add)
845 {
846 AddrRange tmp;
847
848 tmp = addrrange_shift(cmr->addr,
849 int128_sub(fr->addr.start,
850 int128_make64(fr->offset_in_region)));
851 if (!addrrange_intersects(tmp, fr->addr)) {
852 return;
853 }
854 tmp = addrrange_intersection(tmp, fr->addr);
855
856 if (add) {
857 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
858 int128_get64(tmp.start),
859 int128_get64(tmp.size));
860 } else {
861 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
862 int128_get64(tmp.start),
863 int128_get64(tmp.size));
864 }
865 }
866
867 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
868 {
869 CoalescedMemoryRange *cmr;
870
871 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
872 flat_range_coalesced_io_notify(fr, as, cmr, false);
873 }
874 }
875
876 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
877 {
878 MemoryRegion *mr = fr->mr;
879 CoalescedMemoryRange *cmr;
880
881 if (QTAILQ_EMPTY(&mr->coalesced)) {
882 return;
883 }
884
885 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
886 flat_range_coalesced_io_notify(fr, as, cmr, true);
887 }
888 }
889
890 static void address_space_update_topology_pass(AddressSpace *as,
891 const FlatView *old_view,
892 const FlatView *new_view,
893 bool adding)
894 {
895 unsigned iold, inew;
896 FlatRange *frold, *frnew;
897
898 /* Generate a symmetric difference of the old and new memory maps.
899 * Kill ranges in the old map, and instantiate ranges in the new map.
900 */
901 iold = inew = 0;
902 while (iold < old_view->nr || inew < new_view->nr) {
903 if (iold < old_view->nr) {
904 frold = &old_view->ranges[iold];
905 } else {
906 frold = NULL;
907 }
908 if (inew < new_view->nr) {
909 frnew = &new_view->ranges[inew];
910 } else {
911 frnew = NULL;
912 }
913
914 if (frold
915 && (!frnew
916 || int128_lt(frold->addr.start, frnew->addr.start)
917 || (int128_eq(frold->addr.start, frnew->addr.start)
918 && !flatrange_equal(frold, frnew)))) {
919 /* In old but not in new, or in both but attributes changed. */
920
921 if (!adding) {
922 flat_range_coalesced_io_del(frold, as);
923 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
924 }
925
926 ++iold;
927 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
928 /* In both and unchanged (except logging may have changed) */
929
930 if (adding) {
931 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
932 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
933 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
934 frold->dirty_log_mask,
935 frnew->dirty_log_mask);
936 }
937 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
938 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
939 frold->dirty_log_mask,
940 frnew->dirty_log_mask);
941 }
942 }
943
944 ++iold;
945 ++inew;
946 } else {
947 /* In new */
948
949 if (adding) {
950 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
951 flat_range_coalesced_io_add(frnew, as);
952 }
953
954 ++inew;
955 }
956 }
957 }
958
959 static void flatviews_init(void)
960 {
961 static FlatView *empty_view;
962
963 if (flat_views) {
964 return;
965 }
966
967 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
968 (GDestroyNotify) flatview_unref);
969 if (!empty_view) {
970 empty_view = generate_memory_topology(NULL);
971 /* We keep it alive forever in the global variable. */
972 flatview_ref(empty_view);
973 } else {
974 g_hash_table_replace(flat_views, NULL, empty_view);
975 flatview_ref(empty_view);
976 }
977 }
978
979 static void flatviews_reset(void)
980 {
981 AddressSpace *as;
982
983 if (flat_views) {
984 g_hash_table_unref(flat_views);
985 flat_views = NULL;
986 }
987 flatviews_init();
988
989 /* Render unique FVs */
990 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
991 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
992
993 if (g_hash_table_lookup(flat_views, physmr)) {
994 continue;
995 }
996
997 generate_memory_topology(physmr);
998 }
999 }
1000
1001 static void address_space_set_flatview(AddressSpace *as)
1002 {
1003 FlatView *old_view = address_space_to_flatview(as);
1004 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1005 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1006
1007 assert(new_view);
1008
1009 if (old_view == new_view) {
1010 return;
1011 }
1012
1013 if (old_view) {
1014 flatview_ref(old_view);
1015 }
1016
1017 flatview_ref(new_view);
1018
1019 if (!QTAILQ_EMPTY(&as->listeners)) {
1020 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1021
1022 if (!old_view2) {
1023 old_view2 = &tmpview;
1024 }
1025 address_space_update_topology_pass(as, old_view2, new_view, false);
1026 address_space_update_topology_pass(as, old_view2, new_view, true);
1027 }
1028
1029 /* Writes are protected by the BQL. */
1030 atomic_rcu_set(&as->current_map, new_view);
1031 if (old_view) {
1032 flatview_unref(old_view);
1033 }
1034
1035 /* Note that all the old MemoryRegions are still alive up to this
1036 * point. This relieves most MemoryListeners from the need to
1037 * ref/unref the MemoryRegions they get---unless they use them
1038 * outside the iothread mutex, in which case precise reference
1039 * counting is necessary.
1040 */
1041 if (old_view) {
1042 flatview_unref(old_view);
1043 }
1044 }
1045
1046 static void address_space_update_topology(AddressSpace *as)
1047 {
1048 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1049
1050 flatviews_init();
1051 if (!g_hash_table_lookup(flat_views, physmr)) {
1052 generate_memory_topology(physmr);
1053 }
1054 address_space_set_flatview(as);
1055 }
1056
1057 void memory_region_transaction_begin(void)
1058 {
1059 qemu_flush_coalesced_mmio_buffer();
1060 ++memory_region_transaction_depth;
1061 }
1062
1063 void memory_region_transaction_commit(void)
1064 {
1065 AddressSpace *as;
1066
1067 assert(memory_region_transaction_depth);
1068 assert(qemu_mutex_iothread_locked());
1069
1070 --memory_region_transaction_depth;
1071 if (!memory_region_transaction_depth) {
1072 if (memory_region_update_pending) {
1073 flatviews_reset();
1074
1075 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1076
1077 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1078 address_space_set_flatview(as);
1079 address_space_update_ioeventfds(as);
1080 }
1081 memory_region_update_pending = false;
1082 ioeventfd_update_pending = false;
1083 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1084 } else if (ioeventfd_update_pending) {
1085 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1086 address_space_update_ioeventfds(as);
1087 }
1088 ioeventfd_update_pending = false;
1089 }
1090 }
1091 }
1092
1093 static void memory_region_destructor_none(MemoryRegion *mr)
1094 {
1095 }
1096
1097 static void memory_region_destructor_ram(MemoryRegion *mr)
1098 {
1099 qemu_ram_free(mr->ram_block);
1100 }
1101
1102 static bool memory_region_need_escape(char c)
1103 {
1104 return c == '/' || c == '[' || c == '\\' || c == ']';
1105 }
1106
1107 static char *memory_region_escape_name(const char *name)
1108 {
1109 const char *p;
1110 char *escaped, *q;
1111 uint8_t c;
1112 size_t bytes = 0;
1113
1114 for (p = name; *p; p++) {
1115 bytes += memory_region_need_escape(*p) ? 4 : 1;
1116 }
1117 if (bytes == p - name) {
1118 return g_memdup(name, bytes + 1);
1119 }
1120
1121 escaped = g_malloc(bytes + 1);
1122 for (p = name, q = escaped; *p; p++) {
1123 c = *p;
1124 if (unlikely(memory_region_need_escape(c))) {
1125 *q++ = '\\';
1126 *q++ = 'x';
1127 *q++ = "0123456789abcdef"[c >> 4];
1128 c = "0123456789abcdef"[c & 15];
1129 }
1130 *q++ = c;
1131 }
1132 *q = 0;
1133 return escaped;
1134 }
1135
1136 static void memory_region_do_init(MemoryRegion *mr,
1137 Object *owner,
1138 const char *name,
1139 uint64_t size)
1140 {
1141 mr->size = int128_make64(size);
1142 if (size == UINT64_MAX) {
1143 mr->size = int128_2_64();
1144 }
1145 mr->name = g_strdup(name);
1146 mr->owner = owner;
1147 mr->ram_block = NULL;
1148
1149 if (name) {
1150 char *escaped_name = memory_region_escape_name(name);
1151 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1152
1153 if (!owner) {
1154 owner = container_get(qdev_get_machine(), "/unattached");
1155 }
1156
1157 object_property_add_child(owner, name_array, OBJECT(mr));
1158 object_unref(OBJECT(mr));
1159 g_free(name_array);
1160 g_free(escaped_name);
1161 }
1162 }
1163
1164 void memory_region_init(MemoryRegion *mr,
1165 Object *owner,
1166 const char *name,
1167 uint64_t size)
1168 {
1169 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1170 memory_region_do_init(mr, owner, name, size);
1171 }
1172
1173 static void memory_region_get_container(Object *obj, Visitor *v,
1174 const char *name, void *opaque,
1175 Error **errp)
1176 {
1177 MemoryRegion *mr = MEMORY_REGION(obj);
1178 char *path = (char *)"";
1179
1180 if (mr->container) {
1181 path = object_get_canonical_path(OBJECT(mr->container));
1182 }
1183 visit_type_str(v, name, &path, errp);
1184 if (mr->container) {
1185 g_free(path);
1186 }
1187 }
1188
1189 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1190 const char *part)
1191 {
1192 MemoryRegion *mr = MEMORY_REGION(obj);
1193
1194 return OBJECT(mr->container);
1195 }
1196
1197 static void memory_region_get_priority(Object *obj, Visitor *v,
1198 const char *name, void *opaque,
1199 Error **errp)
1200 {
1201 MemoryRegion *mr = MEMORY_REGION(obj);
1202 int32_t value = mr->priority;
1203
1204 visit_type_int32(v, name, &value, errp);
1205 }
1206
1207 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1208 void *opaque, Error **errp)
1209 {
1210 MemoryRegion *mr = MEMORY_REGION(obj);
1211 uint64_t value = memory_region_size(mr);
1212
1213 visit_type_uint64(v, name, &value, errp);
1214 }
1215
1216 static void memory_region_initfn(Object *obj)
1217 {
1218 MemoryRegion *mr = MEMORY_REGION(obj);
1219 ObjectProperty *op;
1220
1221 mr->ops = &unassigned_mem_ops;
1222 mr->enabled = true;
1223 mr->romd_mode = true;
1224 mr->global_locking = true;
1225 mr->destructor = memory_region_destructor_none;
1226 QTAILQ_INIT(&mr->subregions);
1227 QTAILQ_INIT(&mr->coalesced);
1228
1229 op = object_property_add(OBJECT(mr), "container",
1230 "link<" TYPE_MEMORY_REGION ">",
1231 memory_region_get_container,
1232 NULL, /* memory_region_set_container */
1233 NULL, NULL);
1234 op->resolve = memory_region_resolve_container;
1235
1236 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1237 &mr->addr, OBJ_PROP_FLAG_READ);
1238 object_property_add(OBJECT(mr), "priority", "uint32",
1239 memory_region_get_priority,
1240 NULL, /* memory_region_set_priority */
1241 NULL, NULL);
1242 object_property_add(OBJECT(mr), "size", "uint64",
1243 memory_region_get_size,
1244 NULL, /* memory_region_set_size, */
1245 NULL, NULL);
1246 }
1247
1248 static void iommu_memory_region_initfn(Object *obj)
1249 {
1250 MemoryRegion *mr = MEMORY_REGION(obj);
1251
1252 mr->is_iommu = true;
1253 }
1254
1255 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1256 unsigned size)
1257 {
1258 #ifdef DEBUG_UNASSIGNED
1259 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1260 #endif
1261 return 0;
1262 }
1263
1264 static void unassigned_mem_write(void *opaque, hwaddr addr,
1265 uint64_t val, unsigned size)
1266 {
1267 #ifdef DEBUG_UNASSIGNED
1268 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1269 #endif
1270 }
1271
1272 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1273 unsigned size, bool is_write,
1274 MemTxAttrs attrs)
1275 {
1276 return false;
1277 }
1278
1279 const MemoryRegionOps unassigned_mem_ops = {
1280 .valid.accepts = unassigned_mem_accepts,
1281 .endianness = DEVICE_NATIVE_ENDIAN,
1282 };
1283
1284 static uint64_t memory_region_ram_device_read(void *opaque,
1285 hwaddr addr, unsigned size)
1286 {
1287 MemoryRegion *mr = opaque;
1288 uint64_t data = (uint64_t)~0;
1289
1290 switch (size) {
1291 case 1:
1292 data = *(uint8_t *)(mr->ram_block->host + addr);
1293 break;
1294 case 2:
1295 data = *(uint16_t *)(mr->ram_block->host + addr);
1296 break;
1297 case 4:
1298 data = *(uint32_t *)(mr->ram_block->host + addr);
1299 break;
1300 case 8:
1301 data = *(uint64_t *)(mr->ram_block->host + addr);
1302 break;
1303 }
1304
1305 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1306
1307 return data;
1308 }
1309
1310 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1311 uint64_t data, unsigned size)
1312 {
1313 MemoryRegion *mr = opaque;
1314
1315 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1316
1317 switch (size) {
1318 case 1:
1319 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1320 break;
1321 case 2:
1322 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1323 break;
1324 case 4:
1325 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1326 break;
1327 case 8:
1328 *(uint64_t *)(mr->ram_block->host + addr) = data;
1329 break;
1330 }
1331 }
1332
1333 static const MemoryRegionOps ram_device_mem_ops = {
1334 .read = memory_region_ram_device_read,
1335 .write = memory_region_ram_device_write,
1336 .endianness = DEVICE_HOST_ENDIAN,
1337 .valid = {
1338 .min_access_size = 1,
1339 .max_access_size = 8,
1340 .unaligned = true,
1341 },
1342 .impl = {
1343 .min_access_size = 1,
1344 .max_access_size = 8,
1345 .unaligned = true,
1346 },
1347 };
1348
1349 bool memory_region_access_valid(MemoryRegion *mr,
1350 hwaddr addr,
1351 unsigned size,
1352 bool is_write,
1353 MemTxAttrs attrs)
1354 {
1355 if (mr->ops->valid.accepts
1356 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1357 return false;
1358 }
1359
1360 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1361 return false;
1362 }
1363
1364 /* Treat zero as compatibility all valid */
1365 if (!mr->ops->valid.max_access_size) {
1366 return true;
1367 }
1368
1369 if (size > mr->ops->valid.max_access_size
1370 || size < mr->ops->valid.min_access_size) {
1371 return false;
1372 }
1373 return true;
1374 }
1375
1376 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1377 hwaddr addr,
1378 uint64_t *pval,
1379 unsigned size,
1380 MemTxAttrs attrs)
1381 {
1382 *pval = 0;
1383
1384 if (mr->ops->read) {
1385 return access_with_adjusted_size(addr, pval, size,
1386 mr->ops->impl.min_access_size,
1387 mr->ops->impl.max_access_size,
1388 memory_region_read_accessor,
1389 mr, attrs);
1390 } else {
1391 return access_with_adjusted_size(addr, pval, size,
1392 mr->ops->impl.min_access_size,
1393 mr->ops->impl.max_access_size,
1394 memory_region_read_with_attrs_accessor,
1395 mr, attrs);
1396 }
1397 }
1398
1399 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1400 hwaddr addr,
1401 uint64_t *pval,
1402 MemOp op,
1403 MemTxAttrs attrs)
1404 {
1405 unsigned size = memop_size(op);
1406 MemTxResult r;
1407
1408 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1409 *pval = unassigned_mem_read(mr, addr, size);
1410 return MEMTX_DECODE_ERROR;
1411 }
1412
1413 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1414 adjust_endianness(mr, pval, op);
1415 return r;
1416 }
1417
1418 /* Return true if an eventfd was signalled */
1419 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1420 hwaddr addr,
1421 uint64_t data,
1422 unsigned size,
1423 MemTxAttrs attrs)
1424 {
1425 MemoryRegionIoeventfd ioeventfd = {
1426 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1427 .data = data,
1428 };
1429 unsigned i;
1430
1431 for (i = 0; i < mr->ioeventfd_nb; i++) {
1432 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1433 ioeventfd.e = mr->ioeventfds[i].e;
1434
1435 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1436 event_notifier_set(ioeventfd.e);
1437 return true;
1438 }
1439 }
1440
1441 return false;
1442 }
1443
1444 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1445 hwaddr addr,
1446 uint64_t data,
1447 MemOp op,
1448 MemTxAttrs attrs)
1449 {
1450 unsigned size = memop_size(op);
1451
1452 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1453 unassigned_mem_write(mr, addr, data, size);
1454 return MEMTX_DECODE_ERROR;
1455 }
1456
1457 adjust_endianness(mr, &data, op);
1458
1459 if ((!kvm_eventfds_enabled()) &&
1460 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1461 return MEMTX_OK;
1462 }
1463
1464 if (mr->ops->write) {
1465 return access_with_adjusted_size(addr, &data, size,
1466 mr->ops->impl.min_access_size,
1467 mr->ops->impl.max_access_size,
1468 memory_region_write_accessor, mr,
1469 attrs);
1470 } else {
1471 return
1472 access_with_adjusted_size(addr, &data, size,
1473 mr->ops->impl.min_access_size,
1474 mr->ops->impl.max_access_size,
1475 memory_region_write_with_attrs_accessor,
1476 mr, attrs);
1477 }
1478 }
1479
1480 void memory_region_init_io(MemoryRegion *mr,
1481 Object *owner,
1482 const MemoryRegionOps *ops,
1483 void *opaque,
1484 const char *name,
1485 uint64_t size)
1486 {
1487 memory_region_init(mr, owner, name, size);
1488 mr->ops = ops ? ops : &unassigned_mem_ops;
1489 mr->opaque = opaque;
1490 mr->terminates = true;
1491 }
1492
1493 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1494 Object *owner,
1495 const char *name,
1496 uint64_t size,
1497 Error **errp)
1498 {
1499 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1500 }
1501
1502 void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1503 Object *owner,
1504 const char *name,
1505 uint64_t size,
1506 bool share,
1507 Error **errp)
1508 {
1509 Error *err = NULL;
1510 memory_region_init(mr, owner, name, size);
1511 mr->ram = true;
1512 mr->terminates = true;
1513 mr->destructor = memory_region_destructor_ram;
1514 mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
1515 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1516 if (err) {
1517 mr->size = int128_zero();
1518 object_unparent(OBJECT(mr));
1519 error_propagate(errp, err);
1520 }
1521 }
1522
1523 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1524 Object *owner,
1525 const char *name,
1526 uint64_t size,
1527 uint64_t max_size,
1528 void (*resized)(const char*,
1529 uint64_t length,
1530 void *host),
1531 Error **errp)
1532 {
1533 Error *err = NULL;
1534 memory_region_init(mr, owner, name, size);
1535 mr->ram = true;
1536 mr->terminates = true;
1537 mr->destructor = memory_region_destructor_ram;
1538 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1539 mr, &err);
1540 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1541 if (err) {
1542 mr->size = int128_zero();
1543 object_unparent(OBJECT(mr));
1544 error_propagate(errp, err);
1545 }
1546 }
1547
1548 #ifdef CONFIG_POSIX
1549 void memory_region_init_ram_from_file(MemoryRegion *mr,
1550 struct Object *owner,
1551 const char *name,
1552 uint64_t size,
1553 uint64_t align,
1554 uint32_t ram_flags,
1555 const char *path,
1556 Error **errp)
1557 {
1558 Error *err = NULL;
1559 memory_region_init(mr, owner, name, size);
1560 mr->ram = true;
1561 mr->terminates = true;
1562 mr->destructor = memory_region_destructor_ram;
1563 mr->align = align;
1564 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
1565 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1566 if (err) {
1567 mr->size = int128_zero();
1568 object_unparent(OBJECT(mr));
1569 error_propagate(errp, err);
1570 }
1571 }
1572
1573 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1574 struct Object *owner,
1575 const char *name,
1576 uint64_t size,
1577 bool share,
1578 int fd,
1579 Error **errp)
1580 {
1581 Error *err = NULL;
1582 memory_region_init(mr, owner, name, size);
1583 mr->ram = true;
1584 mr->terminates = true;
1585 mr->destructor = memory_region_destructor_ram;
1586 mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
1587 share ? RAM_SHARED : 0,
1588 fd, &err);
1589 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1590 if (err) {
1591 mr->size = int128_zero();
1592 object_unparent(OBJECT(mr));
1593 error_propagate(errp, err);
1594 }
1595 }
1596 #endif
1597
1598 void memory_region_init_ram_ptr(MemoryRegion *mr,
1599 Object *owner,
1600 const char *name,
1601 uint64_t size,
1602 void *ptr)
1603 {
1604 memory_region_init(mr, owner, name, size);
1605 mr->ram = true;
1606 mr->terminates = true;
1607 mr->destructor = memory_region_destructor_ram;
1608 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1609
1610 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1611 assert(ptr != NULL);
1612 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1613 }
1614
1615 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1616 Object *owner,
1617 const char *name,
1618 uint64_t size,
1619 void *ptr)
1620 {
1621 memory_region_init(mr, owner, name, size);
1622 mr->ram = true;
1623 mr->terminates = true;
1624 mr->ram_device = true;
1625 mr->ops = &ram_device_mem_ops;
1626 mr->opaque = mr;
1627 mr->destructor = memory_region_destructor_ram;
1628 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1629 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1630 assert(ptr != NULL);
1631 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1632 }
1633
1634 void memory_region_init_alias(MemoryRegion *mr,
1635 Object *owner,
1636 const char *name,
1637 MemoryRegion *orig,
1638 hwaddr offset,
1639 uint64_t size)
1640 {
1641 memory_region_init(mr, owner, name, size);
1642 mr->alias = orig;
1643 mr->alias_offset = offset;
1644 }
1645
1646 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1647 struct Object *owner,
1648 const char *name,
1649 uint64_t size,
1650 Error **errp)
1651 {
1652 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1653 mr->readonly = true;
1654 }
1655
1656 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1657 Object *owner,
1658 const MemoryRegionOps *ops,
1659 void *opaque,
1660 const char *name,
1661 uint64_t size,
1662 Error **errp)
1663 {
1664 Error *err = NULL;
1665 assert(ops);
1666 memory_region_init(mr, owner, name, size);
1667 mr->ops = ops;
1668 mr->opaque = opaque;
1669 mr->terminates = true;
1670 mr->rom_device = true;
1671 mr->destructor = memory_region_destructor_ram;
1672 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1673 if (err) {
1674 mr->size = int128_zero();
1675 object_unparent(OBJECT(mr));
1676 error_propagate(errp, err);
1677 }
1678 }
1679
1680 void memory_region_init_iommu(void *_iommu_mr,
1681 size_t instance_size,
1682 const char *mrtypename,
1683 Object *owner,
1684 const char *name,
1685 uint64_t size)
1686 {
1687 struct IOMMUMemoryRegion *iommu_mr;
1688 struct MemoryRegion *mr;
1689
1690 object_initialize(_iommu_mr, instance_size, mrtypename);
1691 mr = MEMORY_REGION(_iommu_mr);
1692 memory_region_do_init(mr, owner, name, size);
1693 iommu_mr = IOMMU_MEMORY_REGION(mr);
1694 mr->terminates = true; /* then re-forwards */
1695 QLIST_INIT(&iommu_mr->iommu_notify);
1696 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1697 }
1698
1699 static void memory_region_finalize(Object *obj)
1700 {
1701 MemoryRegion *mr = MEMORY_REGION(obj);
1702
1703 assert(!mr->container);
1704
1705 /* We know the region is not visible in any address space (it
1706 * does not have a container and cannot be a root either because
1707 * it has no references, so we can blindly clear mr->enabled.
1708 * memory_region_set_enabled instead could trigger a transaction
1709 * and cause an infinite loop.
1710 */
1711 mr->enabled = false;
1712 memory_region_transaction_begin();
1713 while (!QTAILQ_EMPTY(&mr->subregions)) {
1714 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1715 memory_region_del_subregion(mr, subregion);
1716 }
1717 memory_region_transaction_commit();
1718
1719 mr->destructor(mr);
1720 memory_region_clear_coalescing(mr);
1721 g_free((char *)mr->name);
1722 g_free(mr->ioeventfds);
1723 }
1724
1725 Object *memory_region_owner(MemoryRegion *mr)
1726 {
1727 Object *obj = OBJECT(mr);
1728 return obj->parent;
1729 }
1730
1731 void memory_region_ref(MemoryRegion *mr)
1732 {
1733 /* MMIO callbacks most likely will access data that belongs
1734 * to the owner, hence the need to ref/unref the owner whenever
1735 * the memory region is in use.
1736 *
1737 * The memory region is a child of its owner. As long as the
1738 * owner doesn't call unparent itself on the memory region,
1739 * ref-ing the owner will also keep the memory region alive.
1740 * Memory regions without an owner are supposed to never go away;
1741 * we do not ref/unref them because it slows down DMA sensibly.
1742 */
1743 if (mr && mr->owner) {
1744 object_ref(mr->owner);
1745 }
1746 }
1747
1748 void memory_region_unref(MemoryRegion *mr)
1749 {
1750 if (mr && mr->owner) {
1751 object_unref(mr->owner);
1752 }
1753 }
1754
1755 uint64_t memory_region_size(MemoryRegion *mr)
1756 {
1757 if (int128_eq(mr->size, int128_2_64())) {
1758 return UINT64_MAX;
1759 }
1760 return int128_get64(mr->size);
1761 }
1762
1763 const char *memory_region_name(const MemoryRegion *mr)
1764 {
1765 if (!mr->name) {
1766 ((MemoryRegion *)mr)->name =
1767 object_get_canonical_path_component(OBJECT(mr));
1768 }
1769 return mr->name;
1770 }
1771
1772 bool memory_region_is_ram_device(MemoryRegion *mr)
1773 {
1774 return mr->ram_device;
1775 }
1776
1777 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1778 {
1779 uint8_t mask = mr->dirty_log_mask;
1780 if (global_dirty_log && mr->ram_block) {
1781 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1782 }
1783 return mask;
1784 }
1785
1786 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1787 {
1788 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1789 }
1790
1791 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1792 Error **errp)
1793 {
1794 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1795 IOMMUNotifier *iommu_notifier;
1796 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1797 int ret = 0;
1798
1799 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1800 flags |= iommu_notifier->notifier_flags;
1801 }
1802
1803 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1804 ret = imrc->notify_flag_changed(iommu_mr,
1805 iommu_mr->iommu_notify_flags,
1806 flags, errp);
1807 }
1808
1809 if (!ret) {
1810 iommu_mr->iommu_notify_flags = flags;
1811 }
1812 return ret;
1813 }
1814
1815 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1816 IOMMUNotifier *n, Error **errp)
1817 {
1818 IOMMUMemoryRegion *iommu_mr;
1819 int ret;
1820
1821 if (mr->alias) {
1822 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1823 }
1824
1825 /* We need to register for at least one bitfield */
1826 iommu_mr = IOMMU_MEMORY_REGION(mr);
1827 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1828 assert(n->start <= n->end);
1829 assert(n->iommu_idx >= 0 &&
1830 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1831
1832 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1833 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1834 if (ret) {
1835 QLIST_REMOVE(n, node);
1836 }
1837 return ret;
1838 }
1839
1840 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1841 {
1842 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1843
1844 if (imrc->get_min_page_size) {
1845 return imrc->get_min_page_size(iommu_mr);
1846 }
1847 return TARGET_PAGE_SIZE;
1848 }
1849
1850 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1851 {
1852 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1853 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1854 hwaddr addr, granularity;
1855 IOMMUTLBEntry iotlb;
1856
1857 /* If the IOMMU has its own replay callback, override */
1858 if (imrc->replay) {
1859 imrc->replay(iommu_mr, n);
1860 return;
1861 }
1862
1863 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1864
1865 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1866 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1867 if (iotlb.perm != IOMMU_NONE) {
1868 n->notify(n, &iotlb);
1869 }
1870
1871 /* if (2^64 - MR size) < granularity, it's possible to get an
1872 * infinite loop here. This should catch such a wraparound */
1873 if ((addr + granularity) < addr) {
1874 break;
1875 }
1876 }
1877 }
1878
1879 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1880 IOMMUNotifier *n)
1881 {
1882 IOMMUMemoryRegion *iommu_mr;
1883
1884 if (mr->alias) {
1885 memory_region_unregister_iommu_notifier(mr->alias, n);
1886 return;
1887 }
1888 QLIST_REMOVE(n, node);
1889 iommu_mr = IOMMU_MEMORY_REGION(mr);
1890 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
1891 }
1892
1893 void memory_region_notify_one(IOMMUNotifier *notifier,
1894 IOMMUTLBEntry *entry)
1895 {
1896 IOMMUNotifierFlag request_flags;
1897 hwaddr entry_end = entry->iova + entry->addr_mask;
1898
1899 /*
1900 * Skip the notification if the notification does not overlap
1901 * with registered range.
1902 */
1903 if (notifier->start > entry_end || notifier->end < entry->iova) {
1904 return;
1905 }
1906
1907 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1908
1909 if (entry->perm & IOMMU_RW) {
1910 request_flags = IOMMU_NOTIFIER_MAP;
1911 } else {
1912 request_flags = IOMMU_NOTIFIER_UNMAP;
1913 }
1914
1915 if (notifier->notifier_flags & request_flags) {
1916 notifier->notify(notifier, entry);
1917 }
1918 }
1919
1920 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1921 int iommu_idx,
1922 IOMMUTLBEntry entry)
1923 {
1924 IOMMUNotifier *iommu_notifier;
1925
1926 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1927
1928 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1929 if (iommu_notifier->iommu_idx == iommu_idx) {
1930 memory_region_notify_one(iommu_notifier, &entry);
1931 }
1932 }
1933 }
1934
1935 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1936 enum IOMMUMemoryRegionAttr attr,
1937 void *data)
1938 {
1939 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1940
1941 if (!imrc->get_attr) {
1942 return -EINVAL;
1943 }
1944
1945 return imrc->get_attr(iommu_mr, attr, data);
1946 }
1947
1948 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
1949 MemTxAttrs attrs)
1950 {
1951 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1952
1953 if (!imrc->attrs_to_index) {
1954 return 0;
1955 }
1956
1957 return imrc->attrs_to_index(iommu_mr, attrs);
1958 }
1959
1960 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
1961 {
1962 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1963
1964 if (!imrc->num_indexes) {
1965 return 1;
1966 }
1967
1968 return imrc->num_indexes(iommu_mr);
1969 }
1970
1971 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1972 {
1973 uint8_t mask = 1 << client;
1974 uint8_t old_logging;
1975
1976 assert(client == DIRTY_MEMORY_VGA);
1977 old_logging = mr->vga_logging_count;
1978 mr->vga_logging_count += log ? 1 : -1;
1979 if (!!old_logging == !!mr->vga_logging_count) {
1980 return;
1981 }
1982
1983 memory_region_transaction_begin();
1984 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1985 memory_region_update_pending |= mr->enabled;
1986 memory_region_transaction_commit();
1987 }
1988
1989 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1990 hwaddr size)
1991 {
1992 assert(mr->ram_block);
1993 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1994 size,
1995 memory_region_get_dirty_log_mask(mr));
1996 }
1997
1998 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1999 {
2000 MemoryListener *listener;
2001 AddressSpace *as;
2002 FlatView *view;
2003 FlatRange *fr;
2004
2005 /* If the same address space has multiple log_sync listeners, we
2006 * visit that address space's FlatView multiple times. But because
2007 * log_sync listeners are rare, it's still cheaper than walking each
2008 * address space once.
2009 */
2010 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2011 if (!listener->log_sync) {
2012 continue;
2013 }
2014 as = listener->address_space;
2015 view = address_space_get_flatview(as);
2016 FOR_EACH_FLAT_RANGE(fr, view) {
2017 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2018 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2019 listener->log_sync(listener, &mrs);
2020 }
2021 }
2022 flatview_unref(view);
2023 }
2024 }
2025
2026 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2027 hwaddr len)
2028 {
2029 MemoryRegionSection mrs;
2030 MemoryListener *listener;
2031 AddressSpace *as;
2032 FlatView *view;
2033 FlatRange *fr;
2034 hwaddr sec_start, sec_end, sec_size;
2035
2036 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2037 if (!listener->log_clear) {
2038 continue;
2039 }
2040 as = listener->address_space;
2041 view = address_space_get_flatview(as);
2042 FOR_EACH_FLAT_RANGE(fr, view) {
2043 if (!fr->dirty_log_mask || fr->mr != mr) {
2044 /*
2045 * Clear dirty bitmap operation only applies to those
2046 * regions whose dirty logging is at least enabled
2047 */
2048 continue;
2049 }
2050
2051 mrs = section_from_flat_range(fr, view);
2052
2053 sec_start = MAX(mrs.offset_within_region, start);
2054 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2055 sec_end = MIN(sec_end, start + len);
2056
2057 if (sec_start >= sec_end) {
2058 /*
2059 * If this memory region section has no intersection
2060 * with the requested range, skip.
2061 */
2062 continue;
2063 }
2064
2065 /* Valid case; shrink the section if needed */
2066 mrs.offset_within_address_space +=
2067 sec_start - mrs.offset_within_region;
2068 mrs.offset_within_region = sec_start;
2069 sec_size = sec_end - sec_start;
2070 mrs.size = int128_make64(sec_size);
2071 listener->log_clear(listener, &mrs);
2072 }
2073 flatview_unref(view);
2074 }
2075 }
2076
2077 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2078 hwaddr addr,
2079 hwaddr size,
2080 unsigned client)
2081 {
2082 DirtyBitmapSnapshot *snapshot;
2083 assert(mr->ram_block);
2084 memory_region_sync_dirty_bitmap(mr);
2085 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2086 memory_global_after_dirty_log_sync();
2087 return snapshot;
2088 }
2089
2090 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2091 hwaddr addr, hwaddr size)
2092 {
2093 assert(mr->ram_block);
2094 return cpu_physical_memory_snapshot_get_dirty(snap,
2095 memory_region_get_ram_addr(mr) + addr, size);
2096 }
2097
2098 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2099 {
2100 if (mr->readonly != readonly) {
2101 memory_region_transaction_begin();
2102 mr->readonly = readonly;
2103 memory_region_update_pending |= mr->enabled;
2104 memory_region_transaction_commit();
2105 }
2106 }
2107
2108 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2109 {
2110 if (mr->nonvolatile != nonvolatile) {
2111 memory_region_transaction_begin();
2112 mr->nonvolatile = nonvolatile;
2113 memory_region_update_pending |= mr->enabled;
2114 memory_region_transaction_commit();
2115 }
2116 }
2117
2118 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2119 {
2120 if (mr->romd_mode != romd_mode) {
2121 memory_region_transaction_begin();
2122 mr->romd_mode = romd_mode;
2123 memory_region_update_pending |= mr->enabled;
2124 memory_region_transaction_commit();
2125 }
2126 }
2127
2128 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2129 hwaddr size, unsigned client)
2130 {
2131 assert(mr->ram_block);
2132 cpu_physical_memory_test_and_clear_dirty(
2133 memory_region_get_ram_addr(mr) + addr, size, client);
2134 }
2135
2136 int memory_region_get_fd(MemoryRegion *mr)
2137 {
2138 int fd;
2139
2140 RCU_READ_LOCK_GUARD();
2141 while (mr->alias) {
2142 mr = mr->alias;
2143 }
2144 fd = mr->ram_block->fd;
2145
2146 return fd;
2147 }
2148
2149 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2150 {
2151 void *ptr;
2152 uint64_t offset = 0;
2153
2154 RCU_READ_LOCK_GUARD();
2155 while (mr->alias) {
2156 offset += mr->alias_offset;
2157 mr = mr->alias;
2158 }
2159 assert(mr->ram_block);
2160 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2161
2162 return ptr;
2163 }
2164
2165 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2166 {
2167 RAMBlock *block;
2168
2169 block = qemu_ram_block_from_host(ptr, false, offset);
2170 if (!block) {
2171 return NULL;
2172 }
2173
2174 return block->mr;
2175 }
2176
2177 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2178 {
2179 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2180 }
2181
2182 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2183 {
2184 assert(mr->ram_block);
2185
2186 qemu_ram_resize(mr->ram_block, newsize, errp);
2187 }
2188
2189 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2190 {
2191 if (mr->ram_block) {
2192 qemu_ram_msync(mr->ram_block, addr, size);
2193 }
2194 }
2195
2196 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2197 {
2198 /*
2199 * Might be extended case needed to cover
2200 * different types of memory regions
2201 */
2202 if (mr->dirty_log_mask) {
2203 memory_region_msync(mr, addr, size);
2204 }
2205 }
2206
2207 /*
2208 * Call proper memory listeners about the change on the newly
2209 * added/removed CoalescedMemoryRange.
2210 */
2211 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2212 CoalescedMemoryRange *cmr,
2213 bool add)
2214 {
2215 AddressSpace *as;
2216 FlatView *view;
2217 FlatRange *fr;
2218
2219 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2220 view = address_space_get_flatview(as);
2221 FOR_EACH_FLAT_RANGE(fr, view) {
2222 if (fr->mr == mr) {
2223 flat_range_coalesced_io_notify(fr, as, cmr, add);
2224 }
2225 }
2226 flatview_unref(view);
2227 }
2228 }
2229
2230 void memory_region_set_coalescing(MemoryRegion *mr)
2231 {
2232 memory_region_clear_coalescing(mr);
2233 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2234 }
2235
2236 void memory_region_add_coalescing(MemoryRegion *mr,
2237 hwaddr offset,
2238 uint64_t size)
2239 {
2240 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2241
2242 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2243 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2244 memory_region_update_coalesced_range(mr, cmr, true);
2245 memory_region_set_flush_coalesced(mr);
2246 }
2247
2248 void memory_region_clear_coalescing(MemoryRegion *mr)
2249 {
2250 CoalescedMemoryRange *cmr;
2251
2252 if (QTAILQ_EMPTY(&mr->coalesced)) {
2253 return;
2254 }
2255
2256 qemu_flush_coalesced_mmio_buffer();
2257 mr->flush_coalesced_mmio = false;
2258
2259 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2260 cmr = QTAILQ_FIRST(&mr->coalesced);
2261 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2262 memory_region_update_coalesced_range(mr, cmr, false);
2263 g_free(cmr);
2264 }
2265 }
2266
2267 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2268 {
2269 mr->flush_coalesced_mmio = true;
2270 }
2271
2272 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2273 {
2274 qemu_flush_coalesced_mmio_buffer();
2275 if (QTAILQ_EMPTY(&mr->coalesced)) {
2276 mr->flush_coalesced_mmio = false;
2277 }
2278 }
2279
2280 void memory_region_clear_global_locking(MemoryRegion *mr)
2281 {
2282 mr->global_locking = false;
2283 }
2284
2285 static bool userspace_eventfd_warning;
2286
2287 void memory_region_add_eventfd(MemoryRegion *mr,
2288 hwaddr addr,
2289 unsigned size,
2290 bool match_data,
2291 uint64_t data,
2292 EventNotifier *e)
2293 {
2294 MemoryRegionIoeventfd mrfd = {
2295 .addr.start = int128_make64(addr),
2296 .addr.size = int128_make64(size),
2297 .match_data = match_data,
2298 .data = data,
2299 .e = e,
2300 };
2301 unsigned i;
2302
2303 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2304 userspace_eventfd_warning))) {
2305 userspace_eventfd_warning = true;
2306 error_report("Using eventfd without MMIO binding in KVM. "
2307 "Suboptimal performance expected");
2308 }
2309
2310 if (size) {
2311 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2312 }
2313 memory_region_transaction_begin();
2314 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2315 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2316 break;
2317 }
2318 }
2319 ++mr->ioeventfd_nb;
2320 mr->ioeventfds = g_realloc(mr->ioeventfds,
2321 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2322 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2323 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2324 mr->ioeventfds[i] = mrfd;
2325 ioeventfd_update_pending |= mr->enabled;
2326 memory_region_transaction_commit();
2327 }
2328
2329 void memory_region_del_eventfd(MemoryRegion *mr,
2330 hwaddr addr,
2331 unsigned size,
2332 bool match_data,
2333 uint64_t data,
2334 EventNotifier *e)
2335 {
2336 MemoryRegionIoeventfd mrfd = {
2337 .addr.start = int128_make64(addr),
2338 .addr.size = int128_make64(size),
2339 .match_data = match_data,
2340 .data = data,
2341 .e = e,
2342 };
2343 unsigned i;
2344
2345 if (size) {
2346 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2347 }
2348 memory_region_transaction_begin();
2349 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2350 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2351 break;
2352 }
2353 }
2354 assert(i != mr->ioeventfd_nb);
2355 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2356 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2357 --mr->ioeventfd_nb;
2358 mr->ioeventfds = g_realloc(mr->ioeventfds,
2359 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2360 ioeventfd_update_pending |= mr->enabled;
2361 memory_region_transaction_commit();
2362 }
2363
2364 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2365 {
2366 MemoryRegion *mr = subregion->container;
2367 MemoryRegion *other;
2368
2369 memory_region_transaction_begin();
2370
2371 memory_region_ref(subregion);
2372 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2373 if (subregion->priority >= other->priority) {
2374 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2375 goto done;
2376 }
2377 }
2378 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2379 done:
2380 memory_region_update_pending |= mr->enabled && subregion->enabled;
2381 memory_region_transaction_commit();
2382 }
2383
2384 static void memory_region_add_subregion_common(MemoryRegion *mr,
2385 hwaddr offset,
2386 MemoryRegion *subregion)
2387 {
2388 assert(!subregion->container);
2389 subregion->container = mr;
2390 subregion->addr = offset;
2391 memory_region_update_container_subregions(subregion);
2392 }
2393
2394 void memory_region_add_subregion(MemoryRegion *mr,
2395 hwaddr offset,
2396 MemoryRegion *subregion)
2397 {
2398 subregion->priority = 0;
2399 memory_region_add_subregion_common(mr, offset, subregion);
2400 }
2401
2402 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2403 hwaddr offset,
2404 MemoryRegion *subregion,
2405 int priority)
2406 {
2407 subregion->priority = priority;
2408 memory_region_add_subregion_common(mr, offset, subregion);
2409 }
2410
2411 void memory_region_del_subregion(MemoryRegion *mr,
2412 MemoryRegion *subregion)
2413 {
2414 memory_region_transaction_begin();
2415 assert(subregion->container == mr);
2416 subregion->container = NULL;
2417 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2418 memory_region_unref(subregion);
2419 memory_region_update_pending |= mr->enabled && subregion->enabled;
2420 memory_region_transaction_commit();
2421 }
2422
2423 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2424 {
2425 if (enabled == mr->enabled) {
2426 return;
2427 }
2428 memory_region_transaction_begin();
2429 mr->enabled = enabled;
2430 memory_region_update_pending = true;
2431 memory_region_transaction_commit();
2432 }
2433
2434 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2435 {
2436 Int128 s = int128_make64(size);
2437
2438 if (size == UINT64_MAX) {
2439 s = int128_2_64();
2440 }
2441 if (int128_eq(s, mr->size)) {
2442 return;
2443 }
2444 memory_region_transaction_begin();
2445 mr->size = s;
2446 memory_region_update_pending = true;
2447 memory_region_transaction_commit();
2448 }
2449
2450 static void memory_region_readd_subregion(MemoryRegion *mr)
2451 {
2452 MemoryRegion *container = mr->container;
2453
2454 if (container) {
2455 memory_region_transaction_begin();
2456 memory_region_ref(mr);
2457 memory_region_del_subregion(container, mr);
2458 mr->container = container;
2459 memory_region_update_container_subregions(mr);
2460 memory_region_unref(mr);
2461 memory_region_transaction_commit();
2462 }
2463 }
2464
2465 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2466 {
2467 if (addr != mr->addr) {
2468 mr->addr = addr;
2469 memory_region_readd_subregion(mr);
2470 }
2471 }
2472
2473 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2474 {
2475 assert(mr->alias);
2476
2477 if (offset == mr->alias_offset) {
2478 return;
2479 }
2480
2481 memory_region_transaction_begin();
2482 mr->alias_offset = offset;
2483 memory_region_update_pending |= mr->enabled;
2484 memory_region_transaction_commit();
2485 }
2486
2487 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2488 {
2489 return mr->align;
2490 }
2491
2492 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2493 {
2494 const AddrRange *addr = addr_;
2495 const FlatRange *fr = fr_;
2496
2497 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2498 return -1;
2499 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2500 return 1;
2501 }
2502 return 0;
2503 }
2504
2505 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2506 {
2507 return bsearch(&addr, view->ranges, view->nr,
2508 sizeof(FlatRange), cmp_flatrange_addr);
2509 }
2510
2511 bool memory_region_is_mapped(MemoryRegion *mr)
2512 {
2513 return mr->container ? true : false;
2514 }
2515
2516 /* Same as memory_region_find, but it does not add a reference to the
2517 * returned region. It must be called from an RCU critical section.
2518 */
2519 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2520 hwaddr addr, uint64_t size)
2521 {
2522 MemoryRegionSection ret = { .mr = NULL };
2523 MemoryRegion *root;
2524 AddressSpace *as;
2525 AddrRange range;
2526 FlatView *view;
2527 FlatRange *fr;
2528
2529 addr += mr->addr;
2530 for (root = mr; root->container; ) {
2531 root = root->container;
2532 addr += root->addr;
2533 }
2534
2535 as = memory_region_to_address_space(root);
2536 if (!as) {
2537 return ret;
2538 }
2539 range = addrrange_make(int128_make64(addr), int128_make64(size));
2540
2541 view = address_space_to_flatview(as);
2542 fr = flatview_lookup(view, range);
2543 if (!fr) {
2544 return ret;
2545 }
2546
2547 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2548 --fr;
2549 }
2550
2551 ret.mr = fr->mr;
2552 ret.fv = view;
2553 range = addrrange_intersection(range, fr->addr);
2554 ret.offset_within_region = fr->offset_in_region;
2555 ret.offset_within_region += int128_get64(int128_sub(range.start,
2556 fr->addr.start));
2557 ret.size = range.size;
2558 ret.offset_within_address_space = int128_get64(range.start);
2559 ret.readonly = fr->readonly;
2560 ret.nonvolatile = fr->nonvolatile;
2561 return ret;
2562 }
2563
2564 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2565 hwaddr addr, uint64_t size)
2566 {
2567 MemoryRegionSection ret;
2568 RCU_READ_LOCK_GUARD();
2569 ret = memory_region_find_rcu(mr, addr, size);
2570 if (ret.mr) {
2571 memory_region_ref(ret.mr);
2572 }
2573 return ret;
2574 }
2575
2576 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2577 {
2578 MemoryRegion *mr;
2579
2580 RCU_READ_LOCK_GUARD();
2581 mr = memory_region_find_rcu(container, addr, 1).mr;
2582 return mr && mr != container;
2583 }
2584
2585 void memory_global_dirty_log_sync(void)
2586 {
2587 memory_region_sync_dirty_bitmap(NULL);
2588 }
2589
2590 void memory_global_after_dirty_log_sync(void)
2591 {
2592 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2593 }
2594
2595 static VMChangeStateEntry *vmstate_change;
2596
2597 void memory_global_dirty_log_start(void)
2598 {
2599 if (vmstate_change) {
2600 qemu_del_vm_change_state_handler(vmstate_change);
2601 vmstate_change = NULL;
2602 }
2603
2604 global_dirty_log = true;
2605
2606 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2607
2608 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2609 memory_region_transaction_begin();
2610 memory_region_update_pending = true;
2611 memory_region_transaction_commit();
2612 }
2613
2614 static void memory_global_dirty_log_do_stop(void)
2615 {
2616 global_dirty_log = false;
2617
2618 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2619 memory_region_transaction_begin();
2620 memory_region_update_pending = true;
2621 memory_region_transaction_commit();
2622
2623 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2624 }
2625
2626 static void memory_vm_change_state_handler(void *opaque, int running,
2627 RunState state)
2628 {
2629 if (running) {
2630 memory_global_dirty_log_do_stop();
2631
2632 if (vmstate_change) {
2633 qemu_del_vm_change_state_handler(vmstate_change);
2634 vmstate_change = NULL;
2635 }
2636 }
2637 }
2638
2639 void memory_global_dirty_log_stop(void)
2640 {
2641 if (!runstate_is_running()) {
2642 if (vmstate_change) {
2643 return;
2644 }
2645 vmstate_change = qemu_add_vm_change_state_handler(
2646 memory_vm_change_state_handler, NULL);
2647 return;
2648 }
2649
2650 memory_global_dirty_log_do_stop();
2651 }
2652
2653 static void listener_add_address_space(MemoryListener *listener,
2654 AddressSpace *as)
2655 {
2656 FlatView *view;
2657 FlatRange *fr;
2658
2659 if (listener->begin) {
2660 listener->begin(listener);
2661 }
2662 if (global_dirty_log) {
2663 if (listener->log_global_start) {
2664 listener->log_global_start(listener);
2665 }
2666 }
2667
2668 view = address_space_get_flatview(as);
2669 FOR_EACH_FLAT_RANGE(fr, view) {
2670 MemoryRegionSection section = section_from_flat_range(fr, view);
2671
2672 if (listener->region_add) {
2673 listener->region_add(listener, &section);
2674 }
2675 if (fr->dirty_log_mask && listener->log_start) {
2676 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2677 }
2678 }
2679 if (listener->commit) {
2680 listener->commit(listener);
2681 }
2682 flatview_unref(view);
2683 }
2684
2685 static void listener_del_address_space(MemoryListener *listener,
2686 AddressSpace *as)
2687 {
2688 FlatView *view;
2689 FlatRange *fr;
2690
2691 if (listener->begin) {
2692 listener->begin(listener);
2693 }
2694 view = address_space_get_flatview(as);
2695 FOR_EACH_FLAT_RANGE(fr, view) {
2696 MemoryRegionSection section = section_from_flat_range(fr, view);
2697
2698 if (fr->dirty_log_mask && listener->log_stop) {
2699 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2700 }
2701 if (listener->region_del) {
2702 listener->region_del(listener, &section);
2703 }
2704 }
2705 if (listener->commit) {
2706 listener->commit(listener);
2707 }
2708 flatview_unref(view);
2709 }
2710
2711 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2712 {
2713 MemoryListener *other = NULL;
2714
2715 listener->address_space = as;
2716 if (QTAILQ_EMPTY(&memory_listeners)
2717 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2718 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2719 } else {
2720 QTAILQ_FOREACH(other, &memory_listeners, link) {
2721 if (listener->priority < other->priority) {
2722 break;
2723 }
2724 }
2725 QTAILQ_INSERT_BEFORE(other, listener, link);
2726 }
2727
2728 if (QTAILQ_EMPTY(&as->listeners)
2729 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2730 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2731 } else {
2732 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2733 if (listener->priority < other->priority) {
2734 break;
2735 }
2736 }
2737 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2738 }
2739
2740 listener_add_address_space(listener, as);
2741 }
2742
2743 void memory_listener_unregister(MemoryListener *listener)
2744 {
2745 if (!listener->address_space) {
2746 return;
2747 }
2748
2749 listener_del_address_space(listener, listener->address_space);
2750 QTAILQ_REMOVE(&memory_listeners, listener, link);
2751 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2752 listener->address_space = NULL;
2753 }
2754
2755 void address_space_remove_listeners(AddressSpace *as)
2756 {
2757 while (!QTAILQ_EMPTY(&as->listeners)) {
2758 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2759 }
2760 }
2761
2762 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2763 {
2764 memory_region_ref(root);
2765 as->root = root;
2766 as->current_map = NULL;
2767 as->ioeventfd_nb = 0;
2768 as->ioeventfds = NULL;
2769 QTAILQ_INIT(&as->listeners);
2770 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2771 as->name = g_strdup(name ? name : "anonymous");
2772 address_space_update_topology(as);
2773 address_space_update_ioeventfds(as);
2774 }
2775
2776 static void do_address_space_destroy(AddressSpace *as)
2777 {
2778 assert(QTAILQ_EMPTY(&as->listeners));
2779
2780 flatview_unref(as->current_map);
2781 g_free(as->name);
2782 g_free(as->ioeventfds);
2783 memory_region_unref(as->root);
2784 }
2785
2786 void address_space_destroy(AddressSpace *as)
2787 {
2788 MemoryRegion *root = as->root;
2789
2790 /* Flush out anything from MemoryListeners listening in on this */
2791 memory_region_transaction_begin();
2792 as->root = NULL;
2793 memory_region_transaction_commit();
2794 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2795
2796 /* At this point, as->dispatch and as->current_map are dummy
2797 * entries that the guest should never use. Wait for the old
2798 * values to expire before freeing the data.
2799 */
2800 as->root = root;
2801 call_rcu(as, do_address_space_destroy, rcu);
2802 }
2803
2804 static const char *memory_region_type(MemoryRegion *mr)
2805 {
2806 if (mr->alias) {
2807 return memory_region_type(mr->alias);
2808 }
2809 if (memory_region_is_ram_device(mr)) {
2810 return "ramd";
2811 } else if (memory_region_is_romd(mr)) {
2812 return "romd";
2813 } else if (memory_region_is_rom(mr)) {
2814 return "rom";
2815 } else if (memory_region_is_ram(mr)) {
2816 return "ram";
2817 } else {
2818 return "i/o";
2819 }
2820 }
2821
2822 typedef struct MemoryRegionList MemoryRegionList;
2823
2824 struct MemoryRegionList {
2825 const MemoryRegion *mr;
2826 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2827 };
2828
2829 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2830
2831 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2832 int128_sub((size), int128_one())) : 0)
2833 #define MTREE_INDENT " "
2834
2835 static void mtree_expand_owner(const char *label, Object *obj)
2836 {
2837 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2838
2839 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
2840 if (dev && dev->id) {
2841 qemu_printf(" id=%s", dev->id);
2842 } else {
2843 char *canonical_path = object_get_canonical_path(obj);
2844 if (canonical_path) {
2845 qemu_printf(" path=%s", canonical_path);
2846 g_free(canonical_path);
2847 } else {
2848 qemu_printf(" type=%s", object_get_typename(obj));
2849 }
2850 }
2851 qemu_printf("}");
2852 }
2853
2854 static void mtree_print_mr_owner(const MemoryRegion *mr)
2855 {
2856 Object *owner = mr->owner;
2857 Object *parent = memory_region_owner((MemoryRegion *)mr);
2858
2859 if (!owner && !parent) {
2860 qemu_printf(" orphan");
2861 return;
2862 }
2863 if (owner) {
2864 mtree_expand_owner("owner", owner);
2865 }
2866 if (parent && parent != owner) {
2867 mtree_expand_owner("parent", parent);
2868 }
2869 }
2870
2871 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
2872 hwaddr base,
2873 MemoryRegionListHead *alias_print_queue,
2874 bool owner, bool display_disabled)
2875 {
2876 MemoryRegionList *new_ml, *ml, *next_ml;
2877 MemoryRegionListHead submr_print_queue;
2878 const MemoryRegion *submr;
2879 unsigned int i;
2880 hwaddr cur_start, cur_end;
2881
2882 if (!mr) {
2883 return;
2884 }
2885
2886 cur_start = base + mr->addr;
2887 cur_end = cur_start + MR_SIZE(mr->size);
2888
2889 /*
2890 * Try to detect overflow of memory region. This should never
2891 * happen normally. When it happens, we dump something to warn the
2892 * user who is observing this.
2893 */
2894 if (cur_start < base || cur_end < cur_start) {
2895 qemu_printf("[DETECTED OVERFLOW!] ");
2896 }
2897
2898 if (mr->alias) {
2899 MemoryRegionList *ml;
2900 bool found = false;
2901
2902 /* check if the alias is already in the queue */
2903 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2904 if (ml->mr == mr->alias) {
2905 found = true;
2906 }
2907 }
2908
2909 if (!found) {
2910 ml = g_new(MemoryRegionList, 1);
2911 ml->mr = mr->alias;
2912 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2913 }
2914 if (mr->enabled || display_disabled) {
2915 for (i = 0; i < level; i++) {
2916 qemu_printf(MTREE_INDENT);
2917 }
2918 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2919 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
2920 "-" TARGET_FMT_plx "%s",
2921 cur_start, cur_end,
2922 mr->priority,
2923 mr->nonvolatile ? "nv-" : "",
2924 memory_region_type((MemoryRegion *)mr),
2925 memory_region_name(mr),
2926 memory_region_name(mr->alias),
2927 mr->alias_offset,
2928 mr->alias_offset + MR_SIZE(mr->size),
2929 mr->enabled ? "" : " [disabled]");
2930 if (owner) {
2931 mtree_print_mr_owner(mr);
2932 }
2933 qemu_printf("\n");
2934 }
2935 } else {
2936 if (mr->enabled || display_disabled) {
2937 for (i = 0; i < level; i++) {
2938 qemu_printf(MTREE_INDENT);
2939 }
2940 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2941 " (prio %d, %s%s): %s%s",
2942 cur_start, cur_end,
2943 mr->priority,
2944 mr->nonvolatile ? "nv-" : "",
2945 memory_region_type((MemoryRegion *)mr),
2946 memory_region_name(mr),
2947 mr->enabled ? "" : " [disabled]");
2948 if (owner) {
2949 mtree_print_mr_owner(mr);
2950 }
2951 qemu_printf("\n");
2952 }
2953 }
2954
2955 QTAILQ_INIT(&submr_print_queue);
2956
2957 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2958 new_ml = g_new(MemoryRegionList, 1);
2959 new_ml->mr = submr;
2960 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2961 if (new_ml->mr->addr < ml->mr->addr ||
2962 (new_ml->mr->addr == ml->mr->addr &&
2963 new_ml->mr->priority > ml->mr->priority)) {
2964 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2965 new_ml = NULL;
2966 break;
2967 }
2968 }
2969 if (new_ml) {
2970 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2971 }
2972 }
2973
2974 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2975 mtree_print_mr(ml->mr, level + 1, cur_start,
2976 alias_print_queue, owner, display_disabled);
2977 }
2978
2979 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2980 g_free(ml);
2981 }
2982 }
2983
2984 struct FlatViewInfo {
2985 int counter;
2986 bool dispatch_tree;
2987 bool owner;
2988 AccelClass *ac;
2989 };
2990
2991 static void mtree_print_flatview(gpointer key, gpointer value,
2992 gpointer user_data)
2993 {
2994 FlatView *view = key;
2995 GArray *fv_address_spaces = value;
2996 struct FlatViewInfo *fvi = user_data;
2997 FlatRange *range = &view->ranges[0];
2998 MemoryRegion *mr;
2999 int n = view->nr;
3000 int i;
3001 AddressSpace *as;
3002
3003 qemu_printf("FlatView #%d\n", fvi->counter);
3004 ++fvi->counter;
3005
3006 for (i = 0; i < fv_address_spaces->len; ++i) {
3007 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3008 qemu_printf(" AS \"%s\", root: %s",
3009 as->name, memory_region_name(as->root));
3010 if (as->root->alias) {
3011 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3012 }
3013 qemu_printf("\n");
3014 }
3015
3016 qemu_printf(" Root memory region: %s\n",
3017 view->root ? memory_region_name(view->root) : "(none)");
3018
3019 if (n <= 0) {
3020 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3021 return;
3022 }
3023
3024 while (n--) {
3025 mr = range->mr;
3026 if (range->offset_in_region) {
3027 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3028 " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3029 int128_get64(range->addr.start),
3030 int128_get64(range->addr.start)
3031 + MR_SIZE(range->addr.size),
3032 mr->priority,
3033 range->nonvolatile ? "nv-" : "",
3034 range->readonly ? "rom" : memory_region_type(mr),
3035 memory_region_name(mr),
3036 range->offset_in_region);
3037 } else {
3038 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3039 " (prio %d, %s%s): %s",
3040 int128_get64(range->addr.start),
3041 int128_get64(range->addr.start)
3042 + MR_SIZE(range->addr.size),
3043 mr->priority,
3044 range->nonvolatile ? "nv-" : "",
3045 range->readonly ? "rom" : memory_region_type(mr),
3046 memory_region_name(mr));
3047 }
3048 if (fvi->owner) {
3049 mtree_print_mr_owner(mr);
3050 }
3051
3052 if (fvi->ac) {
3053 for (i = 0; i < fv_address_spaces->len; ++i) {
3054 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3055 if (fvi->ac->has_memory(current_machine, as,
3056 int128_get64(range->addr.start),
3057 MR_SIZE(range->addr.size) + 1)) {
3058 qemu_printf(" %s", fvi->ac->name);
3059 }
3060 }
3061 }
3062 qemu_printf("\n");
3063 range++;
3064 }
3065
3066 #if !defined(CONFIG_USER_ONLY)
3067 if (fvi->dispatch_tree && view->root) {
3068 mtree_print_dispatch(view->dispatch, view->root);
3069 }
3070 #endif
3071
3072 qemu_printf("\n");
3073 }
3074
3075 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3076 gpointer user_data)
3077 {
3078 FlatView *view = key;
3079 GArray *fv_address_spaces = value;
3080
3081 g_array_unref(fv_address_spaces);
3082 flatview_unref(view);
3083
3084 return true;
3085 }
3086
3087 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3088 {
3089 MemoryRegionListHead ml_head;
3090 MemoryRegionList *ml, *ml2;
3091 AddressSpace *as;
3092
3093 if (flatview) {
3094 FlatView *view;
3095 struct FlatViewInfo fvi = {
3096 .counter = 0,
3097 .dispatch_tree = dispatch_tree,
3098 .owner = owner,
3099 };
3100 GArray *fv_address_spaces;
3101 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3102 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3103
3104 if (ac->has_memory) {
3105 fvi.ac = ac;
3106 }
3107
3108 /* Gather all FVs in one table */
3109 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3110 view = address_space_get_flatview(as);
3111
3112 fv_address_spaces = g_hash_table_lookup(views, view);
3113 if (!fv_address_spaces) {
3114 fv_address_spaces = g_array_new(false, false, sizeof(as));
3115 g_hash_table_insert(views, view, fv_address_spaces);
3116 }
3117
3118 g_array_append_val(fv_address_spaces, as);
3119 }
3120
3121 /* Print */
3122 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3123
3124 /* Free */
3125 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3126 g_hash_table_unref(views);
3127
3128 return;
3129 }
3130
3131 QTAILQ_INIT(&ml_head);
3132
3133 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3134 qemu_printf("address-space: %s\n", as->name);
3135 mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled);
3136 qemu_printf("\n");
3137 }
3138
3139 /* print aliased regions */
3140 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3141 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3142 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3143 qemu_printf("\n");
3144 }
3145
3146 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3147 g_free(ml);
3148 }
3149 }
3150
3151 void memory_region_init_ram(MemoryRegion *mr,
3152 struct Object *owner,
3153 const char *name,
3154 uint64_t size,
3155 Error **errp)
3156 {
3157 DeviceState *owner_dev;
3158 Error *err = NULL;
3159
3160 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3161 if (err) {
3162 error_propagate(errp, err);
3163 return;
3164 }
3165 /* This will assert if owner is neither NULL nor a DeviceState.
3166 * We only want the owner here for the purposes of defining a
3167 * unique name for migration. TODO: Ideally we should implement
3168 * a naming scheme for Objects which are not DeviceStates, in
3169 * which case we can relax this restriction.
3170 */
3171 owner_dev = DEVICE(owner);
3172 vmstate_register_ram(mr, owner_dev);
3173 }
3174
3175 void memory_region_init_rom(MemoryRegion *mr,
3176 struct Object *owner,
3177 const char *name,
3178 uint64_t size,
3179 Error **errp)
3180 {
3181 DeviceState *owner_dev;
3182 Error *err = NULL;
3183
3184 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3185 if (err) {
3186 error_propagate(errp, err);
3187 return;
3188 }
3189 /* This will assert if owner is neither NULL nor a DeviceState.
3190 * We only want the owner here for the purposes of defining a
3191 * unique name for migration. TODO: Ideally we should implement
3192 * a naming scheme for Objects which are not DeviceStates, in
3193 * which case we can relax this restriction.
3194 */
3195 owner_dev = DEVICE(owner);
3196 vmstate_register_ram(mr, owner_dev);
3197 }
3198
3199 void memory_region_init_rom_device(MemoryRegion *mr,
3200 struct Object *owner,
3201 const MemoryRegionOps *ops,
3202 void *opaque,
3203 const char *name,
3204 uint64_t size,
3205 Error **errp)
3206 {
3207 DeviceState *owner_dev;
3208 Error *err = NULL;
3209
3210 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3211 name, size, &err);
3212 if (err) {
3213 error_propagate(errp, err);
3214 return;
3215 }
3216 /* This will assert if owner is neither NULL nor a DeviceState.
3217 * We only want the owner here for the purposes of defining a
3218 * unique name for migration. TODO: Ideally we should implement
3219 * a naming scheme for Objects which are not DeviceStates, in
3220 * which case we can relax this restriction.
3221 */
3222 owner_dev = DEVICE(owner);
3223 vmstate_register_ram(mr, owner_dev);
3224 }
3225
3226 static const TypeInfo memory_region_info = {
3227 .parent = TYPE_OBJECT,
3228 .name = TYPE_MEMORY_REGION,
3229 .class_size = sizeof(MemoryRegionClass),
3230 .instance_size = sizeof(MemoryRegion),
3231 .instance_init = memory_region_initfn,
3232 .instance_finalize = memory_region_finalize,
3233 };
3234
3235 static const TypeInfo iommu_memory_region_info = {
3236 .parent = TYPE_MEMORY_REGION,
3237 .name = TYPE_IOMMU_MEMORY_REGION,
3238 .class_size = sizeof(IOMMUMemoryRegionClass),
3239 .instance_size = sizeof(IOMMUMemoryRegion),
3240 .instance_init = iommu_memory_region_initfn,
3241 .abstract = true,
3242 };
3243
3244 static void memory_register_types(void)
3245 {
3246 type_register_static(&memory_region_info);
3247 type_register_static(&iommu_memory_region_info);
3248 }
3249
3250 type_init(memory_register_types)
AR7 emulation for QEMU