hw/input/pckbd.c

   1 /*
   2  * QEMU PC keyboard emulation
   3  *
   4  * Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "qemu/error-report.h"
  27 #include "qemu/log.h"
  28 #include "qemu/timer.h"
  29 #include "hw/isa/isa.h"
  30 #include "migration/vmstate.h"
  31 #include "hw/acpi/aml-build.h"
  32 #include "hw/input/ps2.h"
  33 #include "hw/irq.h"
  34 #include "hw/input/i8042.h"
  35 #include "hw/qdev-properties.h"
  36 #include "sysemu/reset.h"
  37 #include "sysemu/runstate.h"
  38
  39 #include "trace.h"
  40
  41 /*      Keyboard Controller Commands */
  42 #define KBD_CCMD_READ_MODE      0x20    /* Read mode bits */
  43 #define KBD_CCMD_WRITE_MODE     0x60    /* Write mode bits */
  44 #define KBD_CCMD_GET_VERSION    0xA1    /* Get controller version */
  45 #define KBD_CCMD_MOUSE_DISABLE  0xA7    /* Disable mouse interface */
  46 #define KBD_CCMD_MOUSE_ENABLE   0xA8    /* Enable mouse interface */
  47 #define KBD_CCMD_TEST_MOUSE     0xA9    /* Mouse interface test */
  48 #define KBD_CCMD_SELF_TEST      0xAA    /* Controller self test */
  49 #define KBD_CCMD_KBD_TEST       0xAB    /* Keyboard interface test */
  50 #define KBD_CCMD_KBD_DISABLE    0xAD    /* Keyboard interface disable */
  51 #define KBD_CCMD_KBD_ENABLE     0xAE    /* Keyboard interface enable */
  52 #define KBD_CCMD_READ_INPORT    0xC0    /* read input port */
  53 #define KBD_CCMD_READ_OUTPORT   0xD0    /* read output port */
  54 #define KBD_CCMD_WRITE_OUTPORT  0xD1    /* write output port */
  55 #define KBD_CCMD_WRITE_OBUF     0xD2
  56 #define KBD_CCMD_WRITE_AUX_OBUF 0xD3    /* Write to output buffer as if
  57                                            initiated by the auxiliary device */
  58 #define KBD_CCMD_WRITE_MOUSE    0xD4    /* Write the following byte to the mouse */
  59 #define KBD_CCMD_DISABLE_A20    0xDD    /* HP vectra only ? */
  60 #define KBD_CCMD_ENABLE_A20     0xDF    /* HP vectra only ? */
  61 #define KBD_CCMD_PULSE_BITS_3_0 0xF0    /* Pulse bits 3-0 of the output port P2. */
  62 #define KBD_CCMD_RESET          0xFE    /* Pulse bit 0 of the output port P2 = CPU reset. */
  63 #define KBD_CCMD_NO_OP          0xFF    /* Pulse no bits of the output port P2. */
  64
  65 /* Keyboard Commands */
  66 #define KBD_CMD_SET_LEDS        0xED    /* Set keyboard leds */
  67 #define KBD_CMD_ECHO            0xEE
  68 #define KBD_CMD_GET_ID          0xF2    /* get keyboard ID */
  69 #define KBD_CMD_SET_RATE        0xF3    /* Set typematic rate */
  70 #define KBD_CMD_ENABLE          0xF4    /* Enable scanning */
  71 #define KBD_CMD_RESET_DISABLE   0xF5    /* reset and disable scanning */
  72 #define KBD_CMD_RESET_ENABLE    0xF6    /* reset and enable scanning */
  73 #define KBD_CMD_RESET           0xFF    /* Reset */
  74
  75 /* Keyboard Replies */
  76 #define KBD_REPLY_POR           0xAA    /* Power on reset */
  77 #define KBD_REPLY_ACK           0xFA    /* Command ACK */
  78 #define KBD_REPLY_RESEND        0xFE    /* Command NACK, send the cmd again */
  79
  80 /* Status Register Bits */
  81 #define KBD_STAT_OBF            0x01    /* Keyboard output buffer full */
  82 #define KBD_STAT_IBF            0x02    /* Keyboard input buffer full */
  83 #define KBD_STAT_SELFTEST       0x04    /* Self test successful */
  84 #define KBD_STAT_CMD            0x08    /* Last write was a command write (0=data) */
  85 #define KBD_STAT_UNLOCKED       0x10    /* Zero if keyboard locked */
  86 #define KBD_STAT_MOUSE_OBF      0x20    /* Mouse output buffer full */
  87 #define KBD_STAT_GTO            0x40    /* General receive/xmit timeout */
  88 #define KBD_STAT_PERR           0x80    /* Parity error */
  89
  90 /* Controller Mode Register Bits */
  91 #define KBD_MODE_KBD_INT        0x01    /* Keyboard data generate IRQ1 */
  92 #define KBD_MODE_MOUSE_INT      0x02    /* Mouse data generate IRQ12 */
  93 #define KBD_MODE_SYS            0x04    /* The system flag (?) */
  94 #define KBD_MODE_NO_KEYLOCK     0x08    /* The keylock doesn't affect the keyboard if set */
  95 #define KBD_MODE_DISABLE_KBD    0x10    /* Disable keyboard interface */
  96 #define KBD_MODE_DISABLE_MOUSE  0x20    /* Disable mouse interface */
  97 #define KBD_MODE_KCC            0x40    /* Scan code conversion to PC format */
  98 #define KBD_MODE_RFU            0x80
  99
 100 /* Output Port Bits */
 101 #define KBD_OUT_RESET           0x01    /* 1=normal mode, 0=reset */
 102 #define KBD_OUT_A20             0x02    /* x86 only */
 103 #define KBD_OUT_OBF             0x10    /* Keyboard output buffer full */
 104 #define KBD_OUT_MOUSE_OBF       0x20    /* Mouse output buffer full */
 105
 106 /* OSes typically write 0xdd/0xdf to turn the A20 line off and on.
 107  * We make the default value of the outport include these four bits,
 108  * so that the subsection is rarely necessary.
 109  */
 110 #define KBD_OUT_ONES            0xcc
 111
 112 /* Mouse Commands */
 113 #define AUX_SET_SCALE11         0xE6    /* Set 1:1 scaling */
 114 #define AUX_SET_SCALE21         0xE7    /* Set 2:1 scaling */
 115 #define AUX_SET_RES             0xE8    /* Set resolution */
 116 #define AUX_GET_SCALE           0xE9    /* Get scaling factor */
 117 #define AUX_SET_STREAM          0xEA    /* Set stream mode */
 118 #define AUX_POLL                0xEB    /* Poll */
 119 #define AUX_RESET_WRAP          0xEC    /* Reset wrap mode */
 120 #define AUX_SET_WRAP            0xEE    /* Set wrap mode */
 121 #define AUX_SET_REMOTE          0xF0    /* Set remote mode */
 122 #define AUX_GET_TYPE            0xF2    /* Get type */
 123 #define AUX_SET_SAMPLE          0xF3    /* Set sample rate */
 124 #define AUX_ENABLE_DEV          0xF4    /* Enable aux device */
 125 #define AUX_DISABLE_DEV         0xF5    /* Disable aux device */
 126 #define AUX_SET_DEFAULT         0xF6
 127 #define AUX_RESET               0xFF    /* Reset aux device */
 128 #define AUX_ACK                 0xFA    /* Command byte ACK. */
 129
 130 #define MOUSE_STATUS_REMOTE     0x40
 131 #define MOUSE_STATUS_ENABLED    0x20
 132 #define MOUSE_STATUS_SCALE21    0x10
 133
 134 #define KBD_PENDING_KBD_COMPAT  0x01
 135 #define KBD_PENDING_AUX_COMPAT  0x02
 136 #define KBD_PENDING_CTRL_KBD    0x04
 137 #define KBD_PENDING_CTRL_AUX    0x08
 138 #define KBD_PENDING_KBD         KBD_MODE_DISABLE_KBD    /* 0x10 */
 139 #define KBD_PENDING_AUX         KBD_MODE_DISABLE_MOUSE  /* 0x20 */
 140
 141 #define KBD_MIGR_TIMER_PENDING  0x1
 142
 143 #define KBD_OBSRC_KBD           0x01
 144 #define KBD_OBSRC_MOUSE         0x02
 145 #define KBD_OBSRC_CTRL          0x04
 146
 147 typedef struct KBDState {
 148     uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
 149     uint8_t status;
 150     uint8_t mode;
 151     uint8_t outport;
 152     uint32_t migration_flags;
 153     uint32_t obsrc;
 154     bool outport_present;
 155     bool extended_state;
 156     bool extended_state_loaded;
 157     /* Bitmask of devices with data available.  */
 158     uint8_t pending;
 159     uint8_t obdata;
 160     uint8_t cbdata;
 161     uint8_t pending_tmp;
 162     void *kbd;
 163     void *mouse;
 164     QEMUTimer *throttle_timer;
 165
 166     qemu_irq irq_kbd;
 167     qemu_irq irq_mouse;
 168     qemu_irq a20_out;
 169     hwaddr mask;
 170 } KBDState;
 171
 172 /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
 173    incorrect, but it avoids having to simulate exact delays */
 174 static void kbd_update_irq_lines(KBDState *s)
 175 {
 176     int irq_kbd_level, irq_mouse_level;
 177
 178     irq_kbd_level = 0;
 179     irq_mouse_level = 0;
 180
 181     if (s->status & KBD_STAT_OBF) {
 182         if (s->status & KBD_STAT_MOUSE_OBF) {
 183             if (s->mode & KBD_MODE_MOUSE_INT) {
 184                 irq_mouse_level = 1;
 185             }
 186         } else {
 187             if ((s->mode & KBD_MODE_KBD_INT) &&
 188                 !(s->mode & KBD_MODE_DISABLE_KBD)) {
 189                 irq_kbd_level = 1;
 190             }
 191         }
 192     }
 193     qemu_set_irq(s->irq_kbd, irq_kbd_level);
 194     qemu_set_irq(s->irq_mouse, irq_mouse_level);
 195 }
 196
 197 static void kbd_deassert_irq(KBDState *s)
 198 {
 199     s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
 200     s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF);
 201     kbd_update_irq_lines(s);
 202 }
 203
 204 static uint8_t kbd_pending(KBDState *s)
 205 {
 206     if (s->extended_state) {
 207         return s->pending & (~s->mode | ~(KBD_PENDING_KBD | KBD_PENDING_AUX));
 208     } else {
 209         return s->pending;
 210     }
 211 }
 212
 213 /* update irq and KBD_STAT_[MOUSE_]OBF */
 214 static void kbd_update_irq(KBDState *s)
 215 {
 216     uint8_t pending = kbd_pending(s);
 217
 218     s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
 219     s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF);
 220     if (pending) {
 221         s->status |= KBD_STAT_OBF;
 222         s->outport |= KBD_OUT_OBF;
 223         if (pending & KBD_PENDING_CTRL_KBD) {
 224             s->obsrc = KBD_OBSRC_CTRL;
 225         } else if (pending & KBD_PENDING_CTRL_AUX) {
 226             s->status |= KBD_STAT_MOUSE_OBF;
 227             s->outport |= KBD_OUT_MOUSE_OBF;
 228             s->obsrc = KBD_OBSRC_CTRL;
 229         } else if (pending & KBD_PENDING_KBD) {
 230             s->obsrc = KBD_OBSRC_KBD;
 231         } else {
 232             s->status |= KBD_STAT_MOUSE_OBF;
 233             s->outport |= KBD_OUT_MOUSE_OBF;
 234             s->obsrc = KBD_OBSRC_MOUSE;
 235         }
 236     }
 237     kbd_update_irq_lines(s);
 238 }
 239
 240 static void kbd_safe_update_irq(KBDState *s)
 241 {
 242     /*
 243      * with KBD_STAT_OBF set, a call to kbd_read_data() will eventually call
 244      * kbd_update_irq()
 245      */
 246     if (s->status & KBD_STAT_OBF) {
 247         return;
 248     }
 249     /* the throttle timer is pending and will call kbd_update_irq() */
 250     if (s->throttle_timer && timer_pending(s->throttle_timer)) {
 251         return;
 252     }
 253     if (kbd_pending(s)) {
 254         kbd_update_irq(s);
 255     }
 256 }
 257
 258 static void kbd_update_kbd_irq(void *opaque, int level)
 259 {
 260     KBDState *s = opaque;
 261
 262     if (level) {
 263         s->pending |= KBD_PENDING_KBD;
 264     } else {
 265         s->pending &= ~KBD_PENDING_KBD;
 266     }
 267     kbd_safe_update_irq(s);
 268 }
 269
 270 static void kbd_update_aux_irq(void *opaque, int level)
 271 {
 272     KBDState *s = opaque;
 273
 274     if (level) {
 275         s->pending |= KBD_PENDING_AUX;
 276     } else {
 277         s->pending &= ~KBD_PENDING_AUX;
 278     }
 279     kbd_safe_update_irq(s);
 280 }
 281
 282 static void kbd_throttle_timeout(void *opaque)
 283 {
 284     KBDState *s = opaque;
 285
 286     if (kbd_pending(s)) {
 287         kbd_update_irq(s);
 288     }
 289 }
 290
 291 static uint64_t kbd_read_status(void *opaque, hwaddr addr,
 292                                 unsigned size)
 293 {
 294     KBDState *s = opaque;
 295     int val;
 296     val = s->status;
 297     trace_pckbd_kbd_read_status(val);
 298     return val;
 299 }
 300
 301 static void kbd_queue(KBDState *s, int b, int aux)
 302 {
 303     if (s->extended_state) {
 304         s->cbdata = b;
 305         s->pending &= ~KBD_PENDING_CTRL_KBD & ~KBD_PENDING_CTRL_AUX;
 306         s->pending |= aux ? KBD_PENDING_CTRL_AUX : KBD_PENDING_CTRL_KBD;
 307         kbd_safe_update_irq(s);
 308     } else {
 309         ps2_queue(aux ? s->mouse : s->kbd, b);
 310     }
 311 }
 312
 313 static uint8_t kbd_dequeue(KBDState *s)
 314 {
 315     uint8_t b = s->cbdata;
 316
 317     s->pending &= ~KBD_PENDING_CTRL_KBD & ~KBD_PENDING_CTRL_AUX;
 318     if (kbd_pending(s)) {
 319         kbd_update_irq(s);
 320     }
 321     return b;
 322 }
 323
 324 static void outport_write(KBDState *s, uint32_t val)
 325 {
 326     trace_pckbd_outport_write(val);
 327     s->outport = val;
 328     qemu_set_irq(s->a20_out, (val >> 1) & 1);
 329     if (!(val & 1)) {
 330         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 331     }
 332 }
 333
 334 static void kbd_write_command(void *opaque, hwaddr addr,
 335                               uint64_t val, unsigned size)
 336 {
 337     KBDState *s = opaque;
 338
 339     trace_pckbd_kbd_write_command(val);
 340
 341     /* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
 342      * low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
 343      * command specify the output port bits to be pulsed.
 344      * 0: Bit should be pulsed. 1: Bit should not be modified.
 345      * The only useful version of this command is pulsing bit 0,
 346      * which does a CPU reset.
 347      */
 348     if((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) {
 349         if(!(val & 1))
 350             val = KBD_CCMD_RESET;
 351         else
 352             val = KBD_CCMD_NO_OP;
 353     }
 354
 355     switch(val) {
 356     case KBD_CCMD_READ_MODE:
 357         kbd_queue(s, s->mode, 0);
 358         break;
 359     case KBD_CCMD_WRITE_MODE:
 360     case KBD_CCMD_WRITE_OBUF:
 361     case KBD_CCMD_WRITE_AUX_OBUF:
 362     case KBD_CCMD_WRITE_MOUSE:
 363     case KBD_CCMD_WRITE_OUTPORT:
 364         s->write_cmd = val;
 365         break;
 366     case KBD_CCMD_MOUSE_DISABLE:
 367         s->mode |= KBD_MODE_DISABLE_MOUSE;
 368         break;
 369     case KBD_CCMD_MOUSE_ENABLE:
 370         s->mode &= ~KBD_MODE_DISABLE_MOUSE;
 371         kbd_safe_update_irq(s);
 372         break;
 373     case KBD_CCMD_TEST_MOUSE:
 374         kbd_queue(s, 0x00, 0);
 375         break;
 376     case KBD_CCMD_SELF_TEST:
 377         s->status |= KBD_STAT_SELFTEST;
 378         kbd_queue(s, 0x55, 0);
 379         break;
 380     case KBD_CCMD_KBD_TEST:
 381         kbd_queue(s, 0x00, 0);
 382         break;
 383     case KBD_CCMD_KBD_DISABLE:
 384         s->mode |= KBD_MODE_DISABLE_KBD;
 385         break;
 386     case KBD_CCMD_KBD_ENABLE:
 387         s->mode &= ~KBD_MODE_DISABLE_KBD;
 388         kbd_safe_update_irq(s);
 389         break;
 390     case KBD_CCMD_READ_INPORT:
 391         kbd_queue(s, 0x80, 0);
 392         break;
 393     case KBD_CCMD_READ_OUTPORT:
 394         kbd_queue(s, s->outport, 0);
 395         break;
 396     case KBD_CCMD_ENABLE_A20:
 397         qemu_irq_raise(s->a20_out);
 398         s->outport |= KBD_OUT_A20;
 399         break;
 400     case KBD_CCMD_DISABLE_A20:
 401         qemu_irq_lower(s->a20_out);
 402         s->outport &= ~KBD_OUT_A20;
 403         break;
 404     case KBD_CCMD_RESET:
 405         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 406         break;
 407     case KBD_CCMD_NO_OP:
 408         /* ignore that */
 409         break;
 410     default:
 411         qemu_log_mask(LOG_GUEST_ERROR,
 412                       "unsupported keyboard cmd=0x%02" PRIx64 "\n", val);
 413         break;
 414     }
 415 }
 416
 417 static uint64_t kbd_read_data(void *opaque, hwaddr addr,
 418                               unsigned size)
 419 {
 420     KBDState *s = opaque;
 421
 422     if (s->status & KBD_STAT_OBF) {
 423         kbd_deassert_irq(s);
 424         if (s->obsrc & KBD_OBSRC_KBD) {
 425             if (s->throttle_timer) {
 426                 timer_mod(s->throttle_timer,
 427                           qemu_clock_get_us(QEMU_CLOCK_VIRTUAL) + 1000);
 428             }
 429             s->obdata = ps2_read_data(s->kbd);
 430         } else if (s->obsrc & KBD_OBSRC_MOUSE) {
 431             s->obdata = ps2_read_data(s->mouse);
 432         } else if (s->obsrc & KBD_OBSRC_CTRL) {
 433             s->obdata = kbd_dequeue(s);
 434         }
 435     }
 436
 437     trace_pckbd_kbd_read_data(s->obdata);
 438     return s->obdata;
 439 }
 440
 441 static void kbd_write_data(void *opaque, hwaddr addr,
 442                            uint64_t val, unsigned size)
 443 {
 444     KBDState *s = opaque;
 445
 446     trace_pckbd_kbd_write_data(val);
 447
 448     switch(s->write_cmd) {
 449     case 0:
 450         ps2_write_keyboard(s->kbd, val);
 451         /* sending data to the keyboard reenables PS/2 communication */
 452         s->mode &= ~KBD_MODE_DISABLE_KBD;
 453         kbd_safe_update_irq(s);
 454         break;
 455     case KBD_CCMD_WRITE_MODE:
 456         s->mode = val;
 457         ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
 458         /*
 459          * a write to the mode byte interrupt enable flags directly updates
 460          * the irq lines
 461          */
 462         kbd_update_irq_lines(s);
 463         /*
 464          * a write to the mode byte disable interface flags may raise
 465          * an irq if there is pending data in the PS/2 queues.
 466          */
 467         kbd_safe_update_irq(s);
 468         break;
 469     case KBD_CCMD_WRITE_OBUF:
 470         kbd_queue(s, val, 0);
 471         break;
 472     case KBD_CCMD_WRITE_AUX_OBUF:
 473         kbd_queue(s, val, 1);
 474         break;
 475     case KBD_CCMD_WRITE_OUTPORT:
 476         outport_write(s, val);
 477         break;
 478     case KBD_CCMD_WRITE_MOUSE:
 479         ps2_write_mouse(s->mouse, val);
 480         /* sending data to the mouse reenables PS/2 communication */
 481         s->mode &= ~KBD_MODE_DISABLE_MOUSE;
 482         kbd_safe_update_irq(s);
 483         break;
 484     default:
 485         break;
 486     }
 487     s->write_cmd = 0;
 488 }
 489
 490 static void kbd_reset(void *opaque)
 491 {
 492     KBDState *s = opaque;
 493
 494     s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
 495     s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
 496     s->outport = KBD_OUT_RESET | KBD_OUT_A20 | KBD_OUT_ONES;
 497     s->outport_present = false;
 498     s->pending = 0;
 499     kbd_deassert_irq(s);
 500     if (s->throttle_timer) {
 501         timer_del(s->throttle_timer);
 502     }
 503 }
 504
 505 static uint8_t kbd_outport_default(KBDState *s)
 506 {
 507     return KBD_OUT_RESET | KBD_OUT_A20 | KBD_OUT_ONES
 508            | (s->status & KBD_STAT_OBF ? KBD_OUT_OBF : 0)
 509            | (s->status & KBD_STAT_MOUSE_OBF ? KBD_OUT_MOUSE_OBF : 0);
 510 }
 511
 512 static int kbd_outport_post_load(void *opaque, int version_id)
 513 {
 514     KBDState *s = opaque;
 515     s->outport_present = true;
 516     return 0;
 517 }
 518
 519 static bool kbd_outport_needed(void *opaque)
 520 {
 521     KBDState *s = opaque;
 522     return s->outport != kbd_outport_default(s);
 523 }
 524
 525 static const VMStateDescription vmstate_kbd_outport = {
 526     .name = "pckbd_outport",
 527     .version_id = 1,
 528     .minimum_version_id = 1,
 529     .post_load = kbd_outport_post_load,
 530     .needed = kbd_outport_needed,
 531     .fields = (VMStateField[]) {
 532         VMSTATE_UINT8(outport, KBDState),
 533         VMSTATE_END_OF_LIST()
 534     }
 535 };
 536
 537 static int kbd_extended_state_pre_save(void *opaque)
 538 {
 539     KBDState *s = opaque;
 540
 541     s->migration_flags = 0;
 542     if (s->throttle_timer && timer_pending(s->throttle_timer)) {
 543         s->migration_flags |= KBD_MIGR_TIMER_PENDING;
 544     }
 545
 546     return 0;
 547 }
 548
 549 static int kbd_extended_state_post_load(void *opaque, int version_id)
 550 {
 551     KBDState *s = opaque;
 552
 553     if (s->migration_flags & KBD_MIGR_TIMER_PENDING) {
 554         kbd_throttle_timeout(s);
 555     }
 556     s->extended_state_loaded = true;
 557
 558     return 0;
 559 }
 560
 561 static bool kbd_extended_state_needed(void *opaque)
 562 {
 563     KBDState *s = opaque;
 564
 565     return s->extended_state;
 566 }
 567
 568 static const VMStateDescription vmstate_kbd_extended_state = {
 569     .name = "pckbd/extended_state",
 570     .post_load = kbd_extended_state_post_load,
 571     .pre_save = kbd_extended_state_pre_save,
 572     .needed = kbd_extended_state_needed,
 573     .fields = (VMStateField[]) {
 574         VMSTATE_UINT32(migration_flags, KBDState),
 575         VMSTATE_UINT32(obsrc, KBDState),
 576         VMSTATE_UINT8(obdata, KBDState),
 577         VMSTATE_UINT8(cbdata, KBDState),
 578         VMSTATE_END_OF_LIST()
 579     }
 580 };
 581
 582 static int kbd_pre_save(void *opaque)
 583 {
 584     KBDState *s = opaque;
 585
 586     if (s->extended_state) {
 587         s->pending_tmp = s->pending;
 588     } else {
 589         s->pending_tmp = 0;
 590         if (s->pending & KBD_PENDING_KBD) {
 591             s->pending_tmp |= KBD_PENDING_KBD_COMPAT;
 592         }
 593         if (s->pending & KBD_PENDING_AUX) {
 594             s->pending_tmp |= KBD_PENDING_AUX_COMPAT;
 595         }
 596     }
 597     return 0;
 598 }
 599
 600 static int kbd_pre_load(void *opaque)
 601 {
 602     KBDState *s = opaque;
 603
 604     s->extended_state_loaded = false;
 605     return 0;
 606 }
 607
 608 static int kbd_post_load(void *opaque, int version_id)
 609 {
 610     KBDState *s = opaque;
 611     if (!s->outport_present) {
 612         s->outport = kbd_outport_default(s);
 613     }
 614     s->outport_present = false;
 615     s->pending = s->pending_tmp;
 616     if (!s->extended_state_loaded) {
 617         s->obsrc = s->status & KBD_STAT_OBF ?
 618             (s->status & KBD_STAT_MOUSE_OBF ? KBD_OBSRC_MOUSE : KBD_OBSRC_KBD) :
 619             0;
 620         if (s->pending & KBD_PENDING_KBD_COMPAT) {
 621             s->pending |= KBD_PENDING_KBD;
 622         }
 623         if (s->pending & KBD_PENDING_AUX_COMPAT) {
 624             s->pending |= KBD_PENDING_AUX;
 625         }
 626     }
 627     /* clear all unused flags */
 628     s->pending &= KBD_PENDING_CTRL_KBD | KBD_PENDING_CTRL_AUX |
 629                   KBD_PENDING_KBD | KBD_PENDING_AUX;
 630     return 0;
 631 }
 632
 633 static const VMStateDescription vmstate_kbd = {
 634     .name = "pckbd",
 635     .version_id = 3,
 636     .minimum_version_id = 3,
 637     .pre_load = kbd_pre_load,
 638     .post_load = kbd_post_load,
 639     .pre_save = kbd_pre_save,
 640     .fields = (VMStateField[]) {
 641         VMSTATE_UINT8(write_cmd, KBDState),
 642         VMSTATE_UINT8(status, KBDState),
 643         VMSTATE_UINT8(mode, KBDState),
 644         VMSTATE_UINT8(pending_tmp, KBDState),
 645         VMSTATE_END_OF_LIST()
 646     },
 647     .subsections = (const VMStateDescription*[]) {
 648         &vmstate_kbd_outport,
 649         &vmstate_kbd_extended_state,
 650         NULL
 651     }
 652 };
 653
 654 /* Memory mapped interface */
 655 static uint64_t kbd_mm_readfn(void *opaque, hwaddr addr, unsigned size)
 656 {
 657     KBDState *s = opaque;
 658
 659     if (addr & s->mask)
 660         return kbd_read_status(s, 0, 1) & 0xff;
 661     else
 662         return kbd_read_data(s, 0, 1) & 0xff;
 663 }
 664
 665 static void kbd_mm_writefn(void *opaque, hwaddr addr,
 666                            uint64_t value, unsigned size)
 667 {
 668     KBDState *s = opaque;
 669
 670     if (addr & s->mask)
 671         kbd_write_command(s, 0, value & 0xff, 1);
 672     else
 673         kbd_write_data(s, 0, value & 0xff, 1);
 674 }
 675
 676
 677 static const MemoryRegionOps i8042_mmio_ops = {
 678     .read = kbd_mm_readfn,
 679     .write = kbd_mm_writefn,
 680     .valid.min_access_size = 1,
 681     .valid.max_access_size = 4,
 682     .endianness = DEVICE_NATIVE_ENDIAN,
 683 };
 684
 685 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
 686                    MemoryRegion *region, ram_addr_t size,
 687                    hwaddr mask)
 688 {
 689     KBDState *s = g_malloc0(sizeof(KBDState));
 690
 691     s->irq_kbd = kbd_irq;
 692     s->irq_mouse = mouse_irq;
 693     s->mask = mask;
 694
 695     s->extended_state = true;
 696
 697     vmstate_register(NULL, 0, &vmstate_kbd, s);
 698
 699     memory_region_init_io(region, NULL, &i8042_mmio_ops, s, "i8042", size);
 700
 701     s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
 702     s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
 703     qemu_register_reset(kbd_reset, s);
 704 }
 705
 706 struct ISAKBDState {
 707     ISADevice parent_obj;
 708
 709     KBDState kbd;
 710     bool kbd_throttle;
 711     MemoryRegion io[2];
 712 };
 713
 714 void i8042_isa_mouse_fake_event(ISAKBDState *isa)
 715 {
 716     KBDState *s = &isa->kbd;
 717
 718     ps2_mouse_fake_event(s->mouse);
 719 }
 720
 721 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out)
 722 {
 723     qdev_connect_gpio_out_named(DEVICE(dev), I8042_A20_LINE, 0, a20_out);
 724 }
 725
 726 static const VMStateDescription vmstate_kbd_isa = {
 727     .name = "pckbd",
 728     .version_id = 3,
 729     .minimum_version_id = 3,
 730     .fields = (VMStateField[]) {
 731         VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
 732         VMSTATE_END_OF_LIST()
 733     }
 734 };
 735
 736 static const MemoryRegionOps i8042_data_ops = {
 737     .read = kbd_read_data,
 738     .write = kbd_write_data,
 739     .impl = {
 740         .min_access_size = 1,
 741         .max_access_size = 1,
 742     },
 743     .endianness = DEVICE_LITTLE_ENDIAN,
 744 };
 745
 746 static const MemoryRegionOps i8042_cmd_ops = {
 747     .read = kbd_read_status,
 748     .write = kbd_write_command,
 749     .impl = {
 750         .min_access_size = 1,
 751         .max_access_size = 1,
 752     },
 753     .endianness = DEVICE_LITTLE_ENDIAN,
 754 };
 755
 756 static void i8042_initfn(Object *obj)
 757 {
 758     ISAKBDState *isa_s = I8042(obj);
 759     KBDState *s = &isa_s->kbd;
 760
 761     memory_region_init_io(isa_s->io + 0, obj, &i8042_data_ops, s,
 762                           "i8042-data", 1);
 763     memory_region_init_io(isa_s->io + 1, obj, &i8042_cmd_ops, s,
 764                           "i8042-cmd", 1);
 765
 766     qdev_init_gpio_out_named(DEVICE(obj), &s->a20_out, I8042_A20_LINE, 1);
 767 }
 768
 769 static void i8042_realizefn(DeviceState *dev, Error **errp)
 770 {
 771     ISADevice *isadev = ISA_DEVICE(dev);
 772     ISAKBDState *isa_s = I8042(dev);
 773     KBDState *s = &isa_s->kbd;
 774
 775     isa_init_irq(isadev, &s->irq_kbd, 1);
 776     isa_init_irq(isadev, &s->irq_mouse, 12);
 777
 778     isa_register_ioport(isadev, isa_s->io + 0, 0x60);
 779     isa_register_ioport(isadev, isa_s->io + 1, 0x64);
 780
 781     s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
 782     s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
 783     if (isa_s->kbd_throttle && !isa_s->kbd.extended_state) {
 784         warn_report(TYPE_I8042 ": can't enable kbd-throttle without"
 785                     " extended-state, disabling kbd-throttle");
 786     } else if (isa_s->kbd_throttle) {
 787         s->throttle_timer = timer_new_us(QEMU_CLOCK_VIRTUAL,
 788                                          kbd_throttle_timeout, s);
 789     }
 790     qemu_register_reset(kbd_reset, s);
 791 }
 792
 793 static void i8042_build_aml(ISADevice *isadev, Aml *scope)
 794 {
 795     Aml *kbd;
 796     Aml *mou;
 797     Aml *crs;
 798
 799     crs = aml_resource_template();
 800     aml_append(crs, aml_io(AML_DECODE16, 0x0060, 0x0060, 0x01, 0x01));
 801     aml_append(crs, aml_io(AML_DECODE16, 0x0064, 0x0064, 0x01, 0x01));
 802     aml_append(crs, aml_irq_no_flags(1));
 803
 804     kbd = aml_device("KBD");
 805     aml_append(kbd, aml_name_decl("_HID", aml_eisaid("PNP0303")));
 806     aml_append(kbd, aml_name_decl("_STA", aml_int(0xf)));
 807     aml_append(kbd, aml_name_decl("_CRS", crs));
 808
 809     crs = aml_resource_template();
 810     aml_append(crs, aml_irq_no_flags(12));
 811
 812     mou = aml_device("MOU");
 813     aml_append(mou, aml_name_decl("_HID", aml_eisaid("PNP0F13")));
 814     aml_append(mou, aml_name_decl("_STA", aml_int(0xf)));
 815     aml_append(mou, aml_name_decl("_CRS", crs));
 816
 817     aml_append(scope, kbd);
 818     aml_append(scope, mou);
 819 }
 820
 821 static Property i8042_properties[] = {
 822     DEFINE_PROP_BOOL("extended-state", ISAKBDState, kbd.extended_state, true),
 823     DEFINE_PROP_BOOL("kbd-throttle", ISAKBDState, kbd_throttle, false),
 824     DEFINE_PROP_END_OF_LIST(),
 825 };
 826
 827 static void i8042_class_initfn(ObjectClass *klass, void *data)
 828 {
 829     DeviceClass *dc = DEVICE_CLASS(klass);
 830     ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
 831
 832     device_class_set_props(dc, i8042_properties);
 833     dc->realize = i8042_realizefn;
 834     dc->vmsd = &vmstate_kbd_isa;
 835     isa->build_aml = i8042_build_aml;
 836     set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
 837 }
 838
 839 static const TypeInfo i8042_info = {
 840     .name          = TYPE_I8042,
 841     .parent        = TYPE_ISA_DEVICE,
 842     .instance_size = sizeof(ISAKBDState),
 843     .instance_init = i8042_initfn,
 844     .class_init    = i8042_class_initfn,
 845 };
 846
 847 static void i8042_register_types(void)
 848 {
 849     type_register_static(&i8042_info);
 850 }
 851
 852 type_init(i8042_register_types)