target/riscv: deprecate the 'any' CPU type
[qemu/ar7.git] / target / ppc / mmu-book3s-v3.c
blobc8f69b3df9b10f7085e1954d3b714884928c2329
1 /*
2 * PowerPC ISAV3 BookS emulation generic mmu helpers for qemu.
4 * Copyright (c) 2017 Suraj Jitindar Singh, IBM Corporation
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "mmu-hash64.h"
23 #include "mmu-book3s-v3.h"
24 #include "mmu-radix64.h"
26 bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t *entry)
28 uint64_t patb = cpu->env.spr[SPR_PTCR] & PTCR_PATB;
29 uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS;
31 /* Check if partition table is properly aligned */
32 if (patb & MAKE_64BIT_MASK(0, pats + 12)) {
33 return false;
36 /* Calculate number of entries */
37 pats = 1ull << (pats + 12 - 4);
38 if (pats <= lpid) {
39 return false;
42 /* Grab entry */
43 patb += 16 * lpid;
44 entry->dw0 = ldq_phys(CPU(cpu)->as, patb);
45 entry->dw1 = ldq_phys(CPU(cpu)->as, patb + 8);
46 return true;