hw/isa/isa-superio.c

   1 /*
   2  * Generic ISA Super I/O
   3  *
   4  * Copyright (c) 2010-2012 Herve Poussineau
   5  * Copyright (c) 2011-2012 Andreas Färber
   6  * Copyright (c) 2018 Philippe Mathieu-Daudé
   7  *
   8  * This code is licensed under the GNU GPLv2 and later.
   9  * See the COPYING file in the top-level directory.
  10  * SPDX-License-Identifier: GPL-2.0-or-later
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qemu/error-report.h"
  15 #include "qemu/module.h"
  16 #include "qapi/error.h"
  17 #include "sysemu/sysemu.h"
  18 #include "sysemu/blockdev.h"
  19 #include "chardev/char.h"
  20 #include "hw/isa/superio.h"
  21 #include "hw/input/i8042.h"
  22 #include "hw/char/serial.h"
  23 #include "trace.h"
  24
  25 static void isa_superio_realize(DeviceState *dev, Error **errp)
  26 {
  27     ISASuperIODevice *sio = ISA_SUPERIO(dev);
  28     ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio);
  29     ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev));
  30     ISADevice *isa;
  31     DeviceState *d;
  32     Chardev *chr;
  33     DriveInfo *drive;
  34     char *name;
  35     int i;
  36
  37     /* Parallel port */
  38     for (i = 0; i < k->parallel.count; i++) {
  39         if (i >= ARRAY_SIZE(sio->parallel)) {
  40             warn_report("superio: ignoring %td parallel controllers",
  41                         k->parallel.count - ARRAY_SIZE(sio->parallel));
  42             break;
  43         }
  44         if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) {
  45             /* FIXME use a qdev chardev prop instead of parallel_hds[] */
  46             chr = parallel_hds[i];
  47             if (chr == NULL) {
  48                 name = g_strdup_printf("discarding-parallel%d", i);
  49                 chr = qemu_chr_new(name, "null", NULL);
  50             } else {
  51                 name = g_strdup_printf("parallel%d", i);
  52             }
  53             isa = isa_create(bus, "isa-parallel");
  54             d = DEVICE(isa);
  55             qdev_prop_set_uint32(d, "index", i);
  56             if (k->parallel.get_iobase) {
  57                 qdev_prop_set_uint32(d, "iobase",
  58                                      k->parallel.get_iobase(sio, i));
  59             }
  60             if (k->parallel.get_irq) {
  61                 qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i));
  62             }
  63             qdev_prop_set_chr(d, "chardev", chr);
  64             qdev_init_nofail(d);
  65             sio->parallel[i] = isa;
  66             trace_superio_create_parallel(i,
  67                                           k->parallel.get_iobase ?
  68                                           k->parallel.get_iobase(sio, i) : -1,
  69                                           k->parallel.get_irq ?
  70                                           k->parallel.get_irq(sio, i) : -1);
  71             object_property_add_child(OBJECT(dev), name,
  72                                       OBJECT(sio->parallel[i]), NULL);
  73             g_free(name);
  74         }
  75     }
  76
  77     /* Serial */
  78     for (i = 0; i < k->serial.count; i++) {
  79         if (i >= ARRAY_SIZE(sio->serial)) {
  80             warn_report("superio: ignoring %td serial controllers",
  81                         k->serial.count - ARRAY_SIZE(sio->serial));
  82             break;
  83         }
  84         if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) {
  85             /* FIXME use a qdev chardev prop instead of serial_hd() */
  86             chr = serial_hd(i);
  87             if (chr == NULL) {
  88                 name = g_strdup_printf("discarding-serial%d", i);
  89                 chr = qemu_chr_new(name, "null", NULL);
  90             } else {
  91                 name = g_strdup_printf("serial%d", i);
  92             }
  93             isa = isa_create(bus, TYPE_ISA_SERIAL);
  94             d = DEVICE(isa);
  95             qdev_prop_set_uint32(d, "index", i);
  96             if (k->serial.get_iobase) {
  97                 qdev_prop_set_uint32(d, "iobase",
  98                                      k->serial.get_iobase(sio, i));
  99             }
 100             if (k->serial.get_irq) {
 101                 qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i));
 102             }
 103             qdev_prop_set_chr(d, "chardev", chr);
 104             qdev_init_nofail(d);
 105             sio->serial[i] = isa;
 106             trace_superio_create_serial(i,
 107                                         k->serial.get_iobase ?
 108                                         k->serial.get_iobase(sio, i) : -1,
 109                                         k->serial.get_irq ?
 110                                         k->serial.get_irq(sio, i) : -1);
 111             object_property_add_child(OBJECT(dev), name,
 112                                       OBJECT(sio->serial[0]), NULL);
 113             g_free(name);
 114         }
 115     }
 116
 117     /* Floppy disc */
 118     if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) {
 119         isa = isa_create(bus, "isa-fdc");
 120         d = DEVICE(isa);
 121         if (k->floppy.get_iobase) {
 122             qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0));
 123         }
 124         if (k->floppy.get_irq) {
 125             qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0));
 126         }
 127         /* FIXME use a qdev drive property instead of drive_get() */
 128         drive = drive_get(IF_FLOPPY, 0, 0);
 129         if (drive != NULL) {
 130             qdev_prop_set_drive(d, "driveA", blk_by_legacy_dinfo(drive),
 131                                 &error_fatal);
 132         }
 133         /* FIXME use a qdev drive property instead of drive_get() */
 134         drive = drive_get(IF_FLOPPY, 0, 1);
 135         if (drive != NULL) {
 136             qdev_prop_set_drive(d, "driveB", blk_by_legacy_dinfo(drive),
 137                                 &error_fatal);
 138         }
 139         qdev_init_nofail(d);
 140         sio->floppy = isa;
 141         trace_superio_create_floppy(0,
 142                                     k->floppy.get_iobase ?
 143                                     k->floppy.get_iobase(sio, 0) : -1,
 144                                     k->floppy.get_irq ?
 145                                     k->floppy.get_irq(sio, 0) : -1);
 146     }
 147
 148     /* Keyboard, mouse */
 149     sio->kbc = isa_create_simple(bus, TYPE_I8042);
 150
 151     /* IDE */
 152     if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) {
 153         isa = isa_create(bus, "isa-ide");
 154         d = DEVICE(isa);
 155         if (k->ide.get_iobase) {
 156             qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0));
 157         }
 158         if (k->ide.get_iobase) {
 159             qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1));
 160         }
 161         if (k->ide.get_irq) {
 162             qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0));
 163         }
 164         qdev_init_nofail(d);
 165         sio->ide = isa;
 166         trace_superio_create_ide(0,
 167                                  k->ide.get_iobase ?
 168                                  k->ide.get_iobase(sio, 0) : -1,
 169                                  k->ide.get_irq ?
 170                                  k->ide.get_irq(sio, 0) : -1);
 171     }
 172 }
 173
 174 static void isa_superio_class_init(ObjectClass *oc, void *data)
 175 {
 176     DeviceClass *dc = DEVICE_CLASS(oc);
 177
 178     dc->realize = isa_superio_realize;
 179     /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
 180     dc->user_creatable = false;
 181 }
 182
 183 static const TypeInfo isa_superio_type_info = {
 184     .name = TYPE_ISA_SUPERIO,
 185     .parent = TYPE_ISA_DEVICE,
 186     .abstract = true,
 187     .class_size = sizeof(ISASuperIOClass),
 188     .class_init = isa_superio_class_init,
 189 };
 190
 191 /* SMS FDC37M817 Super I/O */
 192 static void fdc37m81x_class_init(ObjectClass *klass, void *data)
 193 {
 194     ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
 195
 196     sc->serial.count = 2; /* NS16C550A */
 197     sc->parallel.count = 1;
 198     sc->floppy.count = 1; /* SMSC 82077AA Compatible */
 199     sc->ide.count = 0;
 200 }
 201
 202 static const TypeInfo fdc37m81x_type_info = {
 203     .name          = TYPE_FDC37M81X_SUPERIO,
 204     .parent        = TYPE_ISA_SUPERIO,
 205     .instance_size = sizeof(ISASuperIODevice),
 206     .class_init    = fdc37m81x_class_init,
 207 };
 208
 209 static void isa_superio_register_types(void)
 210 {
 211     type_register_static(&isa_superio_type_info);
 212     type_register_static(&fdc37m81x_type_info);
 213 }
 214
 215 type_init(isa_superio_register_types)