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target/mips: msa: Split helpers for ASUB_<S|U>.<B|H|W|D>
[qemu/ar7.git] / target / mips / msa_helper.c
blob0e390167647282e8023b84c423def016fbe305c4
1 /*
2 * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
3 *
4 * Copyright (c) 2014 Imagination Technologies
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "internal.h"
23 #include "exec/exec-all.h"
24 #include "exec/helper-proto.h"
25 #include "fpu/softfloat.h"
26
27 /* Data format min and max values */
28 #define DF_BITS(df) (1 << ((df) + 3))
29
30 #define DF_MAX_INT(df) (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
31 #define M_MAX_INT(m) (int64_t)((1LL << ((m) - 1)) - 1)
32
33 #define DF_MIN_INT(df) (int64_t)(-(1LL << (DF_BITS(df) - 1)))
34 #define M_MIN_INT(m) (int64_t)(-(1LL << ((m) - 1)))
35
36 #define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
37 #define M_MAX_UINT(m) (uint64_t)(-1ULL >> (64 - (m)))
38
39 #define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df))
40 #define SIGNED(x, df) \
41 ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)))
42
43 /* Element-by-element access macros */
44 #define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
45
46
47
48 /*
49 * Bit Count
50 * ---------
51 *
52 * +---------------+----------------------------------------------------------+
53 * | NLOC.B | Vector Leading Ones Count (byte) |
54 * | NLOC.H | Vector Leading Ones Count (halfword) |
55 * | NLOC.W | Vector Leading Ones Count (word) |
56 * | NLOC.D | Vector Leading Ones Count (doubleword) |
57 * | NLZC.B | Vector Leading Zeros Count (byte) |
58 * | NLZC.H | Vector Leading Zeros Count (halfword) |
59 * | NLZC.W | Vector Leading Zeros Count (word) |
60 * | NLZC.D | Vector Leading Zeros Count (doubleword) |
61 * | PCNT.B | Vector Population Count (byte) |
62 * | PCNT.H | Vector Population Count (halfword) |
63 * | PCNT.W | Vector Population Count (word) |
64 * | PCNT.D | Vector Population Count (doubleword) |
65 * +---------------+----------------------------------------------------------+
66 */
67
68 static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
69 {
70 uint64_t x, y;
71 int n, c;
72
73 x = UNSIGNED(arg, df);
74 n = DF_BITS(df);
75 c = DF_BITS(df) / 2;
76
77 do {
78 y = x >> c;
79 if (y != 0) {
80 n = n - c;
81 x = y;
82 }
83 c = c >> 1;
84 } while (c != 0);
85
86 return n - x;
87 }
88
89 static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
90 {
91 return msa_nlzc_df(df, UNSIGNED((~arg), df));
92 }
93
94 void helper_msa_nloc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
95 {
96 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
97 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
98
99 pwd->b[0] = msa_nloc_df(DF_BYTE, pws->b[0]);
100 pwd->b[1] = msa_nloc_df(DF_BYTE, pws->b[1]);
101 pwd->b[2] = msa_nloc_df(DF_BYTE, pws->b[2]);
102 pwd->b[3] = msa_nloc_df(DF_BYTE, pws->b[3]);
103 pwd->b[4] = msa_nloc_df(DF_BYTE, pws->b[4]);
104 pwd->b[5] = msa_nloc_df(DF_BYTE, pws->b[5]);
105 pwd->b[6] = msa_nloc_df(DF_BYTE, pws->b[6]);
106 pwd->b[7] = msa_nloc_df(DF_BYTE, pws->b[7]);
107 pwd->b[8] = msa_nloc_df(DF_BYTE, pws->b[8]);
108 pwd->b[9] = msa_nloc_df(DF_BYTE, pws->b[9]);
109 pwd->b[10] = msa_nloc_df(DF_BYTE, pws->b[10]);
110 pwd->b[11] = msa_nloc_df(DF_BYTE, pws->b[11]);
111 pwd->b[12] = msa_nloc_df(DF_BYTE, pws->b[12]);
112 pwd->b[13] = msa_nloc_df(DF_BYTE, pws->b[13]);
113 pwd->b[14] = msa_nloc_df(DF_BYTE, pws->b[14]);
114 pwd->b[15] = msa_nloc_df(DF_BYTE, pws->b[15]);
115 }
116
117 void helper_msa_nloc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
118 {
119 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
120 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
121
122 pwd->h[0] = msa_nloc_df(DF_HALF, pws->h[0]);
123 pwd->h[1] = msa_nloc_df(DF_HALF, pws->h[1]);
124 pwd->h[2] = msa_nloc_df(DF_HALF, pws->h[2]);
125 pwd->h[3] = msa_nloc_df(DF_HALF, pws->h[3]);
126 pwd->h[4] = msa_nloc_df(DF_HALF, pws->h[4]);
127 pwd->h[5] = msa_nloc_df(DF_HALF, pws->h[5]);
128 pwd->h[6] = msa_nloc_df(DF_HALF, pws->h[6]);
129 pwd->h[7] = msa_nloc_df(DF_HALF, pws->h[7]);
130 }
131
132 void helper_msa_nloc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
133 {
134 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
135 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
136
137 pwd->w[0] = msa_nloc_df(DF_WORD, pws->w[0]);
138 pwd->w[1] = msa_nloc_df(DF_WORD, pws->w[1]);
139 pwd->w[2] = msa_nloc_df(DF_WORD, pws->w[2]);
140 pwd->w[3] = msa_nloc_df(DF_WORD, pws->w[3]);
141 }
142
143 void helper_msa_nloc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
144 {
145 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
146 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
147
148 pwd->d[0] = msa_nloc_df(DF_DOUBLE, pws->d[0]);
149 pwd->d[1] = msa_nloc_df(DF_DOUBLE, pws->d[1]);
150 }
151
152 void helper_msa_nlzc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
153 {
154 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
155 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
156
157 pwd->b[0] = msa_nlzc_df(DF_BYTE, pws->b[0]);
158 pwd->b[1] = msa_nlzc_df(DF_BYTE, pws->b[1]);
159 pwd->b[2] = msa_nlzc_df(DF_BYTE, pws->b[2]);
160 pwd->b[3] = msa_nlzc_df(DF_BYTE, pws->b[3]);
161 pwd->b[4] = msa_nlzc_df(DF_BYTE, pws->b[4]);
162 pwd->b[5] = msa_nlzc_df(DF_BYTE, pws->b[5]);
163 pwd->b[6] = msa_nlzc_df(DF_BYTE, pws->b[6]);
164 pwd->b[7] = msa_nlzc_df(DF_BYTE, pws->b[7]);
165 pwd->b[8] = msa_nlzc_df(DF_BYTE, pws->b[8]);
166 pwd->b[9] = msa_nlzc_df(DF_BYTE, pws->b[9]);
167 pwd->b[10] = msa_nlzc_df(DF_BYTE, pws->b[10]);
168 pwd->b[11] = msa_nlzc_df(DF_BYTE, pws->b[11]);
169 pwd->b[12] = msa_nlzc_df(DF_BYTE, pws->b[12]);
170 pwd->b[13] = msa_nlzc_df(DF_BYTE, pws->b[13]);
171 pwd->b[14] = msa_nlzc_df(DF_BYTE, pws->b[14]);
172 pwd->b[15] = msa_nlzc_df(DF_BYTE, pws->b[15]);
173 }
174
175 void helper_msa_nlzc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
176 {
177 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
178 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
179
180 pwd->h[0] = msa_nlzc_df(DF_HALF, pws->h[0]);
181 pwd->h[1] = msa_nlzc_df(DF_HALF, pws->h[1]);
182 pwd->h[2] = msa_nlzc_df(DF_HALF, pws->h[2]);
183 pwd->h[3] = msa_nlzc_df(DF_HALF, pws->h[3]);
184 pwd->h[4] = msa_nlzc_df(DF_HALF, pws->h[4]);
185 pwd->h[5] = msa_nlzc_df(DF_HALF, pws->h[5]);
186 pwd->h[6] = msa_nlzc_df(DF_HALF, pws->h[6]);
187 pwd->h[7] = msa_nlzc_df(DF_HALF, pws->h[7]);
188 }
189
190 void helper_msa_nlzc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
191 {
192 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
193 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
194
195 pwd->w[0] = msa_nlzc_df(DF_WORD, pws->w[0]);
196 pwd->w[1] = msa_nlzc_df(DF_WORD, pws->w[1]);
197 pwd->w[2] = msa_nlzc_df(DF_WORD, pws->w[2]);
198 pwd->w[3] = msa_nlzc_df(DF_WORD, pws->w[3]);
199 }
200
201 void helper_msa_nlzc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
202 {
203 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
204 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
205
206 pwd->d[0] = msa_nlzc_df(DF_DOUBLE, pws->d[0]);
207 pwd->d[1] = msa_nlzc_df(DF_DOUBLE, pws->d[1]);
208 }
209
210 static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
211 {
212 uint64_t x;
213
214 x = UNSIGNED(arg, df);
215
216 x = (x & 0x5555555555555555ULL) + ((x >> 1) & 0x5555555555555555ULL);
217 x = (x & 0x3333333333333333ULL) + ((x >> 2) & 0x3333333333333333ULL);
218 x = (x & 0x0F0F0F0F0F0F0F0FULL) + ((x >> 4) & 0x0F0F0F0F0F0F0F0FULL);
219 x = (x & 0x00FF00FF00FF00FFULL) + ((x >> 8) & 0x00FF00FF00FF00FFULL);
220 x = (x & 0x0000FFFF0000FFFFULL) + ((x >> 16) & 0x0000FFFF0000FFFFULL);
221 x = (x & 0x00000000FFFFFFFFULL) + ((x >> 32));
222
223 return x;
224 }
225
226 void helper_msa_pcnt_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
227 {
228 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
229 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
230
231 pwd->b[0] = msa_pcnt_df(DF_BYTE, pws->b[0]);
232 pwd->b[1] = msa_pcnt_df(DF_BYTE, pws->b[1]);
233 pwd->b[2] = msa_pcnt_df(DF_BYTE, pws->b[2]);
234 pwd->b[3] = msa_pcnt_df(DF_BYTE, pws->b[3]);
235 pwd->b[4] = msa_pcnt_df(DF_BYTE, pws->b[4]);
236 pwd->b[5] = msa_pcnt_df(DF_BYTE, pws->b[5]);
237 pwd->b[6] = msa_pcnt_df(DF_BYTE, pws->b[6]);
238 pwd->b[7] = msa_pcnt_df(DF_BYTE, pws->b[7]);
239 pwd->b[8] = msa_pcnt_df(DF_BYTE, pws->b[8]);
240 pwd->b[9] = msa_pcnt_df(DF_BYTE, pws->b[9]);
241 pwd->b[10] = msa_pcnt_df(DF_BYTE, pws->b[10]);
242 pwd->b[11] = msa_pcnt_df(DF_BYTE, pws->b[11]);
243 pwd->b[12] = msa_pcnt_df(DF_BYTE, pws->b[12]);
244 pwd->b[13] = msa_pcnt_df(DF_BYTE, pws->b[13]);
245 pwd->b[14] = msa_pcnt_df(DF_BYTE, pws->b[14]);
246 pwd->b[15] = msa_pcnt_df(DF_BYTE, pws->b[15]);
247 }
248
249 void helper_msa_pcnt_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
250 {
251 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
252 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
253
254 pwd->h[0] = msa_pcnt_df(DF_HALF, pws->h[0]);
255 pwd->h[1] = msa_pcnt_df(DF_HALF, pws->h[1]);
256 pwd->h[2] = msa_pcnt_df(DF_HALF, pws->h[2]);
257 pwd->h[3] = msa_pcnt_df(DF_HALF, pws->h[3]);
258 pwd->h[4] = msa_pcnt_df(DF_HALF, pws->h[4]);
259 pwd->h[5] = msa_pcnt_df(DF_HALF, pws->h[5]);
260 pwd->h[6] = msa_pcnt_df(DF_HALF, pws->h[6]);
261 pwd->h[7] = msa_pcnt_df(DF_HALF, pws->h[7]);
262 }
263
264 void helper_msa_pcnt_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
265 {
266 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
267 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
268
269 pwd->w[0] = msa_pcnt_df(DF_WORD, pws->w[0]);
270 pwd->w[1] = msa_pcnt_df(DF_WORD, pws->w[1]);
271 pwd->w[2] = msa_pcnt_df(DF_WORD, pws->w[2]);
272 pwd->w[3] = msa_pcnt_df(DF_WORD, pws->w[3]);
273 }
274
275 void helper_msa_pcnt_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
276 {
277 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
278 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
279
280 pwd->d[0] = msa_pcnt_df(DF_DOUBLE, pws->d[0]);
281 pwd->d[1] = msa_pcnt_df(DF_DOUBLE, pws->d[1]);
282 }
283
284
285 /*
286 * Bit Move
287 * --------
288 *
289 * +---------------+----------------------------------------------------------+
290 * | BINSL.B | Vector Bit Insert Left (byte) |
291 * | BINSL.H | Vector Bit Insert Left (halfword) |
292 * | BINSL.W | Vector Bit Insert Left (word) |
293 * | BINSL.D | Vector Bit Insert Left (doubleword) |
294 * | BINSR.B | Vector Bit Insert Right (byte) |
295 * | BINSR.H | Vector Bit Insert Right (halfword) |
296 * | BINSR.W | Vector Bit Insert Right (word) |
297 * | BINSR.D | Vector Bit Insert Right (doubleword) |
298 * | BMNZ.V | Vector Bit Move If Not Zero |
299 * | BMZ.V | Vector Bit Move If Zero |
300 * | BSEL.V | Vector Bit Select |
301 * +---------------+----------------------------------------------------------+
302 */
303
304 /* Data format bit position and unsigned values */
305 #define BIT_POSITION(x, df) ((uint64_t)(x) % DF_BITS(df))
306
307 static inline int64_t msa_binsl_df(uint32_t df,
308 int64_t dest, int64_t arg1, int64_t arg2)
309 {
310 uint64_t u_arg1 = UNSIGNED(arg1, df);
311 uint64_t u_dest = UNSIGNED(dest, df);
312 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
313 int32_t sh_a = DF_BITS(df) - sh_d;
314 if (sh_d == DF_BITS(df)) {
315 return u_arg1;
316 } else {
317 return UNSIGNED(UNSIGNED(u_dest << sh_d, df) >> sh_d, df) |
318 UNSIGNED(UNSIGNED(u_arg1 >> sh_a, df) << sh_a, df);
319 }
320 }
321
322 void helper_msa_binsl_b(CPUMIPSState *env,
323 uint32_t wd, uint32_t ws, uint32_t wt)
324 {
325 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
326 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
327 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
328
329 pwd->b[0] = msa_binsl_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
330 pwd->b[1] = msa_binsl_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
331 pwd->b[2] = msa_binsl_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
332 pwd->b[3] = msa_binsl_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
333 pwd->b[4] = msa_binsl_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
334 pwd->b[5] = msa_binsl_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
335 pwd->b[6] = msa_binsl_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
336 pwd->b[7] = msa_binsl_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
337 pwd->b[8] = msa_binsl_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
338 pwd->b[9] = msa_binsl_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
339 pwd->b[10] = msa_binsl_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
340 pwd->b[11] = msa_binsl_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
341 pwd->b[12] = msa_binsl_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
342 pwd->b[13] = msa_binsl_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
343 pwd->b[14] = msa_binsl_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
344 pwd->b[15] = msa_binsl_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
345 }
346
347 void helper_msa_binsl_h(CPUMIPSState *env,
348 uint32_t wd, uint32_t ws, uint32_t wt)
349 {
350 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
351 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
352 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
353
354 pwd->h[0] = msa_binsl_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
355 pwd->h[1] = msa_binsl_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
356 pwd->h[2] = msa_binsl_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
357 pwd->h[3] = msa_binsl_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
358 pwd->h[4] = msa_binsl_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
359 pwd->h[5] = msa_binsl_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
360 pwd->h[6] = msa_binsl_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
361 pwd->h[7] = msa_binsl_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
362 }
363
364 void helper_msa_binsl_w(CPUMIPSState *env,
365 uint32_t wd, uint32_t ws, uint32_t wt)
366 {
367 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
368 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
369 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
370
371 pwd->w[0] = msa_binsl_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
372 pwd->w[1] = msa_binsl_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
373 pwd->w[2] = msa_binsl_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
374 pwd->w[3] = msa_binsl_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
375 }
376
377 void helper_msa_binsl_d(CPUMIPSState *env,
378 uint32_t wd, uint32_t ws, uint32_t wt)
379 {
380 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
381 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
382 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
383
384 pwd->d[0] = msa_binsl_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
385 pwd->d[1] = msa_binsl_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
386 }
387
388 static inline int64_t msa_binsr_df(uint32_t df,
389 int64_t dest, int64_t arg1, int64_t arg2)
390 {
391 uint64_t u_arg1 = UNSIGNED(arg1, df);
392 uint64_t u_dest = UNSIGNED(dest, df);
393 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
394 int32_t sh_a = DF_BITS(df) - sh_d;
395 if (sh_d == DF_BITS(df)) {
396 return u_arg1;
397 } else {
398 return UNSIGNED(UNSIGNED(u_dest >> sh_d, df) << sh_d, df) |
399 UNSIGNED(UNSIGNED(u_arg1 << sh_a, df) >> sh_a, df);
400 }
401 }
402
403 void helper_msa_binsr_b(CPUMIPSState *env,
404 uint32_t wd, uint32_t ws, uint32_t wt)
405 {
406 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
407 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
408 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
409
410 pwd->b[0] = msa_binsr_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
411 pwd->b[1] = msa_binsr_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
412 pwd->b[2] = msa_binsr_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
413 pwd->b[3] = msa_binsr_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
414 pwd->b[4] = msa_binsr_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
415 pwd->b[5] = msa_binsr_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
416 pwd->b[6] = msa_binsr_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
417 pwd->b[7] = msa_binsr_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
418 pwd->b[8] = msa_binsr_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
419 pwd->b[9] = msa_binsr_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
420 pwd->b[10] = msa_binsr_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
421 pwd->b[11] = msa_binsr_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
422 pwd->b[12] = msa_binsr_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
423 pwd->b[13] = msa_binsr_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
424 pwd->b[14] = msa_binsr_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
425 pwd->b[15] = msa_binsr_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
426 }
427
428 void helper_msa_binsr_h(CPUMIPSState *env,
429 uint32_t wd, uint32_t ws, uint32_t wt)
430 {
431 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
432 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
433 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
434
435 pwd->h[0] = msa_binsr_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
436 pwd->h[1] = msa_binsr_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
437 pwd->h[2] = msa_binsr_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
438 pwd->h[3] = msa_binsr_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
439 pwd->h[4] = msa_binsr_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
440 pwd->h[5] = msa_binsr_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
441 pwd->h[6] = msa_binsr_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
442 pwd->h[7] = msa_binsr_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
443 }
444
445 void helper_msa_binsr_w(CPUMIPSState *env,
446 uint32_t wd, uint32_t ws, uint32_t wt)
447 {
448 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
449 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
450 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
451
452 pwd->w[0] = msa_binsr_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
453 pwd->w[1] = msa_binsr_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
454 pwd->w[2] = msa_binsr_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
455 pwd->w[3] = msa_binsr_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
456 }
457
458 void helper_msa_binsr_d(CPUMIPSState *env,
459 uint32_t wd, uint32_t ws, uint32_t wt)
460 {
461 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
462 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
463 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
464
465 pwd->d[0] = msa_binsr_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
466 pwd->d[1] = msa_binsr_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
467 }
468
469 void helper_msa_bmnz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
470 {
471 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
472 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
473 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
474
475 pwd->d[0] = UNSIGNED( \
476 ((pwd->d[0] & (~pwt->d[0])) | (pws->d[0] & pwt->d[0])), DF_DOUBLE);
477 pwd->d[1] = UNSIGNED( \
478 ((pwd->d[1] & (~pwt->d[1])) | (pws->d[1] & pwt->d[1])), DF_DOUBLE);
479 }
480
481 void helper_msa_bmz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
482 {
483 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
484 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
485 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
486
487 pwd->d[0] = UNSIGNED( \
488 ((pwd->d[0] & pwt->d[0]) | (pws->d[0] & (~pwt->d[0]))), DF_DOUBLE);
489 pwd->d[1] = UNSIGNED( \
490 ((pwd->d[1] & pwt->d[1]) | (pws->d[1] & (~pwt->d[1]))), DF_DOUBLE);
491 }
492
493 void helper_msa_bsel_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
494 {
495 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
496 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
497 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
498
499 pwd->d[0] = UNSIGNED( \
500 (pws->d[0] & (~pwd->d[0])) | (pwt->d[0] & pwd->d[0]), DF_DOUBLE);
501 pwd->d[1] = UNSIGNED( \
502 (pws->d[1] & (~pwd->d[1])) | (pwt->d[1] & pwd->d[1]), DF_DOUBLE);
503 }
504
505
506 /*
507 * Bit Set
508 * -------
509 *
510 * +---------------+----------------------------------------------------------+
511 * | BCLR.B | Vector Bit Clear (byte) |
512 * | BCLR.H | Vector Bit Clear (halfword) |
513 * | BCLR.W | Vector Bit Clear (word) |
514 * | BCLR.D | Vector Bit Clear (doubleword) |
515 * | BNEG.B | Vector Bit Negate (byte) |
516 * | BNEG.H | Vector Bit Negate (halfword) |
517 * | BNEG.W | Vector Bit Negate (word) |
518 * | BNEG.D | Vector Bit Negate (doubleword) |
519 * | BSET.B | Vector Bit Set (byte) |
520 * | BSET.H | Vector Bit Set (halfword) |
521 * | BSET.W | Vector Bit Set (word) |
522 * | BSET.D | Vector Bit Set (doubleword) |
523 * +---------------+----------------------------------------------------------+
524 */
525
526 static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
527 {
528 int32_t b_arg2 = BIT_POSITION(arg2, df);
529 return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
530 }
531
532 void helper_msa_bclr_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
533 {
534 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
535 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
536 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
537
538 pwd->b[0] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[0]);
539 pwd->b[1] = msa_bclr_df(DF_BYTE, pws->b[1], pwt->b[1]);
540 pwd->b[2] = msa_bclr_df(DF_BYTE, pws->b[2], pwt->b[2]);
541 pwd->b[3] = msa_bclr_df(DF_BYTE, pws->b[3], pwt->b[3]);
542 pwd->b[4] = msa_bclr_df(DF_BYTE, pws->b[4], pwt->b[4]);
543 pwd->b[5] = msa_bclr_df(DF_BYTE, pws->b[5], pwt->b[5]);
544 pwd->b[6] = msa_bclr_df(DF_BYTE, pws->b[6], pwt->b[6]);
545 pwd->b[7] = msa_bclr_df(DF_BYTE, pws->b[7], pwt->b[7]);
546 pwd->b[8] = msa_bclr_df(DF_BYTE, pws->b[8], pwt->b[8]);
547 pwd->b[9] = msa_bclr_df(DF_BYTE, pws->b[9], pwt->b[9]);
548 pwd->b[10] = msa_bclr_df(DF_BYTE, pws->b[10], pwt->b[10]);
549 pwd->b[11] = msa_bclr_df(DF_BYTE, pws->b[11], pwt->b[11]);
550 pwd->b[12] = msa_bclr_df(DF_BYTE, pws->b[12], pwt->b[12]);
551 pwd->b[13] = msa_bclr_df(DF_BYTE, pws->b[13], pwt->b[13]);
552 pwd->b[14] = msa_bclr_df(DF_BYTE, pws->b[14], pwt->b[14]);
553 pwd->b[15] = msa_bclr_df(DF_BYTE, pws->b[15], pwt->b[15]);
554 }
555
556 void helper_msa_bclr_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
557 {
558 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
559 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
560 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
561
562 pwd->h[0] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[0]);
563 pwd->h[1] = msa_bclr_df(DF_HALF, pws->h[1], pwt->h[1]);
564 pwd->h[2] = msa_bclr_df(DF_HALF, pws->h[2], pwt->h[2]);
565 pwd->h[3] = msa_bclr_df(DF_HALF, pws->h[3], pwt->h[3]);
566 pwd->h[4] = msa_bclr_df(DF_HALF, pws->h[4], pwt->h[4]);
567 pwd->h[5] = msa_bclr_df(DF_HALF, pws->h[5], pwt->h[5]);
568 pwd->h[6] = msa_bclr_df(DF_HALF, pws->h[6], pwt->h[6]);
569 pwd->h[7] = msa_bclr_df(DF_HALF, pws->h[7], pwt->h[7]);
570 }
571
572 void helper_msa_bclr_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
573 {
574 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
575 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
576 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
577
578 pwd->w[0] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[0]);
579 pwd->w[1] = msa_bclr_df(DF_WORD, pws->w[1], pwt->w[1]);
580 pwd->w[2] = msa_bclr_df(DF_WORD, pws->w[2], pwt->w[2]);
581 pwd->w[3] = msa_bclr_df(DF_WORD, pws->w[3], pwt->w[3]);
582 }
583
584 void helper_msa_bclr_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
585 {
586 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
587 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
588 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
589
590 pwd->d[0] = msa_bclr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
591 pwd->d[1] = msa_bclr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
592 }
593
594 static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
595 {
596 int32_t b_arg2 = BIT_POSITION(arg2, df);
597 return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
598 }
599
600 void helper_msa_bneg_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
601 {
602 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
603 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
604 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
605
606 pwd->b[0] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[0]);
607 pwd->b[1] = msa_bneg_df(DF_BYTE, pws->b[1], pwt->b[1]);
608 pwd->b[2] = msa_bneg_df(DF_BYTE, pws->b[2], pwt->b[2]);
609 pwd->b[3] = msa_bneg_df(DF_BYTE, pws->b[3], pwt->b[3]);
610 pwd->b[4] = msa_bneg_df(DF_BYTE, pws->b[4], pwt->b[4]);
611 pwd->b[5] = msa_bneg_df(DF_BYTE, pws->b[5], pwt->b[5]);
612 pwd->b[6] = msa_bneg_df(DF_BYTE, pws->b[6], pwt->b[6]);
613 pwd->b[7] = msa_bneg_df(DF_BYTE, pws->b[7], pwt->b[7]);
614 pwd->b[8] = msa_bneg_df(DF_BYTE, pws->b[8], pwt->b[8]);
615 pwd->b[9] = msa_bneg_df(DF_BYTE, pws->b[9], pwt->b[9]);
616 pwd->b[10] = msa_bneg_df(DF_BYTE, pws->b[10], pwt->b[10]);
617 pwd->b[11] = msa_bneg_df(DF_BYTE, pws->b[11], pwt->b[11]);
618 pwd->b[12] = msa_bneg_df(DF_BYTE, pws->b[12], pwt->b[12]);
619 pwd->b[13] = msa_bneg_df(DF_BYTE, pws->b[13], pwt->b[13]);
620 pwd->b[14] = msa_bneg_df(DF_BYTE, pws->b[14], pwt->b[14]);
621 pwd->b[15] = msa_bneg_df(DF_BYTE, pws->b[15], pwt->b[15]);
622 }
623
624 void helper_msa_bneg_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
625 {
626 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
627 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
628 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
629
630 pwd->h[0] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[0]);
631 pwd->h[1] = msa_bneg_df(DF_HALF, pws->h[1], pwt->h[1]);
632 pwd->h[2] = msa_bneg_df(DF_HALF, pws->h[2], pwt->h[2]);
633 pwd->h[3] = msa_bneg_df(DF_HALF, pws->h[3], pwt->h[3]);
634 pwd->h[4] = msa_bneg_df(DF_HALF, pws->h[4], pwt->h[4]);
635 pwd->h[5] = msa_bneg_df(DF_HALF, pws->h[5], pwt->h[5]);
636 pwd->h[6] = msa_bneg_df(DF_HALF, pws->h[6], pwt->h[6]);
637 pwd->h[7] = msa_bneg_df(DF_HALF, pws->h[7], pwt->h[7]);
638 }
639
640 void helper_msa_bneg_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
641 {
642 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
643 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
644 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
645
646 pwd->w[0] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[0]);
647 pwd->w[1] = msa_bneg_df(DF_WORD, pws->w[1], pwt->w[1]);
648 pwd->w[2] = msa_bneg_df(DF_WORD, pws->w[2], pwt->w[2]);
649 pwd->w[3] = msa_bneg_df(DF_WORD, pws->w[3], pwt->w[3]);
650 }
651
652 void helper_msa_bneg_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
653 {
654 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
655 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
656 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
657
658 pwd->d[0] = msa_bneg_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
659 pwd->d[1] = msa_bneg_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
660 }
661
662 static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
663 int64_t arg2)
664 {
665 int32_t b_arg2 = BIT_POSITION(arg2, df);
666 return UNSIGNED(arg1 | (1LL << b_arg2), df);
667 }
668
669 void helper_msa_bset_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
670 {
671 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
672 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
673 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
674
675 pwd->b[0] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[0]);
676 pwd->b[1] = msa_bset_df(DF_BYTE, pws->b[1], pwt->b[1]);
677 pwd->b[2] = msa_bset_df(DF_BYTE, pws->b[2], pwt->b[2]);
678 pwd->b[3] = msa_bset_df(DF_BYTE, pws->b[3], pwt->b[3]);
679 pwd->b[4] = msa_bset_df(DF_BYTE, pws->b[4], pwt->b[4]);
680 pwd->b[5] = msa_bset_df(DF_BYTE, pws->b[5], pwt->b[5]);
681 pwd->b[6] = msa_bset_df(DF_BYTE, pws->b[6], pwt->b[6]);
682 pwd->b[7] = msa_bset_df(DF_BYTE, pws->b[7], pwt->b[7]);
683 pwd->b[8] = msa_bset_df(DF_BYTE, pws->b[8], pwt->b[8]);
684 pwd->b[9] = msa_bset_df(DF_BYTE, pws->b[9], pwt->b[9]);
685 pwd->b[10] = msa_bset_df(DF_BYTE, pws->b[10], pwt->b[10]);
686 pwd->b[11] = msa_bset_df(DF_BYTE, pws->b[11], pwt->b[11]);
687 pwd->b[12] = msa_bset_df(DF_BYTE, pws->b[12], pwt->b[12]);
688 pwd->b[13] = msa_bset_df(DF_BYTE, pws->b[13], pwt->b[13]);
689 pwd->b[14] = msa_bset_df(DF_BYTE, pws->b[14], pwt->b[14]);
690 pwd->b[15] = msa_bset_df(DF_BYTE, pws->b[15], pwt->b[15]);
691 }
692
693 void helper_msa_bset_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
694 {
695 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
696 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
697 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
698
699 pwd->h[0] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[0]);
700 pwd->h[1] = msa_bset_df(DF_HALF, pws->h[1], pwt->h[1]);
701 pwd->h[2] = msa_bset_df(DF_HALF, pws->h[2], pwt->h[2]);
702 pwd->h[3] = msa_bset_df(DF_HALF, pws->h[3], pwt->h[3]);
703 pwd->h[4] = msa_bset_df(DF_HALF, pws->h[4], pwt->h[4]);
704 pwd->h[5] = msa_bset_df(DF_HALF, pws->h[5], pwt->h[5]);
705 pwd->h[6] = msa_bset_df(DF_HALF, pws->h[6], pwt->h[6]);
706 pwd->h[7] = msa_bset_df(DF_HALF, pws->h[7], pwt->h[7]);
707 }
708
709 void helper_msa_bset_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
710 {
711 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
712 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
713 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
714
715 pwd->w[0] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[0]);
716 pwd->w[1] = msa_bset_df(DF_WORD, pws->w[1], pwt->w[1]);
717 pwd->w[2] = msa_bset_df(DF_WORD, pws->w[2], pwt->w[2]);
718 pwd->w[3] = msa_bset_df(DF_WORD, pws->w[3], pwt->w[3]);
719 }
720
721 void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
722 {
723 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
724 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
725 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
726
727 pwd->d[0] = msa_bset_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
728 pwd->d[1] = msa_bset_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
729 }
730
731
732 /*
733 * Fixed Multiply
734 * --------------
735 *
736 * +---------------+----------------------------------------------------------+
737 * | MADD_Q.H | Vector Fixed-Point Multiply and Add (halfword) |
738 * | MADD_Q.W | Vector Fixed-Point Multiply and Add (word) |
739 * | MADDR_Q.H | Vector Fixed-Point Multiply and Add Rounded (halfword) |
740 * | MADDR_Q.W | Vector Fixed-Point Multiply and Add Rounded (word) |
741 * | MSUB_Q.H | Vector Fixed-Point Multiply and Subtr. (halfword) |
742 * | MSUB_Q.W | Vector Fixed-Point Multiply and Subtr. (word) |
743 * | MSUBR_Q.H | Vector Fixed-Point Multiply and Subtr. Rounded (halfword)|
744 * | MSUBR_Q.W | Vector Fixed-Point Multiply and Subtr. Rounded (word) |
745 * | MUL_Q.H | Vector Fixed-Point Multiply (halfword) |
746 * | MUL_Q.W | Vector Fixed-Point Multiply (word) |
747 * | MULR_Q.H | Vector Fixed-Point Multiply Rounded (halfword) |
748 * | MULR_Q.W | Vector Fixed-Point Multiply Rounded (word) |
749 * +---------------+----------------------------------------------------------+
750 */
751
752 /* TODO: insert Fixed Multiply group helpers here */
753
754
755 /*
756 * Float Max Min
757 * -------------
758 *
759 * +---------------+----------------------------------------------------------+
760 * | FMAX_A.W | Vector Floating-Point Maximum (Absolute) (word) |
761 * | FMAX_A.D | Vector Floating-Point Maximum (Absolute) (doubleword) |
762 * | FMAX.W | Vector Floating-Point Maximum (word) |
763 * | FMAX.D | Vector Floating-Point Maximum (doubleword) |
764 * | FMIN_A.W | Vector Floating-Point Minimum (Absolute) (word) |
765 * | FMIN_A.D | Vector Floating-Point Minimum (Absolute) (doubleword) |
766 * | FMIN.W | Vector Floating-Point Minimum (word) |
767 * | FMIN.D | Vector Floating-Point Minimum (doubleword) |
768 * +---------------+----------------------------------------------------------+
769 */
770
771 /* TODO: insert Float Max Min group helpers here */
772
773
774 /*
775 * Int Add
776 * -------
777 *
778 * +---------------+----------------------------------------------------------+
779 * | ADD_A.B | Vector Add Absolute Values (byte) |
780 * | ADD_A.H | Vector Add Absolute Values (halfword) |
781 * | ADD_A.W | Vector Add Absolute Values (word) |
782 * | ADD_A.D | Vector Add Absolute Values (doubleword) |
783 * | ADDS_A.B | Vector Signed Saturated Add (of Absolute) (byte) |
784 * | ADDS_A.H | Vector Signed Saturated Add (of Absolute) (halfword) |
785 * | ADDS_A.W | Vector Signed Saturated Add (of Absolute) (word) |
786 * | ADDS_A.D | Vector Signed Saturated Add (of Absolute) (doubleword) |
787 * | ADDS_S.B | Vector Signed Saturated Add (of Signed) (byte) |
788 * | ADDS_S.H | Vector Signed Saturated Add (of Signed) (halfword) |
789 * | ADDS_S.W | Vector Signed Saturated Add (of Signed) (word) |
790 * | ADDS_S.D | Vector Signed Saturated Add (of Signed) (doubleword) |
791 * | ADDS_U.B | Vector Unsigned Saturated Add (of Unsigned) (byte) |
792 * | ADDS_U.H | Vector Unsigned Saturated Add (of Unsigned) (halfword) |
793 * | ADDS_U.W | Vector Unsigned Saturated Add (of Unsigned) (word) |
794 * | ADDS_U.D | Vector Unsigned Saturated Add (of Unsigned) (doubleword) |
795 * | ADDV.B | Vector Add (byte) |
796 * | ADDV.H | Vector Add (halfword) |
797 * | ADDV.W | Vector Add (word) |
798 * | ADDV.D | Vector Add (doubleword) |
799 * | HADD_S.H | Vector Signed Horizontal Add (halfword) |
800 * | HADD_S.W | Vector Signed Horizontal Add (word) |
801 * | HADD_S.D | Vector Signed Horizontal Add (doubleword) |
802 * | HADD_U.H | Vector Unigned Horizontal Add (halfword) |
803 * | HADD_U.W | Vector Unigned Horizontal Add (word) |
804 * | HADD_U.D | Vector Unigned Horizontal Add (doubleword) |
805 * +---------------+----------------------------------------------------------+
806 */
807
808
809 static inline int64_t msa_add_a_df(uint32_t df, int64_t arg1, int64_t arg2)
810 {
811 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
812 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
813 return abs_arg1 + abs_arg2;
814 }
815
816 void helper_msa_add_a_b(CPUMIPSState *env,
817 uint32_t wd, uint32_t ws, uint32_t wt)
818 {
819 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
820 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
821 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
822
823 pwd->b[0] = msa_add_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
824 pwd->b[1] = msa_add_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
825 pwd->b[2] = msa_add_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
826 pwd->b[3] = msa_add_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
827 pwd->b[4] = msa_add_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
828 pwd->b[5] = msa_add_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
829 pwd->b[6] = msa_add_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
830 pwd->b[7] = msa_add_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
831 pwd->b[8] = msa_add_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
832 pwd->b[9] = msa_add_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
833 pwd->b[10] = msa_add_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
834 pwd->b[11] = msa_add_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
835 pwd->b[12] = msa_add_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
836 pwd->b[13] = msa_add_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
837 pwd->b[14] = msa_add_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
838 pwd->b[15] = msa_add_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
839 }
840
841 void helper_msa_add_a_h(CPUMIPSState *env,
842 uint32_t wd, uint32_t ws, uint32_t wt)
843 {
844 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
845 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
846 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
847
848 pwd->h[0] = msa_add_a_df(DF_HALF, pws->h[0], pwt->h[0]);
849 pwd->h[1] = msa_add_a_df(DF_HALF, pws->h[1], pwt->h[1]);
850 pwd->h[2] = msa_add_a_df(DF_HALF, pws->h[2], pwt->h[2]);
851 pwd->h[3] = msa_add_a_df(DF_HALF, pws->h[3], pwt->h[3]);
852 pwd->h[4] = msa_add_a_df(DF_HALF, pws->h[4], pwt->h[4]);
853 pwd->h[5] = msa_add_a_df(DF_HALF, pws->h[5], pwt->h[5]);
854 pwd->h[6] = msa_add_a_df(DF_HALF, pws->h[6], pwt->h[6]);
855 pwd->h[7] = msa_add_a_df(DF_HALF, pws->h[7], pwt->h[7]);
856 }
857
858 void helper_msa_add_a_w(CPUMIPSState *env,
859 uint32_t wd, uint32_t ws, uint32_t wt)
860 {
861 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
862 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
863 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
864
865 pwd->w[0] = msa_add_a_df(DF_WORD, pws->w[0], pwt->w[0]);
866 pwd->w[1] = msa_add_a_df(DF_WORD, pws->w[1], pwt->w[1]);
867 pwd->w[2] = msa_add_a_df(DF_WORD, pws->w[2], pwt->w[2]);
868 pwd->w[3] = msa_add_a_df(DF_WORD, pws->w[3], pwt->w[3]);
869 }
870
871 void helper_msa_add_a_d(CPUMIPSState *env,
872 uint32_t wd, uint32_t ws, uint32_t wt)
873 {
874 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
875 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
876 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
877
878 pwd->d[0] = msa_add_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
879 pwd->d[1] = msa_add_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
880 }
881
882
883 static inline int64_t msa_adds_a_df(uint32_t df, int64_t arg1, int64_t arg2)
884 {
885 uint64_t max_int = (uint64_t)DF_MAX_INT(df);
886 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
887 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
888 if (abs_arg1 > max_int || abs_arg2 > max_int) {
889 return (int64_t)max_int;
890 } else {
891 return (abs_arg1 < max_int - abs_arg2) ? abs_arg1 + abs_arg2 : max_int;
892 }
893 }
894
895 void helper_msa_adds_a_b(CPUMIPSState *env,
896 uint32_t wd, uint32_t ws, uint32_t wt)
897 {
898 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
899 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
900 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
901
902 pwd->b[0] = msa_adds_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
903 pwd->b[1] = msa_adds_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
904 pwd->b[2] = msa_adds_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
905 pwd->b[3] = msa_adds_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
906 pwd->b[4] = msa_adds_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
907 pwd->b[5] = msa_adds_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
908 pwd->b[6] = msa_adds_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
909 pwd->b[7] = msa_adds_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
910 pwd->b[8] = msa_adds_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
911 pwd->b[9] = msa_adds_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
912 pwd->b[10] = msa_adds_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
913 pwd->b[11] = msa_adds_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
914 pwd->b[12] = msa_adds_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
915 pwd->b[13] = msa_adds_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
916 pwd->b[14] = msa_adds_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
917 pwd->b[15] = msa_adds_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
918 }
919
920 void helper_msa_adds_a_h(CPUMIPSState *env,
921 uint32_t wd, uint32_t ws, uint32_t wt)
922 {
923 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
924 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
925 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
926
927 pwd->h[0] = msa_adds_a_df(DF_HALF, pws->h[0], pwt->h[0]);
928 pwd->h[1] = msa_adds_a_df(DF_HALF, pws->h[1], pwt->h[1]);
929 pwd->h[2] = msa_adds_a_df(DF_HALF, pws->h[2], pwt->h[2]);
930 pwd->h[3] = msa_adds_a_df(DF_HALF, pws->h[3], pwt->h[3]);
931 pwd->h[4] = msa_adds_a_df(DF_HALF, pws->h[4], pwt->h[4]);
932 pwd->h[5] = msa_adds_a_df(DF_HALF, pws->h[5], pwt->h[5]);
933 pwd->h[6] = msa_adds_a_df(DF_HALF, pws->h[6], pwt->h[6]);
934 pwd->h[7] = msa_adds_a_df(DF_HALF, pws->h[7], pwt->h[7]);
935 }
936
937 void helper_msa_adds_a_w(CPUMIPSState *env,
938 uint32_t wd, uint32_t ws, uint32_t wt)
939 {
940 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
941 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
942 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
943
944 pwd->w[0] = msa_adds_a_df(DF_WORD, pws->w[0], pwt->w[0]);
945 pwd->w[1] = msa_adds_a_df(DF_WORD, pws->w[1], pwt->w[1]);
946 pwd->w[2] = msa_adds_a_df(DF_WORD, pws->w[2], pwt->w[2]);
947 pwd->w[3] = msa_adds_a_df(DF_WORD, pws->w[3], pwt->w[3]);
948 }
949
950 void helper_msa_adds_a_d(CPUMIPSState *env,
951 uint32_t wd, uint32_t ws, uint32_t wt)
952 {
953 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
954 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
955 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
956
957 pwd->d[0] = msa_adds_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
958 pwd->d[1] = msa_adds_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
959 }
960
961
962 static inline int64_t msa_adds_s_df(uint32_t df, int64_t arg1, int64_t arg2)
963 {
964 int64_t max_int = DF_MAX_INT(df);
965 int64_t min_int = DF_MIN_INT(df);
966 if (arg1 < 0) {
967 return (min_int - arg1 < arg2) ? arg1 + arg2 : min_int;
968 } else {
969 return (arg2 < max_int - arg1) ? arg1 + arg2 : max_int;
970 }
971 }
972
973 void helper_msa_adds_s_b(CPUMIPSState *env,
974 uint32_t wd, uint32_t ws, uint32_t wt)
975 {
976 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
977 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
978 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
979
980 pwd->b[0] = msa_adds_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
981 pwd->b[1] = msa_adds_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
982 pwd->b[2] = msa_adds_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
983 pwd->b[3] = msa_adds_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
984 pwd->b[4] = msa_adds_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
985 pwd->b[5] = msa_adds_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
986 pwd->b[6] = msa_adds_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
987 pwd->b[7] = msa_adds_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
988 pwd->b[8] = msa_adds_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
989 pwd->b[9] = msa_adds_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
990 pwd->b[10] = msa_adds_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
991 pwd->b[11] = msa_adds_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
992 pwd->b[12] = msa_adds_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
993 pwd->b[13] = msa_adds_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
994 pwd->b[14] = msa_adds_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
995 pwd->b[15] = msa_adds_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
996 }
997
998 void helper_msa_adds_s_h(CPUMIPSState *env,
999 uint32_t wd, uint32_t ws, uint32_t wt)
1000 {
1001 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1002 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1003 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1004
1005 pwd->h[0] = msa_adds_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1006 pwd->h[1] = msa_adds_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1007 pwd->h[2] = msa_adds_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1008 pwd->h[3] = msa_adds_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1009 pwd->h[4] = msa_adds_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1010 pwd->h[5] = msa_adds_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1011 pwd->h[6] = msa_adds_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1012 pwd->h[7] = msa_adds_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1013 }
1014
1015 void helper_msa_adds_s_w(CPUMIPSState *env,
1016 uint32_t wd, uint32_t ws, uint32_t wt)
1017 {
1018 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1019 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1020 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1021
1022 pwd->w[0] = msa_adds_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1023 pwd->w[1] = msa_adds_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1024 pwd->w[2] = msa_adds_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1025 pwd->w[3] = msa_adds_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1026 }
1027
1028 void helper_msa_adds_s_d(CPUMIPSState *env,
1029 uint32_t wd, uint32_t ws, uint32_t wt)
1030 {
1031 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1032 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1033 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1034
1035 pwd->d[0] = msa_adds_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1036 pwd->d[1] = msa_adds_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1037 }
1038
1039
1040 static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1041 {
1042 uint64_t max_uint = DF_MAX_UINT(df);
1043 uint64_t u_arg1 = UNSIGNED(arg1, df);
1044 uint64_t u_arg2 = UNSIGNED(arg2, df);
1045 return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
1046 }
1047
1048 void helper_msa_adds_u_b(CPUMIPSState *env,
1049 uint32_t wd, uint32_t ws, uint32_t wt)
1050 {
1051 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1052 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1053 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1054
1055 pwd->b[0] = msa_adds_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1056 pwd->b[1] = msa_adds_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1057 pwd->b[2] = msa_adds_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1058 pwd->b[3] = msa_adds_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1059 pwd->b[4] = msa_adds_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1060 pwd->b[5] = msa_adds_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1061 pwd->b[6] = msa_adds_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1062 pwd->b[7] = msa_adds_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1063 pwd->b[8] = msa_adds_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1064 pwd->b[9] = msa_adds_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1065 pwd->b[10] = msa_adds_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1066 pwd->b[11] = msa_adds_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1067 pwd->b[12] = msa_adds_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1068 pwd->b[13] = msa_adds_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1069 pwd->b[14] = msa_adds_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1070 pwd->b[15] = msa_adds_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1071 }
1072
1073 void helper_msa_adds_u_h(CPUMIPSState *env,
1074 uint32_t wd, uint32_t ws, uint32_t wt)
1075 {
1076 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1077 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1078 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1079
1080 pwd->h[0] = msa_adds_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1081 pwd->h[1] = msa_adds_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1082 pwd->h[2] = msa_adds_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1083 pwd->h[3] = msa_adds_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1084 pwd->h[4] = msa_adds_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1085 pwd->h[5] = msa_adds_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1086 pwd->h[6] = msa_adds_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1087 pwd->h[7] = msa_adds_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1088 }
1089
1090 void helper_msa_adds_u_w(CPUMIPSState *env,
1091 uint32_t wd, uint32_t ws, uint32_t wt)
1092 {
1093 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1094 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1095 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1096
1097 pwd->w[0] = msa_adds_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1098 pwd->w[1] = msa_adds_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1099 pwd->w[2] = msa_adds_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1100 pwd->w[3] = msa_adds_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1101 }
1102
1103 void helper_msa_adds_u_d(CPUMIPSState *env,
1104 uint32_t wd, uint32_t ws, uint32_t wt)
1105 {
1106 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1107 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1108 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1109
1110 pwd->d[0] = msa_adds_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1111 pwd->d[1] = msa_adds_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1112 }
1113
1114
1115 static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)
1116 {
1117 return arg1 + arg2;
1118 }
1119
1120 void helper_msa_addv_b(CPUMIPSState *env,
1121 uint32_t wd, uint32_t ws, uint32_t wt)
1122 {
1123 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1124 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1125 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1126
1127 pwd->b[0] = msa_addv_df(DF_BYTE, pws->b[0], pwt->b[0]);
1128 pwd->b[1] = msa_addv_df(DF_BYTE, pws->b[1], pwt->b[1]);
1129 pwd->b[2] = msa_addv_df(DF_BYTE, pws->b[2], pwt->b[2]);
1130 pwd->b[3] = msa_addv_df(DF_BYTE, pws->b[3], pwt->b[3]);
1131 pwd->b[4] = msa_addv_df(DF_BYTE, pws->b[4], pwt->b[4]);
1132 pwd->b[5] = msa_addv_df(DF_BYTE, pws->b[5], pwt->b[5]);
1133 pwd->b[6] = msa_addv_df(DF_BYTE, pws->b[6], pwt->b[6]);
1134 pwd->b[7] = msa_addv_df(DF_BYTE, pws->b[7], pwt->b[7]);
1135 pwd->b[8] = msa_addv_df(DF_BYTE, pws->b[8], pwt->b[8]);
1136 pwd->b[9] = msa_addv_df(DF_BYTE, pws->b[9], pwt->b[9]);
1137 pwd->b[10] = msa_addv_df(DF_BYTE, pws->b[10], pwt->b[10]);
1138 pwd->b[11] = msa_addv_df(DF_BYTE, pws->b[11], pwt->b[11]);
1139 pwd->b[12] = msa_addv_df(DF_BYTE, pws->b[12], pwt->b[12]);
1140 pwd->b[13] = msa_addv_df(DF_BYTE, pws->b[13], pwt->b[13]);
1141 pwd->b[14] = msa_addv_df(DF_BYTE, pws->b[14], pwt->b[14]);
1142 pwd->b[15] = msa_addv_df(DF_BYTE, pws->b[15], pwt->b[15]);
1143 }
1144
1145 void helper_msa_addv_h(CPUMIPSState *env,
1146 uint32_t wd, uint32_t ws, uint32_t wt)
1147 {
1148 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1149 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1150 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1151
1152 pwd->h[0] = msa_addv_df(DF_HALF, pws->h[0], pwt->h[0]);
1153 pwd->h[1] = msa_addv_df(DF_HALF, pws->h[1], pwt->h[1]);
1154 pwd->h[2] = msa_addv_df(DF_HALF, pws->h[2], pwt->h[2]);
1155 pwd->h[3] = msa_addv_df(DF_HALF, pws->h[3], pwt->h[3]);
1156 pwd->h[4] = msa_addv_df(DF_HALF, pws->h[4], pwt->h[4]);
1157 pwd->h[5] = msa_addv_df(DF_HALF, pws->h[5], pwt->h[5]);
1158 pwd->h[6] = msa_addv_df(DF_HALF, pws->h[6], pwt->h[6]);
1159 pwd->h[7] = msa_addv_df(DF_HALF, pws->h[7], pwt->h[7]);
1160 }
1161
1162 void helper_msa_addv_w(CPUMIPSState *env,
1163 uint32_t wd, uint32_t ws, uint32_t wt)
1164 {
1165 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1166 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1167 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1168
1169 pwd->w[0] = msa_addv_df(DF_WORD, pws->w[0], pwt->w[0]);
1170 pwd->w[1] = msa_addv_df(DF_WORD, pws->w[1], pwt->w[1]);
1171 pwd->w[2] = msa_addv_df(DF_WORD, pws->w[2], pwt->w[2]);
1172 pwd->w[3] = msa_addv_df(DF_WORD, pws->w[3], pwt->w[3]);
1173 }
1174
1175 void helper_msa_addv_d(CPUMIPSState *env,
1176 uint32_t wd, uint32_t ws, uint32_t wt)
1177 {
1178 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1179 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1180 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1181
1182 pwd->d[0] = msa_addv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1183 pwd->d[1] = msa_addv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1184 }
1185
1186
1187 #define SIGNED_EVEN(a, df) \
1188 ((((int64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1189
1190 #define UNSIGNED_EVEN(a, df) \
1191 ((((uint64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1192
1193 #define SIGNED_ODD(a, df) \
1194 ((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1195
1196 #define UNSIGNED_ODD(a, df) \
1197 ((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1198
1199
1200 static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1201 {
1202 return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
1203 }
1204
1205 void helper_msa_hadd_s_h(CPUMIPSState *env,
1206 uint32_t wd, uint32_t ws, uint32_t wt)
1207 {
1208 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1209 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1210 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1211
1212 pwd->h[0] = msa_hadd_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1213 pwd->h[1] = msa_hadd_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1214 pwd->h[2] = msa_hadd_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1215 pwd->h[3] = msa_hadd_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1216 pwd->h[4] = msa_hadd_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1217 pwd->h[5] = msa_hadd_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1218 pwd->h[6] = msa_hadd_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1219 pwd->h[7] = msa_hadd_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1220 }
1221
1222 void helper_msa_hadd_s_w(CPUMIPSState *env,
1223 uint32_t wd, uint32_t ws, uint32_t wt)
1224 {
1225 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1226 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1227 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1228
1229 pwd->w[0] = msa_hadd_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1230 pwd->w[1] = msa_hadd_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1231 pwd->w[2] = msa_hadd_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1232 pwd->w[3] = msa_hadd_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1233 }
1234
1235 void helper_msa_hadd_s_d(CPUMIPSState *env,
1236 uint32_t wd, uint32_t ws, uint32_t wt)
1237 {
1238 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1239 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1240 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1241
1242 pwd->d[0] = msa_hadd_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1243 pwd->d[1] = msa_hadd_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1244 }
1245
1246
1247 static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1248 {
1249 return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
1250 }
1251
1252 void helper_msa_hadd_u_h(CPUMIPSState *env,
1253 uint32_t wd, uint32_t ws, uint32_t wt)
1254 {
1255 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1256 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1257 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1258
1259 pwd->h[0] = msa_hadd_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1260 pwd->h[1] = msa_hadd_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1261 pwd->h[2] = msa_hadd_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1262 pwd->h[3] = msa_hadd_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1263 pwd->h[4] = msa_hadd_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1264 pwd->h[5] = msa_hadd_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1265 pwd->h[6] = msa_hadd_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1266 pwd->h[7] = msa_hadd_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1267 }
1268
1269 void helper_msa_hadd_u_w(CPUMIPSState *env,
1270 uint32_t wd, uint32_t ws, uint32_t wt)
1271 {
1272 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1273 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1274 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1275
1276 pwd->w[0] = msa_hadd_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1277 pwd->w[1] = msa_hadd_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1278 pwd->w[2] = msa_hadd_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1279 pwd->w[3] = msa_hadd_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1280 }
1281
1282 void helper_msa_hadd_u_d(CPUMIPSState *env,
1283 uint32_t wd, uint32_t ws, uint32_t wt)
1284 {
1285 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1286 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1287 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1288
1289 pwd->d[0] = msa_hadd_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1290 pwd->d[1] = msa_hadd_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1291 }
1292
1293
1294 /*
1295 * Int Average
1296 * -----------
1297 *
1298 * +---------------+----------------------------------------------------------+
1299 * | AVE_S.B | Vector Signed Average (byte) |
1300 * | AVE_S.H | Vector Signed Average (halfword) |
1301 * | AVE_S.W | Vector Signed Average (word) |
1302 * | AVE_S.D | Vector Signed Average (doubleword) |
1303 * | AVE_U.B | Vector Unsigned Average (byte) |
1304 * | AVE_U.H | Vector Unsigned Average (halfword) |
1305 * | AVE_U.W | Vector Unsigned Average (word) |
1306 * | AVE_U.D | Vector Unsigned Average (doubleword) |
1307 * | AVER_S.B | Vector Signed Average Rounded (byte) |
1308 * | AVER_S.H | Vector Signed Average Rounded (halfword) |
1309 * | AVER_S.W | Vector Signed Average Rounded (word) |
1310 * | AVER_S.D | Vector Signed Average Rounded (doubleword) |
1311 * | AVER_U.B | Vector Unsigned Average Rounded (byte) |
1312 * | AVER_U.H | Vector Unsigned Average Rounded (halfword) |
1313 * | AVER_U.W | Vector Unsigned Average Rounded (word) |
1314 * | AVER_U.D | Vector Unsigned Average Rounded (doubleword) |
1315 * +---------------+----------------------------------------------------------+
1316 */
1317
1318 static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1319 {
1320 /* signed shift */
1321 return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
1322 }
1323
1324 void helper_msa_ave_s_b(CPUMIPSState *env,
1325 uint32_t wd, uint32_t ws, uint32_t wt)
1326 {
1327 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1328 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1329 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1330
1331 pwd->b[0] = msa_ave_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1332 pwd->b[1] = msa_ave_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1333 pwd->b[2] = msa_ave_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1334 pwd->b[3] = msa_ave_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1335 pwd->b[4] = msa_ave_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1336 pwd->b[5] = msa_ave_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1337 pwd->b[6] = msa_ave_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1338 pwd->b[7] = msa_ave_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1339 pwd->b[8] = msa_ave_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1340 pwd->b[9] = msa_ave_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1341 pwd->b[10] = msa_ave_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1342 pwd->b[11] = msa_ave_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1343 pwd->b[12] = msa_ave_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1344 pwd->b[13] = msa_ave_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1345 pwd->b[14] = msa_ave_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1346 pwd->b[15] = msa_ave_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1347 }
1348
1349 void helper_msa_ave_s_h(CPUMIPSState *env,
1350 uint32_t wd, uint32_t ws, uint32_t wt)
1351 {
1352 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1353 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1354 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1355
1356 pwd->h[0] = msa_ave_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1357 pwd->h[1] = msa_ave_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1358 pwd->h[2] = msa_ave_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1359 pwd->h[3] = msa_ave_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1360 pwd->h[4] = msa_ave_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1361 pwd->h[5] = msa_ave_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1362 pwd->h[6] = msa_ave_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1363 pwd->h[7] = msa_ave_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1364 }
1365
1366 void helper_msa_ave_s_w(CPUMIPSState *env,
1367 uint32_t wd, uint32_t ws, uint32_t wt)
1368 {
1369 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1370 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1371 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1372
1373 pwd->w[0] = msa_ave_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1374 pwd->w[1] = msa_ave_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1375 pwd->w[2] = msa_ave_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1376 pwd->w[3] = msa_ave_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1377 }
1378
1379 void helper_msa_ave_s_d(CPUMIPSState *env,
1380 uint32_t wd, uint32_t ws, uint32_t wt)
1381 {
1382 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1383 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1384 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1385
1386 pwd->d[0] = msa_ave_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1387 pwd->d[1] = msa_ave_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1388 }
1389
1390 static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1391 {
1392 uint64_t u_arg1 = UNSIGNED(arg1, df);
1393 uint64_t u_arg2 = UNSIGNED(arg2, df);
1394 /* unsigned shift */
1395 return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
1396 }
1397
1398 void helper_msa_ave_u_b(CPUMIPSState *env,
1399 uint32_t wd, uint32_t ws, uint32_t wt)
1400 {
1401 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1402 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1403 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1404
1405 pwd->b[0] = msa_ave_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1406 pwd->b[1] = msa_ave_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1407 pwd->b[2] = msa_ave_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1408 pwd->b[3] = msa_ave_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1409 pwd->b[4] = msa_ave_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1410 pwd->b[5] = msa_ave_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1411 pwd->b[6] = msa_ave_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1412 pwd->b[7] = msa_ave_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1413 pwd->b[8] = msa_ave_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1414 pwd->b[9] = msa_ave_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1415 pwd->b[10] = msa_ave_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1416 pwd->b[11] = msa_ave_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1417 pwd->b[12] = msa_ave_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1418 pwd->b[13] = msa_ave_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1419 pwd->b[14] = msa_ave_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1420 pwd->b[15] = msa_ave_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1421 }
1422
1423 void helper_msa_ave_u_h(CPUMIPSState *env,
1424 uint32_t wd, uint32_t ws, uint32_t wt)
1425 {
1426 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1427 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1428 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1429
1430 pwd->h[0] = msa_ave_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1431 pwd->h[1] = msa_ave_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1432 pwd->h[2] = msa_ave_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1433 pwd->h[3] = msa_ave_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1434 pwd->h[4] = msa_ave_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1435 pwd->h[5] = msa_ave_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1436 pwd->h[6] = msa_ave_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1437 pwd->h[7] = msa_ave_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1438 }
1439
1440 void helper_msa_ave_u_w(CPUMIPSState *env,
1441 uint32_t wd, uint32_t ws, uint32_t wt)
1442 {
1443 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1444 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1445 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1446
1447 pwd->w[0] = msa_ave_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1448 pwd->w[1] = msa_ave_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1449 pwd->w[2] = msa_ave_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1450 pwd->w[3] = msa_ave_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1451 }
1452
1453 void helper_msa_ave_u_d(CPUMIPSState *env,
1454 uint32_t wd, uint32_t ws, uint32_t wt)
1455 {
1456 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1457 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1458 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1459
1460 pwd->d[0] = msa_ave_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1461 pwd->d[1] = msa_ave_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1462 }
1463
1464 static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1465 {
1466 /* signed shift */
1467 return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
1468 }
1469
1470 void helper_msa_aver_s_b(CPUMIPSState *env,
1471 uint32_t wd, uint32_t ws, uint32_t wt)
1472 {
1473 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1474 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1475 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1476
1477 pwd->b[0] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1478 pwd->b[1] = msa_aver_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1479 pwd->b[2] = msa_aver_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1480 pwd->b[3] = msa_aver_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1481 pwd->b[4] = msa_aver_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1482 pwd->b[5] = msa_aver_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1483 pwd->b[6] = msa_aver_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1484 pwd->b[7] = msa_aver_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1485 pwd->b[8] = msa_aver_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1486 pwd->b[9] = msa_aver_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1487 pwd->b[10] = msa_aver_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1488 pwd->b[11] = msa_aver_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1489 pwd->b[12] = msa_aver_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1490 pwd->b[13] = msa_aver_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1491 pwd->b[14] = msa_aver_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1492 pwd->b[15] = msa_aver_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1493 }
1494
1495 void helper_msa_aver_s_h(CPUMIPSState *env,
1496 uint32_t wd, uint32_t ws, uint32_t wt)
1497 {
1498 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1499 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1500 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1501
1502 pwd->h[0] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1503 pwd->h[1] = msa_aver_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1504 pwd->h[2] = msa_aver_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1505 pwd->h[3] = msa_aver_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1506 pwd->h[4] = msa_aver_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1507 pwd->h[5] = msa_aver_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1508 pwd->h[6] = msa_aver_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1509 pwd->h[7] = msa_aver_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1510 }
1511
1512 void helper_msa_aver_s_w(CPUMIPSState *env,
1513 uint32_t wd, uint32_t ws, uint32_t wt)
1514 {
1515 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1516 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1517 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1518
1519 pwd->w[0] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1520 pwd->w[1] = msa_aver_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1521 pwd->w[2] = msa_aver_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1522 pwd->w[3] = msa_aver_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1523 }
1524
1525 void helper_msa_aver_s_d(CPUMIPSState *env,
1526 uint32_t wd, uint32_t ws, uint32_t wt)
1527 {
1528 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1529 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1530 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1531
1532 pwd->d[0] = msa_aver_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1533 pwd->d[1] = msa_aver_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1534 }
1535
1536 static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1537 {
1538 uint64_t u_arg1 = UNSIGNED(arg1, df);
1539 uint64_t u_arg2 = UNSIGNED(arg2, df);
1540 /* unsigned shift */
1541 return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
1542 }
1543
1544 void helper_msa_aver_u_b(CPUMIPSState *env,
1545 uint32_t wd, uint32_t ws, uint32_t wt)
1546 {
1547 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1548 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1549 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1550
1551 pwd->b[0] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1552 pwd->b[1] = msa_aver_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1553 pwd->b[2] = msa_aver_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1554 pwd->b[3] = msa_aver_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1555 pwd->b[4] = msa_aver_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1556 pwd->b[5] = msa_aver_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1557 pwd->b[6] = msa_aver_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1558 pwd->b[7] = msa_aver_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1559 pwd->b[8] = msa_aver_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1560 pwd->b[9] = msa_aver_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1561 pwd->b[10] = msa_aver_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1562 pwd->b[11] = msa_aver_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1563 pwd->b[12] = msa_aver_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1564 pwd->b[13] = msa_aver_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1565 pwd->b[14] = msa_aver_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1566 pwd->b[15] = msa_aver_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1567 }
1568
1569 void helper_msa_aver_u_h(CPUMIPSState *env,
1570 uint32_t wd, uint32_t ws, uint32_t wt)
1571 {
1572 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1573 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1574 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1575
1576 pwd->h[0] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1577 pwd->h[1] = msa_aver_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1578 pwd->h[2] = msa_aver_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1579 pwd->h[3] = msa_aver_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1580 pwd->h[4] = msa_aver_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1581 pwd->h[5] = msa_aver_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1582 pwd->h[6] = msa_aver_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1583 pwd->h[7] = msa_aver_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1584 }
1585
1586 void helper_msa_aver_u_w(CPUMIPSState *env,
1587 uint32_t wd, uint32_t ws, uint32_t wt)
1588 {
1589 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1590 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1591 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1592
1593 pwd->w[0] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1594 pwd->w[1] = msa_aver_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1595 pwd->w[2] = msa_aver_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1596 pwd->w[3] = msa_aver_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1597 }
1598
1599 void helper_msa_aver_u_d(CPUMIPSState *env,
1600 uint32_t wd, uint32_t ws, uint32_t wt)
1601 {
1602 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1603 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1604 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1605
1606 pwd->d[0] = msa_aver_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1607 pwd->d[1] = msa_aver_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1608 }
1609
1610
1611 /*
1612 * Int Compare
1613 * -----------
1614 *
1615 * +---------------+----------------------------------------------------------+
1616 * | CEQ.B | Vector Compare Equal (byte) |
1617 * | CEQ.H | Vector Compare Equal (halfword) |
1618 * | CEQ.W | Vector Compare Equal (word) |
1619 * | CEQ.D | Vector Compare Equal (doubleword) |
1620 * | CLE_S.B | Vector Compare Signed Less Than or Equal (byte) |
1621 * | CLE_S.H | Vector Compare Signed Less Than or Equal (halfword) |
1622 * | CLE_S.W | Vector Compare Signed Less Than or Equal (word) |
1623 * | CLE_S.D | Vector Compare Signed Less Than or Equal (doubleword) |
1624 * | CLE_U.B | Vector Compare Unsigned Less Than or Equal (byte) |
1625 * | CLE_U.H | Vector Compare Unsigned Less Than or Equal (halfword) |
1626 * | CLE_U.W | Vector Compare Unsigned Less Than or Equal (word) |
1627 * | CLE_U.D | Vector Compare Unsigned Less Than or Equal (doubleword) |
1628 * | CLT_S.B | Vector Compare Signed Less Than (byte) |
1629 * | CLT_S.H | Vector Compare Signed Less Than (halfword) |
1630 * | CLT_S.W | Vector Compare Signed Less Than (word) |
1631 * | CLT_S.D | Vector Compare Signed Less Than (doubleword) |
1632 * | CLT_U.B | Vector Compare Unsigned Less Than (byte) |
1633 * | CLT_U.H | Vector Compare Unsigned Less Than (halfword) |
1634 * | CLT_U.W | Vector Compare Unsigned Less Than (word) |
1635 * | CLT_U.D | Vector Compare Unsigned Less Than (doubleword) |
1636 * +---------------+----------------------------------------------------------+
1637 */
1638
1639 static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2)
1640 {
1641 return arg1 == arg2 ? -1 : 0;
1642 }
1643
1644 void helper_msa_ceq_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1645 {
1646 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1647 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1648 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1649
1650 pwd->b[0] = msa_ceq_df(DF_BYTE, pws->b[0], pwt->b[0]);
1651 pwd->b[1] = msa_ceq_df(DF_BYTE, pws->b[1], pwt->b[1]);
1652 pwd->b[2] = msa_ceq_df(DF_BYTE, pws->b[2], pwt->b[2]);
1653 pwd->b[3] = msa_ceq_df(DF_BYTE, pws->b[3], pwt->b[3]);
1654 pwd->b[4] = msa_ceq_df(DF_BYTE, pws->b[4], pwt->b[4]);
1655 pwd->b[5] = msa_ceq_df(DF_BYTE, pws->b[5], pwt->b[5]);
1656 pwd->b[6] = msa_ceq_df(DF_BYTE, pws->b[6], pwt->b[6]);
1657 pwd->b[7] = msa_ceq_df(DF_BYTE, pws->b[7], pwt->b[7]);
1658 pwd->b[8] = msa_ceq_df(DF_BYTE, pws->b[8], pwt->b[8]);
1659 pwd->b[9] = msa_ceq_df(DF_BYTE, pws->b[9], pwt->b[9]);
1660 pwd->b[10] = msa_ceq_df(DF_BYTE, pws->b[10], pwt->b[10]);
1661 pwd->b[11] = msa_ceq_df(DF_BYTE, pws->b[11], pwt->b[11]);
1662 pwd->b[12] = msa_ceq_df(DF_BYTE, pws->b[12], pwt->b[12]);
1663 pwd->b[13] = msa_ceq_df(DF_BYTE, pws->b[13], pwt->b[13]);
1664 pwd->b[14] = msa_ceq_df(DF_BYTE, pws->b[14], pwt->b[14]);
1665 pwd->b[15] = msa_ceq_df(DF_BYTE, pws->b[15], pwt->b[15]);
1666 }
1667
1668 void helper_msa_ceq_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1669 {
1670 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1671 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1672 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1673
1674 pwd->h[0] = msa_ceq_df(DF_HALF, pws->h[0], pwt->h[0]);
1675 pwd->h[1] = msa_ceq_df(DF_HALF, pws->h[1], pwt->h[1]);
1676 pwd->h[2] = msa_ceq_df(DF_HALF, pws->h[2], pwt->h[2]);
1677 pwd->h[3] = msa_ceq_df(DF_HALF, pws->h[3], pwt->h[3]);
1678 pwd->h[4] = msa_ceq_df(DF_HALF, pws->h[4], pwt->h[4]);
1679 pwd->h[5] = msa_ceq_df(DF_HALF, pws->h[5], pwt->h[5]);
1680 pwd->h[6] = msa_ceq_df(DF_HALF, pws->h[6], pwt->h[6]);
1681 pwd->h[7] = msa_ceq_df(DF_HALF, pws->h[7], pwt->h[7]);
1682 }
1683
1684 void helper_msa_ceq_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1685 {
1686 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1687 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1688 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1689
1690 pwd->w[0] = msa_ceq_df(DF_WORD, pws->w[0], pwt->w[0]);
1691 pwd->w[1] = msa_ceq_df(DF_WORD, pws->w[1], pwt->w[1]);
1692 pwd->w[2] = msa_ceq_df(DF_WORD, pws->w[2], pwt->w[2]);
1693 pwd->w[3] = msa_ceq_df(DF_WORD, pws->w[3], pwt->w[3]);
1694 }
1695
1696 void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1697 {
1698 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1699 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1700 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1701
1702 pwd->d[0] = msa_ceq_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1703 pwd->d[1] = msa_ceq_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1704 }
1705
1706 static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1707 {
1708 return arg1 <= arg2 ? -1 : 0;
1709 }
1710
1711 void helper_msa_cle_s_b(CPUMIPSState *env,
1712 uint32_t wd, uint32_t ws, uint32_t wt)
1713 {
1714 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1715 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1716 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1717
1718 pwd->b[0] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1719 pwd->b[1] = msa_cle_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1720 pwd->b[2] = msa_cle_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1721 pwd->b[3] = msa_cle_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1722 pwd->b[4] = msa_cle_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1723 pwd->b[5] = msa_cle_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1724 pwd->b[6] = msa_cle_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1725 pwd->b[7] = msa_cle_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1726 pwd->b[8] = msa_cle_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1727 pwd->b[9] = msa_cle_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1728 pwd->b[10] = msa_cle_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1729 pwd->b[11] = msa_cle_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1730 pwd->b[12] = msa_cle_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1731 pwd->b[13] = msa_cle_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1732 pwd->b[14] = msa_cle_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1733 pwd->b[15] = msa_cle_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1734 }
1735
1736 void helper_msa_cle_s_h(CPUMIPSState *env,
1737 uint32_t wd, uint32_t ws, uint32_t wt)
1738 {
1739 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1740 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1741 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1742
1743 pwd->h[0] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1744 pwd->h[1] = msa_cle_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1745 pwd->h[2] = msa_cle_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1746 pwd->h[3] = msa_cle_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1747 pwd->h[4] = msa_cle_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1748 pwd->h[5] = msa_cle_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1749 pwd->h[6] = msa_cle_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1750 pwd->h[7] = msa_cle_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1751 }
1752
1753 void helper_msa_cle_s_w(CPUMIPSState *env,
1754 uint32_t wd, uint32_t ws, uint32_t wt)
1755 {
1756 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1757 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1758 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1759
1760 pwd->w[0] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1761 pwd->w[1] = msa_cle_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1762 pwd->w[2] = msa_cle_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1763 pwd->w[3] = msa_cle_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1764 }
1765
1766 void helper_msa_cle_s_d(CPUMIPSState *env,
1767 uint32_t wd, uint32_t ws, uint32_t wt)
1768 {
1769 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1770 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1771 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1772
1773 pwd->d[0] = msa_cle_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1774 pwd->d[1] = msa_cle_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1775 }
1776
1777 static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1778 {
1779 uint64_t u_arg1 = UNSIGNED(arg1, df);
1780 uint64_t u_arg2 = UNSIGNED(arg2, df);
1781 return u_arg1 <= u_arg2 ? -1 : 0;
1782 }
1783
1784 void helper_msa_cle_u_b(CPUMIPSState *env,
1785 uint32_t wd, uint32_t ws, uint32_t wt)
1786 {
1787 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1788 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1789 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1790
1791 pwd->b[0] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1792 pwd->b[1] = msa_cle_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1793 pwd->b[2] = msa_cle_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1794 pwd->b[3] = msa_cle_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1795 pwd->b[4] = msa_cle_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1796 pwd->b[5] = msa_cle_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1797 pwd->b[6] = msa_cle_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1798 pwd->b[7] = msa_cle_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1799 pwd->b[8] = msa_cle_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1800 pwd->b[9] = msa_cle_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1801 pwd->b[10] = msa_cle_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1802 pwd->b[11] = msa_cle_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1803 pwd->b[12] = msa_cle_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1804 pwd->b[13] = msa_cle_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1805 pwd->b[14] = msa_cle_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1806 pwd->b[15] = msa_cle_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1807 }
1808
1809 void helper_msa_cle_u_h(CPUMIPSState *env,
1810 uint32_t wd, uint32_t ws, uint32_t wt)
1811 {
1812 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1813 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1814 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1815
1816 pwd->h[0] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1817 pwd->h[1] = msa_cle_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1818 pwd->h[2] = msa_cle_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1819 pwd->h[3] = msa_cle_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1820 pwd->h[4] = msa_cle_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1821 pwd->h[5] = msa_cle_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1822 pwd->h[6] = msa_cle_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1823 pwd->h[7] = msa_cle_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1824 }
1825
1826 void helper_msa_cle_u_w(CPUMIPSState *env,
1827 uint32_t wd, uint32_t ws, uint32_t wt)
1828 {
1829 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1830 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1831 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1832
1833 pwd->w[0] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1834 pwd->w[1] = msa_cle_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1835 pwd->w[2] = msa_cle_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1836 pwd->w[3] = msa_cle_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1837 }
1838
1839 void helper_msa_cle_u_d(CPUMIPSState *env,
1840 uint32_t wd, uint32_t ws, uint32_t wt)
1841 {
1842 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1843 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1844 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1845
1846 pwd->d[0] = msa_cle_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1847 pwd->d[1] = msa_cle_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1848 }
1849
1850 static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1851 {
1852 return arg1 < arg2 ? -1 : 0;
1853 }
1854
1855 void helper_msa_clt_s_b(CPUMIPSState *env,
1856 uint32_t wd, uint32_t ws, uint32_t wt)
1857 {
1858 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1859 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1860 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1861
1862 pwd->b[0] = msa_clt_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1863 pwd->b[1] = msa_clt_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1864 pwd->b[2] = msa_clt_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1865 pwd->b[3] = msa_clt_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1866 pwd->b[4] = msa_clt_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1867 pwd->b[5] = msa_clt_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1868 pwd->b[6] = msa_clt_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1869 pwd->b[7] = msa_clt_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1870 pwd->b[8] = msa_clt_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1871 pwd->b[9] = msa_clt_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1872 pwd->b[10] = msa_clt_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1873 pwd->b[11] = msa_clt_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1874 pwd->b[12] = msa_clt_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1875 pwd->b[13] = msa_clt_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1876 pwd->b[14] = msa_clt_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1877 pwd->b[15] = msa_clt_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1878 }
1879
1880 void helper_msa_clt_s_h(CPUMIPSState *env,
1881 uint32_t wd, uint32_t ws, uint32_t wt)
1882 {
1883 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1884 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1885 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1886
1887 pwd->h[0] = msa_clt_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1888 pwd->h[1] = msa_clt_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1889 pwd->h[2] = msa_clt_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1890 pwd->h[3] = msa_clt_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1891 pwd->h[4] = msa_clt_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1892 pwd->h[5] = msa_clt_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1893 pwd->h[6] = msa_clt_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1894 pwd->h[7] = msa_clt_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1895 }
1896
1897 void helper_msa_clt_s_w(CPUMIPSState *env,
1898 uint32_t wd, uint32_t ws, uint32_t wt)
1899 {
1900 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1901 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1902 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1903
1904 pwd->w[0] = msa_clt_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1905 pwd->w[1] = msa_clt_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1906 pwd->w[2] = msa_clt_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1907 pwd->w[3] = msa_clt_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1908 }
1909
1910 void helper_msa_clt_s_d(CPUMIPSState *env,
1911 uint32_t wd, uint32_t ws, uint32_t wt)
1912 {
1913 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1914 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1915 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1916
1917 pwd->d[0] = msa_clt_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1918 pwd->d[1] = msa_clt_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1919 }
1920
1921 static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1922 {
1923 uint64_t u_arg1 = UNSIGNED(arg1, df);
1924 uint64_t u_arg2 = UNSIGNED(arg2, df);
1925 return u_arg1 < u_arg2 ? -1 : 0;
1926 }
1927
1928 void helper_msa_clt_u_b(CPUMIPSState *env,
1929 uint32_t wd, uint32_t ws, uint32_t wt)
1930 {
1931 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1932 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1933 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1934
1935 pwd->b[0] = msa_clt_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1936 pwd->b[1] = msa_clt_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1937 pwd->b[2] = msa_clt_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1938 pwd->b[3] = msa_clt_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1939 pwd->b[4] = msa_clt_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1940 pwd->b[5] = msa_clt_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1941 pwd->b[6] = msa_clt_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1942 pwd->b[7] = msa_clt_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1943 pwd->b[8] = msa_clt_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1944 pwd->b[9] = msa_clt_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1945 pwd->b[10] = msa_clt_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1946 pwd->b[11] = msa_clt_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1947 pwd->b[12] = msa_clt_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1948 pwd->b[13] = msa_clt_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1949 pwd->b[14] = msa_clt_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1950 pwd->b[15] = msa_clt_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1951 }
1952
1953 void helper_msa_clt_u_h(CPUMIPSState *env,
1954 uint32_t wd, uint32_t ws, uint32_t wt)
1955 {
1956 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1957 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1958 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1959
1960 pwd->h[0] = msa_clt_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1961 pwd->h[1] = msa_clt_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1962 pwd->h[2] = msa_clt_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1963 pwd->h[3] = msa_clt_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1964 pwd->h[4] = msa_clt_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1965 pwd->h[5] = msa_clt_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1966 pwd->h[6] = msa_clt_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1967 pwd->h[7] = msa_clt_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1968 }
1969
1970 void helper_msa_clt_u_w(CPUMIPSState *env,
1971 uint32_t wd, uint32_t ws, uint32_t wt)
1972 {
1973 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1974 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1975 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1976
1977 pwd->w[0] = msa_clt_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1978 pwd->w[1] = msa_clt_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1979 pwd->w[2] = msa_clt_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1980 pwd->w[3] = msa_clt_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1981 }
1982
1983 void helper_msa_clt_u_d(CPUMIPSState *env,
1984 uint32_t wd, uint32_t ws, uint32_t wt)
1985 {
1986 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1987 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1988 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1989
1990 pwd->d[0] = msa_clt_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1991 pwd->d[1] = msa_clt_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1992 }
1993
1994
1995 /*
1996 * Int Divide
1997 * ----------
1998 *
1999 * +---------------+----------------------------------------------------------+
2000 * | DIV_S.B | Vector Signed Divide (byte) |
2001 * | DIV_S.H | Vector Signed Divide (halfword) |
2002 * | DIV_S.W | Vector Signed Divide (word) |
2003 * | DIV_S.D | Vector Signed Divide (doubleword) |
2004 * | DIV_U.B | Vector Unsigned Divide (byte) |
2005 * | DIV_U.H | Vector Unsigned Divide (halfword) |
2006 * | DIV_U.W | Vector Unsigned Divide (word) |
2007 * | DIV_U.D | Vector Unsigned Divide (doubleword) |
2008 * +---------------+----------------------------------------------------------+
2009 */
2010
2011
2012 static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2013 {
2014 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
2015 return DF_MIN_INT(df);
2016 }
2017 return arg2 ? arg1 / arg2
2018 : arg1 >= 0 ? -1 : 1;
2019 }
2020
2021 void helper_msa_div_s_b(CPUMIPSState *env,
2022 uint32_t wd, uint32_t ws, uint32_t wt)
2023 {
2024 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2025 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2026 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2027
2028 pwd->b[0] = msa_div_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2029 pwd->b[1] = msa_div_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2030 pwd->b[2] = msa_div_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2031 pwd->b[3] = msa_div_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2032 pwd->b[4] = msa_div_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2033 pwd->b[5] = msa_div_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2034 pwd->b[6] = msa_div_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2035 pwd->b[7] = msa_div_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2036 pwd->b[8] = msa_div_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2037 pwd->b[9] = msa_div_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2038 pwd->b[10] = msa_div_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2039 pwd->b[11] = msa_div_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2040 pwd->b[12] = msa_div_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2041 pwd->b[13] = msa_div_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2042 pwd->b[14] = msa_div_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2043 pwd->b[15] = msa_div_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2044 }
2045
2046 void helper_msa_div_s_h(CPUMIPSState *env,
2047 uint32_t wd, uint32_t ws, uint32_t wt)
2048 {
2049 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2050 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2051 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2052
2053 pwd->h[0] = msa_div_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2054 pwd->h[1] = msa_div_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2055 pwd->h[2] = msa_div_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2056 pwd->h[3] = msa_div_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2057 pwd->h[4] = msa_div_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2058 pwd->h[5] = msa_div_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2059 pwd->h[6] = msa_div_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2060 pwd->h[7] = msa_div_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2061 }
2062
2063 void helper_msa_div_s_w(CPUMIPSState *env,
2064 uint32_t wd, uint32_t ws, uint32_t wt)
2065 {
2066 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2067 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2068 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2069
2070 pwd->w[0] = msa_div_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2071 pwd->w[1] = msa_div_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2072 pwd->w[2] = msa_div_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2073 pwd->w[3] = msa_div_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2074 }
2075
2076 void helper_msa_div_s_d(CPUMIPSState *env,
2077 uint32_t wd, uint32_t ws, uint32_t wt)
2078 {
2079 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2080 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2081 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2082
2083 pwd->d[0] = msa_div_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2084 pwd->d[1] = msa_div_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2085 }
2086
2087 static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2088 {
2089 uint64_t u_arg1 = UNSIGNED(arg1, df);
2090 uint64_t u_arg2 = UNSIGNED(arg2, df);
2091 return arg2 ? u_arg1 / u_arg2 : -1;
2092 }
2093
2094 void helper_msa_div_u_b(CPUMIPSState *env,
2095 uint32_t wd, uint32_t ws, uint32_t wt)
2096 {
2097 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2098 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2099 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2100
2101 pwd->b[0] = msa_div_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2102 pwd->b[1] = msa_div_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2103 pwd->b[2] = msa_div_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2104 pwd->b[3] = msa_div_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2105 pwd->b[4] = msa_div_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2106 pwd->b[5] = msa_div_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2107 pwd->b[6] = msa_div_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2108 pwd->b[7] = msa_div_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2109 pwd->b[8] = msa_div_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2110 pwd->b[9] = msa_div_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2111 pwd->b[10] = msa_div_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2112 pwd->b[11] = msa_div_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2113 pwd->b[12] = msa_div_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2114 pwd->b[13] = msa_div_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2115 pwd->b[14] = msa_div_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2116 pwd->b[15] = msa_div_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2117 }
2118
2119 void helper_msa_div_u_h(CPUMIPSState *env,
2120 uint32_t wd, uint32_t ws, uint32_t wt)
2121 {
2122 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2123 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2124 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2125
2126 pwd->h[0] = msa_div_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2127 pwd->h[1] = msa_div_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2128 pwd->h[2] = msa_div_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2129 pwd->h[3] = msa_div_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2130 pwd->h[4] = msa_div_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2131 pwd->h[5] = msa_div_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2132 pwd->h[6] = msa_div_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2133 pwd->h[7] = msa_div_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2134 }
2135
2136 void helper_msa_div_u_w(CPUMIPSState *env,
2137 uint32_t wd, uint32_t ws, uint32_t wt)
2138 {
2139 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2140 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2141 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2142
2143 pwd->w[0] = msa_div_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2144 pwd->w[1] = msa_div_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2145 pwd->w[2] = msa_div_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2146 pwd->w[3] = msa_div_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2147 }
2148
2149 void helper_msa_div_u_d(CPUMIPSState *env,
2150 uint32_t wd, uint32_t ws, uint32_t wt)
2151 {
2152 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2153 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2154 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2155
2156 pwd->d[0] = msa_div_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2157 pwd->d[1] = msa_div_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2158 }
2159
2160
2161 /*
2162 * Int Dot Product
2163 * ---------------
2164 *
2165 * +---------------+----------------------------------------------------------+
2166 * | DOTP_S.H | Vector Signed Dot Product (halfword) |
2167 * | DOTP_S.W | Vector Signed Dot Product (word) |
2168 * | DOTP_S.D | Vector Signed Dot Product (doubleword) |
2169 * | DOTP_U.H | Vector Unsigned Dot Product (halfword) |
2170 * | DOTP_U.W | Vector Unsigned Dot Product (word) |
2171 * | DOTP_U.D | Vector Unsigned Dot Product (doubleword) |
2172 * | DPADD_S.H | Vector Signed Dot Product (halfword) |
2173 * | DPADD_S.W | Vector Signed Dot Product (word) |
2174 * | DPADD_S.D | Vector Signed Dot Product (doubleword) |
2175 * | DPADD_U.H | Vector Unsigned Dot Product (halfword) |
2176 * | DPADD_U.W | Vector Unsigned Dot Product (word) |
2177 * | DPADD_U.D | Vector Unsigned Dot Product (doubleword) |
2178 * | DPSUB_S.H | Vector Signed Dot Product (halfword) |
2179 * | DPSUB_S.W | Vector Signed Dot Product (word) |
2180 * | DPSUB_S.D | Vector Signed Dot Product (doubleword) |
2181 * | DPSUB_U.H | Vector Unsigned Dot Product (halfword) |
2182 * | DPSUB_U.W | Vector Unsigned Dot Product (word) |
2183 * | DPSUB_U.D | Vector Unsigned Dot Product (doubleword) |
2184 * +---------------+----------------------------------------------------------+
2185 */
2186
2187 /* TODO: insert Int Dot Product group helpers here */
2188
2189
2190 /*
2191 * Int Max Min
2192 * -----------
2193 *
2194 * +---------------+----------------------------------------------------------+
2195 * | MAX_A.B | Vector Maximum Based on Absolute Value (byte) |
2196 * | MAX_A.H | Vector Maximum Based on Absolute Value (halfword) |
2197 * | MAX_A.W | Vector Maximum Based on Absolute Value (word) |
2198 * | MAX_A.D | Vector Maximum Based on Absolute Value (doubleword) |
2199 * | MAX_S.B | Vector Signed Maximum (byte) |
2200 * | MAX_S.H | Vector Signed Maximum (halfword) |
2201 * | MAX_S.W | Vector Signed Maximum (word) |
2202 * | MAX_S.D | Vector Signed Maximum (doubleword) |
2203 * | MAX_U.B | Vector Unsigned Maximum (byte) |
2204 * | MAX_U.H | Vector Unsigned Maximum (halfword) |
2205 * | MAX_U.W | Vector Unsigned Maximum (word) |
2206 * | MAX_U.D | Vector Unsigned Maximum (doubleword) |
2207 * | MIN_A.B | Vector Minimum Based on Absolute Value (byte) |
2208 * | MIN_A.H | Vector Minimum Based on Absolute Value (halfword) |
2209 * | MIN_A.W | Vector Minimum Based on Absolute Value (word) |
2210 * | MIN_A.D | Vector Minimum Based on Absolute Value (doubleword) |
2211 * | MIN_S.B | Vector Signed Minimum (byte) |
2212 * | MIN_S.H | Vector Signed Minimum (halfword) |
2213 * | MIN_S.W | Vector Signed Minimum (word) |
2214 * | MIN_S.D | Vector Signed Minimum (doubleword) |
2215 * | MIN_U.B | Vector Unsigned Minimum (byte) |
2216 * | MIN_U.H | Vector Unsigned Minimum (halfword) |
2217 * | MIN_U.W | Vector Unsigned Minimum (word) |
2218 * | MIN_U.D | Vector Unsigned Minimum (doubleword) |
2219 * +---------------+----------------------------------------------------------+
2220 */
2221
2222 static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2223 {
2224 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2225 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2226 return abs_arg1 > abs_arg2 ? arg1 : arg2;
2227 }
2228
2229 void helper_msa_max_a_b(CPUMIPSState *env,
2230 uint32_t wd, uint32_t ws, uint32_t wt)
2231 {
2232 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2233 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2234 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2235
2236 pwd->b[0] = msa_max_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2237 pwd->b[1] = msa_max_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2238 pwd->b[2] = msa_max_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2239 pwd->b[3] = msa_max_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2240 pwd->b[4] = msa_max_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2241 pwd->b[5] = msa_max_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2242 pwd->b[6] = msa_max_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2243 pwd->b[7] = msa_max_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2244 pwd->b[8] = msa_max_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2245 pwd->b[9] = msa_max_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2246 pwd->b[10] = msa_max_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2247 pwd->b[11] = msa_max_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2248 pwd->b[12] = msa_max_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2249 pwd->b[13] = msa_max_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2250 pwd->b[14] = msa_max_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2251 pwd->b[15] = msa_max_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2252 }
2253
2254 void helper_msa_max_a_h(CPUMIPSState *env,
2255 uint32_t wd, uint32_t ws, uint32_t wt)
2256 {
2257 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2258 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2259 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2260
2261 pwd->h[0] = msa_max_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2262 pwd->h[1] = msa_max_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2263 pwd->h[2] = msa_max_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2264 pwd->h[3] = msa_max_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2265 pwd->h[4] = msa_max_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2266 pwd->h[5] = msa_max_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2267 pwd->h[6] = msa_max_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2268 pwd->h[7] = msa_max_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2269 }
2270
2271 void helper_msa_max_a_w(CPUMIPSState *env,
2272 uint32_t wd, uint32_t ws, uint32_t wt)
2273 {
2274 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2275 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2276 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2277
2278 pwd->w[0] = msa_max_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2279 pwd->w[1] = msa_max_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2280 pwd->w[2] = msa_max_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2281 pwd->w[3] = msa_max_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2282 }
2283
2284 void helper_msa_max_a_d(CPUMIPSState *env,
2285 uint32_t wd, uint32_t ws, uint32_t wt)
2286 {
2287 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2288 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2289 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2290
2291 pwd->d[0] = msa_max_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2292 pwd->d[1] = msa_max_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2293 }
2294
2295
2296 static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2297 {
2298 return arg1 > arg2 ? arg1 : arg2;
2299 }
2300
2301 void helper_msa_max_s_b(CPUMIPSState *env,
2302 uint32_t wd, uint32_t ws, uint32_t wt)
2303 {
2304 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2305 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2306 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2307
2308 pwd->b[0] = msa_max_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2309 pwd->b[1] = msa_max_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2310 pwd->b[2] = msa_max_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2311 pwd->b[3] = msa_max_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2312 pwd->b[4] = msa_max_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2313 pwd->b[5] = msa_max_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2314 pwd->b[6] = msa_max_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2315 pwd->b[7] = msa_max_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2316 pwd->b[8] = msa_max_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2317 pwd->b[9] = msa_max_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2318 pwd->b[10] = msa_max_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2319 pwd->b[11] = msa_max_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2320 pwd->b[12] = msa_max_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2321 pwd->b[13] = msa_max_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2322 pwd->b[14] = msa_max_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2323 pwd->b[15] = msa_max_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2324 }
2325
2326 void helper_msa_max_s_h(CPUMIPSState *env,
2327 uint32_t wd, uint32_t ws, uint32_t wt)
2328 {
2329 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2330 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2331 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2332
2333 pwd->h[0] = msa_max_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2334 pwd->h[1] = msa_max_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2335 pwd->h[2] = msa_max_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2336 pwd->h[3] = msa_max_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2337 pwd->h[4] = msa_max_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2338 pwd->h[5] = msa_max_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2339 pwd->h[6] = msa_max_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2340 pwd->h[7] = msa_max_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2341 }
2342
2343 void helper_msa_max_s_w(CPUMIPSState *env,
2344 uint32_t wd, uint32_t ws, uint32_t wt)
2345 {
2346 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2347 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2348 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2349
2350 pwd->w[0] = msa_max_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2351 pwd->w[1] = msa_max_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2352 pwd->w[2] = msa_max_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2353 pwd->w[3] = msa_max_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2354 }
2355
2356 void helper_msa_max_s_d(CPUMIPSState *env,
2357 uint32_t wd, uint32_t ws, uint32_t wt)
2358 {
2359 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2360 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2361 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2362
2363 pwd->d[0] = msa_max_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2364 pwd->d[1] = msa_max_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2365 }
2366
2367
2368 static inline int64_t msa_max_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2369 {
2370 uint64_t u_arg1 = UNSIGNED(arg1, df);
2371 uint64_t u_arg2 = UNSIGNED(arg2, df);
2372 return u_arg1 > u_arg2 ? arg1 : arg2;
2373 }
2374
2375 void helper_msa_max_u_b(CPUMIPSState *env,
2376 uint32_t wd, uint32_t ws, uint32_t wt)
2377 {
2378 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2379 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2380 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2381
2382 pwd->b[0] = msa_max_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2383 pwd->b[1] = msa_max_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2384 pwd->b[2] = msa_max_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2385 pwd->b[3] = msa_max_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2386 pwd->b[4] = msa_max_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2387 pwd->b[5] = msa_max_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2388 pwd->b[6] = msa_max_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2389 pwd->b[7] = msa_max_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2390 pwd->b[8] = msa_max_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2391 pwd->b[9] = msa_max_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2392 pwd->b[10] = msa_max_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2393 pwd->b[11] = msa_max_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2394 pwd->b[12] = msa_max_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2395 pwd->b[13] = msa_max_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2396 pwd->b[14] = msa_max_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2397 pwd->b[15] = msa_max_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2398 }
2399
2400 void helper_msa_max_u_h(CPUMIPSState *env,
2401 uint32_t wd, uint32_t ws, uint32_t wt)
2402 {
2403 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2404 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2405 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2406
2407 pwd->h[0] = msa_max_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2408 pwd->h[1] = msa_max_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2409 pwd->h[2] = msa_max_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2410 pwd->h[3] = msa_max_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2411 pwd->h[4] = msa_max_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2412 pwd->h[5] = msa_max_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2413 pwd->h[6] = msa_max_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2414 pwd->h[7] = msa_max_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2415 }
2416
2417 void helper_msa_max_u_w(CPUMIPSState *env,
2418 uint32_t wd, uint32_t ws, uint32_t wt)
2419 {
2420 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2421 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2422 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2423
2424 pwd->w[0] = msa_max_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2425 pwd->w[1] = msa_max_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2426 pwd->w[2] = msa_max_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2427 pwd->w[3] = msa_max_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2428 }
2429
2430 void helper_msa_max_u_d(CPUMIPSState *env,
2431 uint32_t wd, uint32_t ws, uint32_t wt)
2432 {
2433 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2434 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2435 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2436
2437 pwd->d[0] = msa_max_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2438 pwd->d[1] = msa_max_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2439 }
2440
2441
2442 static inline int64_t msa_min_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2443 {
2444 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2445 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2446 return abs_arg1 < abs_arg2 ? arg1 : arg2;
2447 }
2448
2449 void helper_msa_min_a_b(CPUMIPSState *env,
2450 uint32_t wd, uint32_t ws, uint32_t wt)
2451 {
2452 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2453 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2454 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2455
2456 pwd->b[0] = msa_min_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2457 pwd->b[1] = msa_min_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2458 pwd->b[2] = msa_min_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2459 pwd->b[3] = msa_min_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2460 pwd->b[4] = msa_min_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2461 pwd->b[5] = msa_min_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2462 pwd->b[6] = msa_min_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2463 pwd->b[7] = msa_min_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2464 pwd->b[8] = msa_min_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2465 pwd->b[9] = msa_min_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2466 pwd->b[10] = msa_min_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2467 pwd->b[11] = msa_min_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2468 pwd->b[12] = msa_min_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2469 pwd->b[13] = msa_min_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2470 pwd->b[14] = msa_min_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2471 pwd->b[15] = msa_min_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2472 }
2473
2474 void helper_msa_min_a_h(CPUMIPSState *env,
2475 uint32_t wd, uint32_t ws, uint32_t wt)
2476 {
2477 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2478 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2479 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2480
2481 pwd->h[0] = msa_min_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2482 pwd->h[1] = msa_min_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2483 pwd->h[2] = msa_min_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2484 pwd->h[3] = msa_min_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2485 pwd->h[4] = msa_min_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2486 pwd->h[5] = msa_min_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2487 pwd->h[6] = msa_min_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2488 pwd->h[7] = msa_min_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2489 }
2490
2491 void helper_msa_min_a_w(CPUMIPSState *env,
2492 uint32_t wd, uint32_t ws, uint32_t wt)
2493 {
2494 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2495 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2496 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2497
2498 pwd->w[0] = msa_min_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2499 pwd->w[1] = msa_min_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2500 pwd->w[2] = msa_min_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2501 pwd->w[3] = msa_min_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2502 }
2503
2504 void helper_msa_min_a_d(CPUMIPSState *env,
2505 uint32_t wd, uint32_t ws, uint32_t wt)
2506 {
2507 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2508 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2509 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2510
2511 pwd->d[0] = msa_min_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2512 pwd->d[1] = msa_min_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2513 }
2514
2515
2516 static inline int64_t msa_min_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2517 {
2518 return arg1 < arg2 ? arg1 : arg2;
2519 }
2520
2521 void helper_msa_min_s_b(CPUMIPSState *env,
2522 uint32_t wd, uint32_t ws, uint32_t wt)
2523 {
2524 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2525 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2526 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2527
2528 pwd->b[0] = msa_min_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2529 pwd->b[1] = msa_min_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2530 pwd->b[2] = msa_min_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2531 pwd->b[3] = msa_min_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2532 pwd->b[4] = msa_min_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2533 pwd->b[5] = msa_min_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2534 pwd->b[6] = msa_min_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2535 pwd->b[7] = msa_min_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2536 pwd->b[8] = msa_min_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2537 pwd->b[9] = msa_min_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2538 pwd->b[10] = msa_min_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2539 pwd->b[11] = msa_min_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2540 pwd->b[12] = msa_min_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2541 pwd->b[13] = msa_min_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2542 pwd->b[14] = msa_min_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2543 pwd->b[15] = msa_min_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2544 }
2545
2546 void helper_msa_min_s_h(CPUMIPSState *env,
2547 uint32_t wd, uint32_t ws, uint32_t wt)
2548 {
2549 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2550 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2551 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2552
2553 pwd->h[0] = msa_min_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2554 pwd->h[1] = msa_min_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2555 pwd->h[2] = msa_min_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2556 pwd->h[3] = msa_min_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2557 pwd->h[4] = msa_min_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2558 pwd->h[5] = msa_min_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2559 pwd->h[6] = msa_min_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2560 pwd->h[7] = msa_min_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2561 }
2562
2563 void helper_msa_min_s_w(CPUMIPSState *env,
2564 uint32_t wd, uint32_t ws, uint32_t wt)
2565 {
2566 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2567 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2568 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2569
2570 pwd->w[0] = msa_min_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2571 pwd->w[1] = msa_min_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2572 pwd->w[2] = msa_min_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2573 pwd->w[3] = msa_min_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2574 }
2575
2576 void helper_msa_min_s_d(CPUMIPSState *env,
2577 uint32_t wd, uint32_t ws, uint32_t wt)
2578 {
2579 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2580 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2581 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2582
2583 pwd->d[0] = msa_min_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2584 pwd->d[1] = msa_min_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2585 }
2586
2587
2588 static inline int64_t msa_min_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2589 {
2590 uint64_t u_arg1 = UNSIGNED(arg1, df);
2591 uint64_t u_arg2 = UNSIGNED(arg2, df);
2592 return u_arg1 < u_arg2 ? arg1 : arg2;
2593 }
2594
2595 void helper_msa_min_u_b(CPUMIPSState *env,
2596 uint32_t wd, uint32_t ws, uint32_t wt)
2597 {
2598 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2599 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2600 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2601
2602 pwd->b[0] = msa_min_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2603 pwd->b[1] = msa_min_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2604 pwd->b[2] = msa_min_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2605 pwd->b[3] = msa_min_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2606 pwd->b[4] = msa_min_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2607 pwd->b[5] = msa_min_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2608 pwd->b[6] = msa_min_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2609 pwd->b[7] = msa_min_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2610 pwd->b[8] = msa_min_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2611 pwd->b[9] = msa_min_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2612 pwd->b[10] = msa_min_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2613 pwd->b[11] = msa_min_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2614 pwd->b[12] = msa_min_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2615 pwd->b[13] = msa_min_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2616 pwd->b[14] = msa_min_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2617 pwd->b[15] = msa_min_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2618 }
2619
2620 void helper_msa_min_u_h(CPUMIPSState *env,
2621 uint32_t wd, uint32_t ws, uint32_t wt)
2622 {
2623 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2624 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2625 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2626
2627 pwd->h[0] = msa_min_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2628 pwd->h[1] = msa_min_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2629 pwd->h[2] = msa_min_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2630 pwd->h[3] = msa_min_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2631 pwd->h[4] = msa_min_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2632 pwd->h[5] = msa_min_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2633 pwd->h[6] = msa_min_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2634 pwd->h[7] = msa_min_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2635 }
2636
2637 void helper_msa_min_u_w(CPUMIPSState *env,
2638 uint32_t wd, uint32_t ws, uint32_t wt)
2639 {
2640 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2641 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2642 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2643
2644 pwd->w[0] = msa_min_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2645 pwd->w[1] = msa_min_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2646 pwd->w[2] = msa_min_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2647 pwd->w[3] = msa_min_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2648 }
2649
2650 void helper_msa_min_u_d(CPUMIPSState *env,
2651 uint32_t wd, uint32_t ws, uint32_t wt)
2652 {
2653 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2654 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2655 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2656
2657 pwd->d[0] = msa_min_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2658 pwd->d[1] = msa_min_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2659 }
2660
2661
2662 /*
2663 * Int Modulo
2664 * ----------
2665 *
2666 * +---------------+----------------------------------------------------------+
2667 * | MOD_S.B | Vector Signed Modulo (byte) |
2668 * | MOD_S.H | Vector Signed Modulo (halfword) |
2669 * | MOD_S.W | Vector Signed Modulo (word) |
2670 * | MOD_S.D | Vector Signed Modulo (doubleword) |
2671 * | MOD_U.B | Vector Unsigned Modulo (byte) |
2672 * | MOD_U.H | Vector Unsigned Modulo (halfword) |
2673 * | MOD_U.W | Vector Unsigned Modulo (word) |
2674 * | MOD_U.D | Vector Unsigned Modulo (doubleword) |
2675 * +---------------+----------------------------------------------------------+
2676 */
2677
2678 static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2679 {
2680 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
2681 return 0;
2682 }
2683 return arg2 ? arg1 % arg2 : arg1;
2684 }
2685
2686 void helper_msa_mod_s_b(CPUMIPSState *env,
2687 uint32_t wd, uint32_t ws, uint32_t wt)
2688 {
2689 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2690 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2691 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2692
2693 pwd->b[0] = msa_mod_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2694 pwd->b[1] = msa_mod_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2695 pwd->b[2] = msa_mod_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2696 pwd->b[3] = msa_mod_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2697 pwd->b[4] = msa_mod_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2698 pwd->b[5] = msa_mod_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2699 pwd->b[6] = msa_mod_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2700 pwd->b[7] = msa_mod_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2701 pwd->b[8] = msa_mod_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2702 pwd->b[9] = msa_mod_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2703 pwd->b[10] = msa_mod_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2704 pwd->b[11] = msa_mod_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2705 pwd->b[12] = msa_mod_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2706 pwd->b[13] = msa_mod_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2707 pwd->b[14] = msa_mod_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2708 pwd->b[15] = msa_mod_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2709 }
2710
2711 void helper_msa_mod_s_h(CPUMIPSState *env,
2712 uint32_t wd, uint32_t ws, uint32_t wt)
2713 {
2714 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2715 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2716 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2717
2718 pwd->h[0] = msa_mod_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2719 pwd->h[1] = msa_mod_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2720 pwd->h[2] = msa_mod_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2721 pwd->h[3] = msa_mod_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2722 pwd->h[4] = msa_mod_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2723 pwd->h[5] = msa_mod_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2724 pwd->h[6] = msa_mod_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2725 pwd->h[7] = msa_mod_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2726 }
2727
2728 void helper_msa_mod_s_w(CPUMIPSState *env,
2729 uint32_t wd, uint32_t ws, uint32_t wt)
2730 {
2731 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2732 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2733 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2734
2735 pwd->w[0] = msa_mod_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2736 pwd->w[1] = msa_mod_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2737 pwd->w[2] = msa_mod_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2738 pwd->w[3] = msa_mod_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2739 }
2740
2741 void helper_msa_mod_s_d(CPUMIPSState *env,
2742 uint32_t wd, uint32_t ws, uint32_t wt)
2743 {
2744 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2745 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2746 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2747
2748 pwd->d[0] = msa_mod_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2749 pwd->d[1] = msa_mod_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2750 }
2751
2752 static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2753 {
2754 uint64_t u_arg1 = UNSIGNED(arg1, df);
2755 uint64_t u_arg2 = UNSIGNED(arg2, df);
2756 return u_arg2 ? u_arg1 % u_arg2 : u_arg1;
2757 }
2758
2759 void helper_msa_mod_u_b(CPUMIPSState *env,
2760 uint32_t wd, uint32_t ws, uint32_t wt)
2761 {
2762 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2763 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2764 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2765
2766 pwd->b[0] = msa_mod_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2767 pwd->b[1] = msa_mod_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2768 pwd->b[2] = msa_mod_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2769 pwd->b[3] = msa_mod_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2770 pwd->b[4] = msa_mod_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2771 pwd->b[5] = msa_mod_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2772 pwd->b[6] = msa_mod_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2773 pwd->b[7] = msa_mod_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2774 pwd->b[8] = msa_mod_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2775 pwd->b[9] = msa_mod_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2776 pwd->b[10] = msa_mod_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2777 pwd->b[11] = msa_mod_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2778 pwd->b[12] = msa_mod_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2779 pwd->b[13] = msa_mod_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2780 pwd->b[14] = msa_mod_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2781 pwd->b[15] = msa_mod_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2782 }
2783
2784 void helper_msa_mod_u_h(CPUMIPSState *env,
2785 uint32_t wd, uint32_t ws, uint32_t wt)
2786 {
2787 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2788 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2789 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2790
2791 pwd->h[0] = msa_mod_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2792 pwd->h[1] = msa_mod_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2793 pwd->h[2] = msa_mod_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2794 pwd->h[3] = msa_mod_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2795 pwd->h[4] = msa_mod_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2796 pwd->h[5] = msa_mod_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2797 pwd->h[6] = msa_mod_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2798 pwd->h[7] = msa_mod_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2799 }
2800
2801 void helper_msa_mod_u_w(CPUMIPSState *env,
2802 uint32_t wd, uint32_t ws, uint32_t wt)
2803 {
2804 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2805 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2806 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2807
2808 pwd->w[0] = msa_mod_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2809 pwd->w[1] = msa_mod_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2810 pwd->w[2] = msa_mod_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2811 pwd->w[3] = msa_mod_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2812 }
2813
2814 void helper_msa_mod_u_d(CPUMIPSState *env,
2815 uint32_t wd, uint32_t ws, uint32_t wt)
2816 {
2817 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2818 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2819 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2820
2821 pwd->d[0] = msa_mod_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2822 pwd->d[1] = msa_mod_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2823 }
2824
2825
2826 /*
2827 * Int Multiply
2828 * ------------
2829 *
2830 * +---------------+----------------------------------------------------------+
2831 * | MADDV.B | Vector Multiply and Add (byte) |
2832 * | MADDV.H | Vector Multiply and Add (halfword) |
2833 * | MADDV.W | Vector Multiply and Add (word) |
2834 * | MADDV.D | Vector Multiply and Add (doubleword) |
2835 * | MSUBV.B | Vector Multiply and Subtract (byte) |
2836 * | MSUBV.H | Vector Multiply and Subtract (halfword) |
2837 * | MSUBV.W | Vector Multiply and Subtract (word) |
2838 * | MSUBV.D | Vector Multiply and Subtract (doubleword) |
2839 * | MULV.B | Vector Multiply (byte) |
2840 * | MULV.H | Vector Multiply (halfword) |
2841 * | MULV.W | Vector Multiply (word) |
2842 * | MULV.D | Vector Multiply (doubleword) |
2843 * +---------------+----------------------------------------------------------+
2844 */
2845
2846 /* TODO: insert Int Multiply group helpers here */
2847
2848
2849 /*
2850 * Int Subtract
2851 * ------------
2852 *
2853 * +---------------+----------------------------------------------------------+
2854 * | ASUB_S.B | Vector Absolute Values of Signed Subtract (byte) |
2855 * | ASUB_S.H | Vector Absolute Values of Signed Subtract (halfword) |
2856 * | ASUB_S.W | Vector Absolute Values of Signed Subtract (word) |
2857 * | ASUB_S.D | Vector Absolute Values of Signed Subtract (doubleword) |
2858 * | ASUB_U.B | Vector Absolute Values of Unsigned Subtract (byte) |
2859 * | ASUB_U.H | Vector Absolute Values of Unsigned Subtract (halfword) |
2860 * | ASUB_U.W | Vector Absolute Values of Unsigned Subtract (word) |
2861 * | ASUB_U.D | Vector Absolute Values of Unsigned Subtract (doubleword) |
2862 * | HSUB_S.H | Vector Signed Horizontal Subtract (halfword) |
2863 * | HSUB_S.W | Vector Signed Horizontal Subtract (word) |
2864 * | HSUB_S.D | Vector Signed Horizontal Subtract (doubleword) |
2865 * | HSUB_U.H | Vector Unigned Horizontal Subtract (halfword) |
2866 * | HSUB_U.W | Vector Unigned Horizontal Subtract (word) |
2867 * | HSUB_U.D | Vector Unigned Horizontal Subtract (doubleword) |
2868 * | SUBS_S.B | Vector Signed Saturated Subtract (of Signed) (byte) |
2869 * | SUBS_S.H | Vector Signed Saturated Subtract (of Signed) (halfword) |
2870 * | SUBS_S.W | Vector Signed Saturated Subtract (of Signed) (word) |
2871 * | SUBS_S.D | Vector Signed Saturated Subtract (of Signed) (doubleword)|
2872 * | SUBS_U.B | Vector Unsigned Saturated Subtract (of Uns.) (byte) |
2873 * | SUBS_U.H | Vector Unsigned Saturated Subtract (of Uns.) (halfword) |
2874 * | SUBS_U.W | Vector Unsigned Saturated Subtract (of Uns.) (word) |
2875 * | SUBS_U.D | Vector Unsigned Saturated Subtract (of Uns.) (doubleword)|
2876 * | SUBSUS_U.B | Vector Uns. Sat. Subtract (of S. from Uns.) (byte) |
2877 * | SUBSUS_U.H | Vector Uns. Sat. Subtract (of S. from Uns.) (halfword) |
2878 * | SUBSUS_U.W | Vector Uns. Sat. Subtract (of S. from Uns.) (word) |
2879 * | SUBSUS_U.D | Vector Uns. Sat. Subtract (of S. from Uns.) (doubleword) |
2880 * | SUBSUU_S.B | Vector Signed Saturated Subtract (of Uns.) (byte) |
2881 * | SUBSUU_S.H | Vector Signed Saturated Subtract (of Uns.) (halfword) |
2882 * | SUBSUU_S.W | Vector Signed Saturated Subtract (of Uns.) (word) |
2883 * | SUBSUU_S.D | Vector Signed Saturated Subtract (of Uns.) (doubleword) |
2884 * | SUBV.B | Vector Subtract (byte) |
2885 * | SUBV.H | Vector Subtract (halfword) |
2886 * | SUBV.W | Vector Subtract (word) |
2887 * | SUBV.D | Vector Subtract (doubleword) |
2888 * +---------------+----------------------------------------------------------+
2889 */
2890
2891
2892 static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2893 {
2894 /* signed compare */
2895 return (arg1 < arg2) ?
2896 (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
2897 }
2898
2899 void helper_msa_asub_s_b(CPUMIPSState *env,
2900 uint32_t wd, uint32_t ws, uint32_t wt)
2901 {
2902 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2903 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2904 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2905
2906 pwd->b[0] = msa_asub_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2907 pwd->b[1] = msa_asub_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2908 pwd->b[2] = msa_asub_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2909 pwd->b[3] = msa_asub_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2910 pwd->b[4] = msa_asub_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2911 pwd->b[5] = msa_asub_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2912 pwd->b[6] = msa_asub_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2913 pwd->b[7] = msa_asub_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2914 pwd->b[8] = msa_asub_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2915 pwd->b[9] = msa_asub_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2916 pwd->b[10] = msa_asub_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2917 pwd->b[11] = msa_asub_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2918 pwd->b[12] = msa_asub_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2919 pwd->b[13] = msa_asub_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2920 pwd->b[14] = msa_asub_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2921 pwd->b[15] = msa_asub_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2922 }
2923
2924 void helper_msa_asub_s_h(CPUMIPSState *env,
2925 uint32_t wd, uint32_t ws, uint32_t wt)
2926 {
2927 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2928 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2929 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2930
2931 pwd->h[0] = msa_asub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2932 pwd->h[1] = msa_asub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2933 pwd->h[2] = msa_asub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2934 pwd->h[3] = msa_asub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2935 pwd->h[4] = msa_asub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2936 pwd->h[5] = msa_asub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2937 pwd->h[6] = msa_asub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2938 pwd->h[7] = msa_asub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2939 }
2940
2941 void helper_msa_asub_s_w(CPUMIPSState *env,
2942 uint32_t wd, uint32_t ws, uint32_t wt)
2943 {
2944 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2945 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2946 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2947
2948 pwd->w[0] = msa_asub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2949 pwd->w[1] = msa_asub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2950 pwd->w[2] = msa_asub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2951 pwd->w[3] = msa_asub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2952 }
2953
2954 void helper_msa_asub_s_d(CPUMIPSState *env,
2955 uint32_t wd, uint32_t ws, uint32_t wt)
2956 {
2957 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2958 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2959 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2960
2961 pwd->d[0] = msa_asub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2962 pwd->d[1] = msa_asub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2963 }
2964
2965
2966 static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
2967 {
2968 uint64_t u_arg1 = UNSIGNED(arg1, df);
2969 uint64_t u_arg2 = UNSIGNED(arg2, df);
2970 /* unsigned compare */
2971 return (u_arg1 < u_arg2) ?
2972 (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
2973 }
2974
2975 void helper_msa_asub_u_b(CPUMIPSState *env,
2976 uint32_t wd, uint32_t ws, uint32_t wt)
2977 {
2978 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2979 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2980 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2981
2982 pwd->b[0] = msa_asub_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2983 pwd->b[1] = msa_asub_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2984 pwd->b[2] = msa_asub_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2985 pwd->b[3] = msa_asub_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2986 pwd->b[4] = msa_asub_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2987 pwd->b[5] = msa_asub_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2988 pwd->b[6] = msa_asub_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2989 pwd->b[7] = msa_asub_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2990 pwd->b[8] = msa_asub_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2991 pwd->b[9] = msa_asub_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2992 pwd->b[10] = msa_asub_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2993 pwd->b[11] = msa_asub_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2994 pwd->b[12] = msa_asub_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2995 pwd->b[13] = msa_asub_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2996 pwd->b[14] = msa_asub_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2997 pwd->b[15] = msa_asub_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2998 }
2999
3000 void helper_msa_asub_u_h(CPUMIPSState *env,
3001 uint32_t wd, uint32_t ws, uint32_t wt)
3002 {
3003 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3004 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3005 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3006
3007 pwd->h[0] = msa_asub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3008 pwd->h[1] = msa_asub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3009 pwd->h[2] = msa_asub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3010 pwd->h[3] = msa_asub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3011 pwd->h[4] = msa_asub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3012 pwd->h[5] = msa_asub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3013 pwd->h[6] = msa_asub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3014 pwd->h[7] = msa_asub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3015 }
3016
3017 void helper_msa_asub_u_w(CPUMIPSState *env,
3018 uint32_t wd, uint32_t ws, uint32_t wt)
3019 {
3020 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3021 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3022 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3023
3024 pwd->w[0] = msa_asub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3025 pwd->w[1] = msa_asub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3026 pwd->w[2] = msa_asub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3027 pwd->w[3] = msa_asub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3028 }
3029
3030 void helper_msa_asub_u_d(CPUMIPSState *env,
3031 uint32_t wd, uint32_t ws, uint32_t wt)
3032 {
3033 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3034 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3035 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3036
3037 pwd->d[0] = msa_asub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3038 pwd->d[1] = msa_asub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3039 }
3040
3041
3042 /* TODO: insert the rest of Int Subtract group helpers here */
3043
3044
3045 static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3046 {
3047 return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
3048 }
3049
3050 void helper_msa_hsub_s_h(CPUMIPSState *env,
3051 uint32_t wd, uint32_t ws, uint32_t wt)
3052 {
3053 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3054 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3055 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3056
3057 pwd->h[0] = msa_hsub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3058 pwd->h[1] = msa_hsub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3059 pwd->h[2] = msa_hsub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3060 pwd->h[3] = msa_hsub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3061 pwd->h[4] = msa_hsub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3062 pwd->h[5] = msa_hsub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3063 pwd->h[6] = msa_hsub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3064 pwd->h[7] = msa_hsub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3065 }
3066
3067 void helper_msa_hsub_s_w(CPUMIPSState *env,
3068 uint32_t wd, uint32_t ws, uint32_t wt)
3069 {
3070 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3071 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3072 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3073
3074 pwd->w[0] = msa_hsub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3075 pwd->w[1] = msa_hsub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3076 pwd->w[2] = msa_hsub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3077 pwd->w[3] = msa_hsub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3078 }
3079
3080 void helper_msa_hsub_s_d(CPUMIPSState *env,
3081 uint32_t wd, uint32_t ws, uint32_t wt)
3082 {
3083 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3084 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3085 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3086
3087 pwd->d[0] = msa_hsub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3088 pwd->d[1] = msa_hsub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3089 }
3090
3091
3092 static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3093 {
3094 return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
3095 }
3096
3097 void helper_msa_hsub_u_h(CPUMIPSState *env,
3098 uint32_t wd, uint32_t ws, uint32_t wt)
3099 {
3100 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3101 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3102 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3103
3104 pwd->h[0] = msa_hsub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3105 pwd->h[1] = msa_hsub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3106 pwd->h[2] = msa_hsub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3107 pwd->h[3] = msa_hsub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3108 pwd->h[4] = msa_hsub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3109 pwd->h[5] = msa_hsub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3110 pwd->h[6] = msa_hsub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3111 pwd->h[7] = msa_hsub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3112 }
3113
3114 void helper_msa_hsub_u_w(CPUMIPSState *env,
3115 uint32_t wd, uint32_t ws, uint32_t wt)
3116 {
3117 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3118 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3119 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3120
3121 pwd->w[0] = msa_hsub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3122 pwd->w[1] = msa_hsub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3123 pwd->w[2] = msa_hsub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3124 pwd->w[3] = msa_hsub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3125 }
3126
3127 void helper_msa_hsub_u_d(CPUMIPSState *env,
3128 uint32_t wd, uint32_t ws, uint32_t wt)
3129 {
3130 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3131 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3132 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3133
3134 pwd->d[0] = msa_hsub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3135 pwd->d[1] = msa_hsub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3136 }
3137
3138
3139 /*
3140 * Interleave
3141 * ----------
3142 *
3143 * +---------------+----------------------------------------------------------+
3144 * | ILVEV.B | Vector Interleave Even (byte) |
3145 * | ILVEV.H | Vector Interleave Even (halfword) |
3146 * | ILVEV.W | Vector Interleave Even (word) |
3147 * | ILVEV.D | Vector Interleave Even (doubleword) |
3148 * | ILVOD.B | Vector Interleave Odd (byte) |
3149 * | ILVOD.H | Vector Interleave Odd (halfword) |
3150 * | ILVOD.W | Vector Interleave Odd (word) |
3151 * | ILVOD.D | Vector Interleave Odd (doubleword) |
3152 * | ILVL.B | Vector Interleave Left (byte) |
3153 * | ILVL.H | Vector Interleave Left (halfword) |
3154 * | ILVL.W | Vector Interleave Left (word) |
3155 * | ILVL.D | Vector Interleave Left (doubleword) |
3156 * | ILVR.B | Vector Interleave Right (byte) |
3157 * | ILVR.H | Vector Interleave Right (halfword) |
3158 * | ILVR.W | Vector Interleave Right (word) |
3159 * | ILVR.D | Vector Interleave Right (doubleword) |
3160 * +---------------+----------------------------------------------------------+
3161 */
3162
3163
3164 void helper_msa_ilvev_b(CPUMIPSState *env,
3165 uint32_t wd, uint32_t ws, uint32_t wt)
3166 {
3167 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3168 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3169 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3170
3171 #if defined(HOST_WORDS_BIGENDIAN)
3172 pwd->b[8] = pws->b[9];
3173 pwd->b[9] = pwt->b[9];
3174 pwd->b[10] = pws->b[11];
3175 pwd->b[11] = pwt->b[11];
3176 pwd->b[12] = pws->b[13];
3177 pwd->b[13] = pwt->b[13];
3178 pwd->b[14] = pws->b[15];
3179 pwd->b[15] = pwt->b[15];
3180 pwd->b[0] = pws->b[1];
3181 pwd->b[1] = pwt->b[1];
3182 pwd->b[2] = pws->b[3];
3183 pwd->b[3] = pwt->b[3];
3184 pwd->b[4] = pws->b[5];
3185 pwd->b[5] = pwt->b[5];
3186 pwd->b[6] = pws->b[7];
3187 pwd->b[7] = pwt->b[7];
3188 #else
3189 pwd->b[15] = pws->b[14];
3190 pwd->b[14] = pwt->b[14];
3191 pwd->b[13] = pws->b[12];
3192 pwd->b[12] = pwt->b[12];
3193 pwd->b[11] = pws->b[10];
3194 pwd->b[10] = pwt->b[10];
3195 pwd->b[9] = pws->b[8];
3196 pwd->b[8] = pwt->b[8];
3197 pwd->b[7] = pws->b[6];
3198 pwd->b[6] = pwt->b[6];
3199 pwd->b[5] = pws->b[4];
3200 pwd->b[4] = pwt->b[4];
3201 pwd->b[3] = pws->b[2];
3202 pwd->b[2] = pwt->b[2];
3203 pwd->b[1] = pws->b[0];
3204 pwd->b[0] = pwt->b[0];
3205 #endif
3206 }
3207
3208 void helper_msa_ilvev_h(CPUMIPSState *env,
3209 uint32_t wd, uint32_t ws, uint32_t wt)
3210 {
3211 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3212 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3213 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3214
3215 #if defined(HOST_WORDS_BIGENDIAN)
3216 pwd->h[4] = pws->h[5];
3217 pwd->h[5] = pwt->h[5];
3218 pwd->h[6] = pws->h[7];
3219 pwd->h[7] = pwt->h[7];
3220 pwd->h[0] = pws->h[1];
3221 pwd->h[1] = pwt->h[1];
3222 pwd->h[2] = pws->h[3];
3223 pwd->h[3] = pwt->h[3];
3224 #else
3225 pwd->h[7] = pws->h[6];
3226 pwd->h[6] = pwt->h[6];
3227 pwd->h[5] = pws->h[4];
3228 pwd->h[4] = pwt->h[4];
3229 pwd->h[3] = pws->h[2];
3230 pwd->h[2] = pwt->h[2];
3231 pwd->h[1] = pws->h[0];
3232 pwd->h[0] = pwt->h[0];
3233 #endif
3234 }
3235
3236 void helper_msa_ilvev_w(CPUMIPSState *env,
3237 uint32_t wd, uint32_t ws, uint32_t wt)
3238 {
3239 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3240 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3241 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3242
3243 #if defined(HOST_WORDS_BIGENDIAN)
3244 pwd->w[2] = pws->w[3];
3245 pwd->w[3] = pwt->w[3];
3246 pwd->w[0] = pws->w[1];
3247 pwd->w[1] = pwt->w[1];
3248 #else
3249 pwd->w[3] = pws->w[2];
3250 pwd->w[2] = pwt->w[2];
3251 pwd->w[1] = pws->w[0];
3252 pwd->w[0] = pwt->w[0];
3253 #endif
3254 }
3255
3256 void helper_msa_ilvev_d(CPUMIPSState *env,
3257 uint32_t wd, uint32_t ws, uint32_t wt)
3258 {
3259 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3260 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3261 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3262
3263 pwd->d[1] = pws->d[0];
3264 pwd->d[0] = pwt->d[0];
3265 }
3266
3267
3268 void helper_msa_ilvod_b(CPUMIPSState *env,
3269 uint32_t wd, uint32_t ws, uint32_t wt)
3270 {
3271 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3272 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3273 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3274
3275 #if defined(HOST_WORDS_BIGENDIAN)
3276 pwd->b[7] = pwt->b[6];
3277 pwd->b[6] = pws->b[6];
3278 pwd->b[5] = pwt->b[4];
3279 pwd->b[4] = pws->b[4];
3280 pwd->b[3] = pwt->b[2];
3281 pwd->b[2] = pws->b[2];
3282 pwd->b[1] = pwt->b[0];
3283 pwd->b[0] = pws->b[0];
3284 pwd->b[15] = pwt->b[14];
3285 pwd->b[14] = pws->b[14];
3286 pwd->b[13] = pwt->b[12];
3287 pwd->b[12] = pws->b[12];
3288 pwd->b[11] = pwt->b[10];
3289 pwd->b[10] = pws->b[10];
3290 pwd->b[9] = pwt->b[8];
3291 pwd->b[8] = pws->b[8];
3292 #else
3293 pwd->b[0] = pwt->b[1];
3294 pwd->b[1] = pws->b[1];
3295 pwd->b[2] = pwt->b[3];
3296 pwd->b[3] = pws->b[3];
3297 pwd->b[4] = pwt->b[5];
3298 pwd->b[5] = pws->b[5];
3299 pwd->b[6] = pwt->b[7];
3300 pwd->b[7] = pws->b[7];
3301 pwd->b[8] = pwt->b[9];
3302 pwd->b[9] = pws->b[9];
3303 pwd->b[10] = pwt->b[11];
3304 pwd->b[11] = pws->b[11];
3305 pwd->b[12] = pwt->b[13];
3306 pwd->b[13] = pws->b[13];
3307 pwd->b[14] = pwt->b[15];
3308 pwd->b[15] = pws->b[15];
3309 #endif
3310 }
3311
3312 void helper_msa_ilvod_h(CPUMIPSState *env,
3313 uint32_t wd, uint32_t ws, uint32_t wt)
3314 {
3315 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3316 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3317 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3318
3319 #if defined(HOST_WORDS_BIGENDIAN)
3320 pwd->h[3] = pwt->h[2];
3321 pwd->h[2] = pws->h[2];
3322 pwd->h[1] = pwt->h[0];
3323 pwd->h[0] = pws->h[0];
3324 pwd->h[7] = pwt->h[6];
3325 pwd->h[6] = pws->h[6];
3326 pwd->h[5] = pwt->h[4];
3327 pwd->h[4] = pws->h[4];
3328 #else
3329 pwd->h[0] = pwt->h[1];
3330 pwd->h[1] = pws->h[1];
3331 pwd->h[2] = pwt->h[3];
3332 pwd->h[3] = pws->h[3];
3333 pwd->h[4] = pwt->h[5];
3334 pwd->h[5] = pws->h[5];
3335 pwd->h[6] = pwt->h[7];
3336 pwd->h[7] = pws->h[7];
3337 #endif
3338 }
3339
3340 void helper_msa_ilvod_w(CPUMIPSState *env,
3341 uint32_t wd, uint32_t ws, uint32_t wt)
3342 {
3343 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3344 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3345 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3346
3347 #if defined(HOST_WORDS_BIGENDIAN)
3348 pwd->w[1] = pwt->w[0];
3349 pwd->w[0] = pws->w[0];
3350 pwd->w[3] = pwt->w[2];
3351 pwd->w[2] = pws->w[2];
3352 #else
3353 pwd->w[0] = pwt->w[1];
3354 pwd->w[1] = pws->w[1];
3355 pwd->w[2] = pwt->w[3];
3356 pwd->w[3] = pws->w[3];
3357 #endif
3358 }
3359
3360 void helper_msa_ilvod_d(CPUMIPSState *env,
3361 uint32_t wd, uint32_t ws, uint32_t wt)
3362 {
3363 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3364 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3365 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3366
3367 pwd->d[0] = pwt->d[1];
3368 pwd->d[1] = pws->d[1];
3369 }
3370
3371
3372 void helper_msa_ilvl_b(CPUMIPSState *env,
3373 uint32_t wd, uint32_t ws, uint32_t wt)
3374 {
3375 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3376 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3377 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3378
3379 #if defined(HOST_WORDS_BIGENDIAN)
3380 pwd->b[7] = pwt->b[15];
3381 pwd->b[6] = pws->b[15];
3382 pwd->b[5] = pwt->b[14];
3383 pwd->b[4] = pws->b[14];
3384 pwd->b[3] = pwt->b[13];
3385 pwd->b[2] = pws->b[13];
3386 pwd->b[1] = pwt->b[12];
3387 pwd->b[0] = pws->b[12];
3388 pwd->b[15] = pwt->b[11];
3389 pwd->b[14] = pws->b[11];
3390 pwd->b[13] = pwt->b[10];
3391 pwd->b[12] = pws->b[10];
3392 pwd->b[11] = pwt->b[9];
3393 pwd->b[10] = pws->b[9];
3394 pwd->b[9] = pwt->b[8];
3395 pwd->b[8] = pws->b[8];
3396 #else
3397 pwd->b[0] = pwt->b[8];
3398 pwd->b[1] = pws->b[8];
3399 pwd->b[2] = pwt->b[9];
3400 pwd->b[3] = pws->b[9];
3401 pwd->b[4] = pwt->b[10];
3402 pwd->b[5] = pws->b[10];
3403 pwd->b[6] = pwt->b[11];
3404 pwd->b[7] = pws->b[11];
3405 pwd->b[8] = pwt->b[12];
3406 pwd->b[9] = pws->b[12];
3407 pwd->b[10] = pwt->b[13];
3408 pwd->b[11] = pws->b[13];
3409 pwd->b[12] = pwt->b[14];
3410 pwd->b[13] = pws->b[14];
3411 pwd->b[14] = pwt->b[15];
3412 pwd->b[15] = pws->b[15];
3413 #endif
3414 }
3415
3416 void helper_msa_ilvl_h(CPUMIPSState *env,
3417 uint32_t wd, uint32_t ws, uint32_t wt)
3418 {
3419 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3420 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3421 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3422
3423 #if defined(HOST_WORDS_BIGENDIAN)
3424 pwd->h[3] = pwt->h[7];
3425 pwd->h[2] = pws->h[7];
3426 pwd->h[1] = pwt->h[6];
3427 pwd->h[0] = pws->h[6];
3428 pwd->h[7] = pwt->h[5];
3429 pwd->h[6] = pws->h[5];
3430 pwd->h[5] = pwt->h[4];
3431 pwd->h[4] = pws->h[4];
3432 #else
3433 pwd->h[0] = pwt->h[4];
3434 pwd->h[1] = pws->h[4];
3435 pwd->h[2] = pwt->h[5];
3436 pwd->h[3] = pws->h[5];
3437 pwd->h[4] = pwt->h[6];
3438 pwd->h[5] = pws->h[6];
3439 pwd->h[6] = pwt->h[7];
3440 pwd->h[7] = pws->h[7];
3441 #endif
3442 }
3443
3444 void helper_msa_ilvl_w(CPUMIPSState *env,
3445 uint32_t wd, uint32_t ws, uint32_t wt)
3446 {
3447 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3448 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3449 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3450
3451 #if defined(HOST_WORDS_BIGENDIAN)
3452 pwd->w[1] = pwt->w[3];
3453 pwd->w[0] = pws->w[3];
3454 pwd->w[3] = pwt->w[2];
3455 pwd->w[2] = pws->w[2];
3456 #else
3457 pwd->w[0] = pwt->w[2];
3458 pwd->w[1] = pws->w[2];
3459 pwd->w[2] = pwt->w[3];
3460 pwd->w[3] = pws->w[3];
3461 #endif
3462 }
3463
3464 void helper_msa_ilvl_d(CPUMIPSState *env,
3465 uint32_t wd, uint32_t ws, uint32_t wt)
3466 {
3467 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3468 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3469 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3470
3471 pwd->d[0] = pwt->d[1];
3472 pwd->d[1] = pws->d[1];
3473 }
3474
3475
3476 void helper_msa_ilvr_b(CPUMIPSState *env,
3477 uint32_t wd, uint32_t ws, uint32_t wt)
3478 {
3479 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3480 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3481 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3482
3483 #if defined(HOST_WORDS_BIGENDIAN)
3484 pwd->b[8] = pws->b[0];
3485 pwd->b[9] = pwt->b[0];
3486 pwd->b[10] = pws->b[1];
3487 pwd->b[11] = pwt->b[1];
3488 pwd->b[12] = pws->b[2];
3489 pwd->b[13] = pwt->b[2];
3490 pwd->b[14] = pws->b[3];
3491 pwd->b[15] = pwt->b[3];
3492 pwd->b[0] = pws->b[4];
3493 pwd->b[1] = pwt->b[4];
3494 pwd->b[2] = pws->b[5];
3495 pwd->b[3] = pwt->b[5];
3496 pwd->b[4] = pws->b[6];
3497 pwd->b[5] = pwt->b[6];
3498 pwd->b[6] = pws->b[7];
3499 pwd->b[7] = pwt->b[7];
3500 #else
3501 pwd->b[15] = pws->b[7];
3502 pwd->b[14] = pwt->b[7];
3503 pwd->b[13] = pws->b[6];
3504 pwd->b[12] = pwt->b[6];
3505 pwd->b[11] = pws->b[5];
3506 pwd->b[10] = pwt->b[5];
3507 pwd->b[9] = pws->b[4];
3508 pwd->b[8] = pwt->b[4];
3509 pwd->b[7] = pws->b[3];
3510 pwd->b[6] = pwt->b[3];
3511 pwd->b[5] = pws->b[2];
3512 pwd->b[4] = pwt->b[2];
3513 pwd->b[3] = pws->b[1];
3514 pwd->b[2] = pwt->b[1];
3515 pwd->b[1] = pws->b[0];
3516 pwd->b[0] = pwt->b[0];
3517 #endif
3518 }
3519
3520 void helper_msa_ilvr_h(CPUMIPSState *env,
3521 uint32_t wd, uint32_t ws, uint32_t wt)
3522 {
3523 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3524 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3525 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3526
3527 #if defined(HOST_WORDS_BIGENDIAN)
3528 pwd->h[4] = pws->h[0];
3529 pwd->h[5] = pwt->h[0];
3530 pwd->h[6] = pws->h[1];
3531 pwd->h[7] = pwt->h[1];
3532 pwd->h[0] = pws->h[2];
3533 pwd->h[1] = pwt->h[2];
3534 pwd->h[2] = pws->h[3];
3535 pwd->h[3] = pwt->h[3];
3536 #else
3537 pwd->h[7] = pws->h[3];
3538 pwd->h[6] = pwt->h[3];
3539 pwd->h[5] = pws->h[2];
3540 pwd->h[4] = pwt->h[2];
3541 pwd->h[3] = pws->h[1];
3542 pwd->h[2] = pwt->h[1];
3543 pwd->h[1] = pws->h[0];
3544 pwd->h[0] = pwt->h[0];
3545 #endif
3546 }
3547
3548 void helper_msa_ilvr_w(CPUMIPSState *env,
3549 uint32_t wd, uint32_t ws, uint32_t wt)
3550 {
3551 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3552 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3553 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3554
3555 #if defined(HOST_WORDS_BIGENDIAN)
3556 pwd->w[2] = pws->w[0];
3557 pwd->w[3] = pwt->w[0];
3558 pwd->w[0] = pws->w[1];
3559 pwd->w[1] = pwt->w[1];
3560 #else
3561 pwd->w[3] = pws->w[1];
3562 pwd->w[2] = pwt->w[1];
3563 pwd->w[1] = pws->w[0];
3564 pwd->w[0] = pwt->w[0];
3565 #endif
3566 }
3567
3568 void helper_msa_ilvr_d(CPUMIPSState *env,
3569 uint32_t wd, uint32_t ws, uint32_t wt)
3570 {
3571 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3572 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3573 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3574
3575 pwd->d[1] = pws->d[0];
3576 pwd->d[0] = pwt->d[0];
3577 }
3578
3579
3580 /*
3581 * Logic
3582 * -----
3583 *
3584 * +---------------+----------------------------------------------------------+
3585 * | AND.V | Vector Logical And |
3586 * | NOR.V | Vector Logical Negated Or |
3587 * | OR.V | Vector Logical Or |
3588 * | XOR.V | Vector Logical Exclusive Or |
3589 * +---------------+----------------------------------------------------------+
3590 */
3591
3592
3593 void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
3594 {
3595 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3596 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3597 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3598
3599 pwd->d[0] = pws->d[0] & pwt->d[0];
3600 pwd->d[1] = pws->d[1] & pwt->d[1];
3601 }
3602
3603 void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
3604 {
3605 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3606 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3607 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3608
3609 pwd->d[0] = ~(pws->d[0] | pwt->d[0]);
3610 pwd->d[1] = ~(pws->d[1] | pwt->d[1]);
3611 }
3612
3613 void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
3614 {
3615 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3616 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3617 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3618
3619 pwd->d[0] = pws->d[0] | pwt->d[0];
3620 pwd->d[1] = pws->d[1] | pwt->d[1];
3621 }
3622
3623 void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
3624 {
3625 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3626 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3627 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3628
3629 pwd->d[0] = pws->d[0] ^ pwt->d[0];
3630 pwd->d[1] = pws->d[1] ^ pwt->d[1];
3631 }
3632
3633
3634 /*
3635 * Move
3636 * ----
3637 *
3638 * +---------------+----------------------------------------------------------+
3639 * | MOVE.V | Vector Move |
3640 * +---------------+----------------------------------------------------------+
3641 */
3642
3643 static inline void msa_move_v(wr_t *pwd, wr_t *pws)
3644 {
3645 pwd->d[0] = pws->d[0];
3646 pwd->d[1] = pws->d[1];
3647 }
3648
3649 void helper_msa_move_v(CPUMIPSState *env, uint32_t wd, uint32_t ws)
3650 {
3651 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3652 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3653
3654 msa_move_v(pwd, pws);
3655 }
3656
3657
3658 /*
3659 * Pack
3660 * ----
3661 *
3662 * +---------------+----------------------------------------------------------+
3663 * | PCKEV.B | Vector Pack Even (byte) |
3664 * | PCKEV.H | Vector Pack Even (halfword) |
3665 * | PCKEV.W | Vector Pack Even (word) |
3666 * | PCKEV.D | Vector Pack Even (doubleword) |
3667 * | PCKOD.B | Vector Pack Odd (byte) |
3668 * | PCKOD.H | Vector Pack Odd (halfword) |
3669 * | PCKOD.W | Vector Pack Odd (word) |
3670 * | PCKOD.D | Vector Pack Odd (doubleword) |
3671 * | VSHF.B | Vector Data Preserving Shuffle (byte) |
3672 * | VSHF.H | Vector Data Preserving Shuffle (halfword) |
3673 * | VSHF.W | Vector Data Preserving Shuffle (word) |
3674 * | VSHF.D | Vector Data Preserving Shuffle (doubleword) |
3675 * +---------------+----------------------------------------------------------+
3676 */
3677
3678
3679 void helper_msa_pckev_b(CPUMIPSState *env,
3680 uint32_t wd, uint32_t ws, uint32_t wt)
3681 {
3682 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3683 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3684 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3685
3686 #if defined(HOST_WORDS_BIGENDIAN)
3687 pwd->b[8] = pws->b[9];
3688 pwd->b[10] = pws->b[13];
3689 pwd->b[12] = pws->b[1];
3690 pwd->b[14] = pws->b[5];
3691 pwd->b[0] = pwt->b[9];
3692 pwd->b[2] = pwt->b[13];
3693 pwd->b[4] = pwt->b[1];
3694 pwd->b[6] = pwt->b[5];
3695 pwd->b[9] = pws->b[11];
3696 pwd->b[13] = pws->b[3];
3697 pwd->b[1] = pwt->b[11];
3698 pwd->b[5] = pwt->b[3];
3699 pwd->b[11] = pws->b[15];
3700 pwd->b[3] = pwt->b[15];
3701 pwd->b[15] = pws->b[7];
3702 pwd->b[7] = pwt->b[7];
3703 #else
3704 pwd->b[15] = pws->b[14];
3705 pwd->b[13] = pws->b[10];
3706 pwd->b[11] = pws->b[6];
3707 pwd->b[9] = pws->b[2];
3708 pwd->b[7] = pwt->b[14];
3709 pwd->b[5] = pwt->b[10];
3710 pwd->b[3] = pwt->b[6];
3711 pwd->b[1] = pwt->b[2];
3712 pwd->b[14] = pws->b[12];
3713 pwd->b[10] = pws->b[4];
3714 pwd->b[6] = pwt->b[12];
3715 pwd->b[2] = pwt->b[4];
3716 pwd->b[12] = pws->b[8];
3717 pwd->b[4] = pwt->b[8];
3718 pwd->b[8] = pws->b[0];
3719 pwd->b[0] = pwt->b[0];
3720 #endif
3721 }
3722
3723 void helper_msa_pckev_h(CPUMIPSState *env,
3724 uint32_t wd, uint32_t ws, uint32_t wt)
3725 {
3726 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3727 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3728 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3729
3730 #if defined(HOST_WORDS_BIGENDIAN)
3731 pwd->h[4] = pws->h[5];
3732 pwd->h[6] = pws->h[1];
3733 pwd->h[0] = pwt->h[5];
3734 pwd->h[2] = pwt->h[1];
3735 pwd->h[5] = pws->h[7];
3736 pwd->h[1] = pwt->h[7];
3737 pwd->h[7] = pws->h[3];
3738 pwd->h[3] = pwt->h[3];
3739 #else
3740 pwd->h[7] = pws->h[6];
3741 pwd->h[5] = pws->h[2];
3742 pwd->h[3] = pwt->h[6];
3743 pwd->h[1] = pwt->h[2];
3744 pwd->h[6] = pws->h[4];
3745 pwd->h[2] = pwt->h[4];
3746 pwd->h[4] = pws->h[0];
3747 pwd->h[0] = pwt->h[0];
3748 #endif
3749 }
3750
3751 void helper_msa_pckev_w(CPUMIPSState *env,
3752 uint32_t wd, uint32_t ws, uint32_t wt)
3753 {
3754 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3755 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3756 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3757
3758 #if defined(HOST_WORDS_BIGENDIAN)
3759 pwd->w[2] = pws->w[3];
3760 pwd->w[0] = pwt->w[3];
3761 pwd->w[3] = pws->w[1];
3762 pwd->w[1] = pwt->w[1];
3763 #else
3764 pwd->w[3] = pws->w[2];
3765 pwd->w[1] = pwt->w[2];
3766 pwd->w[2] = pws->w[0];
3767 pwd->w[0] = pwt->w[0];
3768 #endif
3769 }
3770
3771 void helper_msa_pckev_d(CPUMIPSState *env,
3772 uint32_t wd, uint32_t ws, uint32_t wt)
3773 {
3774 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3775 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3776 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3777
3778 pwd->d[1] = pws->d[0];
3779 pwd->d[0] = pwt->d[0];
3780 }
3781
3782
3783 void helper_msa_pckod_b(CPUMIPSState *env,
3784 uint32_t wd, uint32_t ws, uint32_t wt)
3785 {
3786 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3787 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3788 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3789
3790 #if defined(HOST_WORDS_BIGENDIAN)
3791 pwd->b[7] = pwt->b[6];
3792 pwd->b[5] = pwt->b[2];
3793 pwd->b[3] = pwt->b[14];
3794 pwd->b[1] = pwt->b[10];
3795 pwd->b[15] = pws->b[6];
3796 pwd->b[13] = pws->b[2];
3797 pwd->b[11] = pws->b[14];
3798 pwd->b[9] = pws->b[10];
3799 pwd->b[6] = pwt->b[4];
3800 pwd->b[2] = pwt->b[12];
3801 pwd->b[14] = pws->b[4];
3802 pwd->b[10] = pws->b[12];
3803 pwd->b[4] = pwt->b[0];
3804 pwd->b[12] = pws->b[0];
3805 pwd->b[0] = pwt->b[8];
3806 pwd->b[8] = pws->b[8];
3807 #else
3808 pwd->b[0] = pwt->b[1];
3809 pwd->b[2] = pwt->b[5];
3810 pwd->b[4] = pwt->b[9];
3811 pwd->b[6] = pwt->b[13];
3812 pwd->b[8] = pws->b[1];
3813 pwd->b[10] = pws->b[5];
3814 pwd->b[12] = pws->b[9];
3815 pwd->b[14] = pws->b[13];
3816 pwd->b[1] = pwt->b[3];
3817 pwd->b[5] = pwt->b[11];
3818 pwd->b[9] = pws->b[3];
3819 pwd->b[13] = pws->b[11];
3820 pwd->b[3] = pwt->b[7];
3821 pwd->b[11] = pws->b[7];
3822 pwd->b[7] = pwt->b[15];
3823 pwd->b[15] = pws->b[15];
3824 #endif
3825
3826 }
3827
3828 void helper_msa_pckod_h(CPUMIPSState *env,
3829 uint32_t wd, uint32_t ws, uint32_t wt)
3830 {
3831 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3832 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3833 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3834
3835 #if defined(HOST_WORDS_BIGENDIAN)
3836 pwd->h[3] = pwt->h[2];
3837 pwd->h[1] = pwt->h[6];
3838 pwd->h[7] = pws->h[2];
3839 pwd->h[5] = pws->h[6];
3840 pwd->h[2] = pwt->h[0];
3841 pwd->h[6] = pws->h[0];
3842 pwd->h[0] = pwt->h[4];
3843 pwd->h[4] = pws->h[4];
3844 #else
3845 pwd->h[0] = pwt->h[1];
3846 pwd->h[2] = pwt->h[5];
3847 pwd->h[4] = pws->h[1];
3848 pwd->h[6] = pws->h[5];
3849 pwd->h[1] = pwt->h[3];
3850 pwd->h[5] = pws->h[3];
3851 pwd->h[3] = pwt->h[7];
3852 pwd->h[7] = pws->h[7];
3853 #endif
3854 }
3855
3856 void helper_msa_pckod_w(CPUMIPSState *env,
3857 uint32_t wd, uint32_t ws, uint32_t wt)
3858 {
3859 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3860 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3861 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3862
3863 #if defined(HOST_WORDS_BIGENDIAN)
3864 pwd->w[1] = pwt->w[0];
3865 pwd->w[3] = pws->w[0];
3866 pwd->w[0] = pwt->w[2];
3867 pwd->w[2] = pws->w[2];
3868 #else
3869 pwd->w[0] = pwt->w[1];
3870 pwd->w[2] = pws->w[1];
3871 pwd->w[1] = pwt->w[3];
3872 pwd->w[3] = pws->w[3];
3873 #endif
3874 }
3875
3876 void helper_msa_pckod_d(CPUMIPSState *env,
3877 uint32_t wd, uint32_t ws, uint32_t wt)
3878 {
3879 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3880 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3881 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3882
3883 pwd->d[0] = pwt->d[1];
3884 pwd->d[1] = pws->d[1];
3885 }
3886
3887
3888 /*
3889 * Shift
3890 * -----
3891 *
3892 * +---------------+----------------------------------------------------------+
3893 * | SLL.B | Vector Shift Left (byte) |
3894 * | SLL.H | Vector Shift Left (halfword) |
3895 * | SLL.W | Vector Shift Left (word) |
3896 * | SLL.D | Vector Shift Left (doubleword) |
3897 * | SRA.B | Vector Shift Right Arithmetic (byte) |
3898 * | SRA.H | Vector Shift Right Arithmetic (halfword) |
3899 * | SRA.W | Vector Shift Right Arithmetic (word) |
3900 * | SRA.D | Vector Shift Right Arithmetic (doubleword) |
3901 * | SRAR.B | Vector Shift Right Arithmetic Rounded (byte) |
3902 * | SRAR.H | Vector Shift Right Arithmetic Rounded (halfword) |
3903 * | SRAR.W | Vector Shift Right Arithmetic Rounded (word) |
3904 * | SRAR.D | Vector Shift Right Arithmetic Rounded (doubleword) |
3905 * | SRL.B | Vector Shift Right Logical (byte) |
3906 * | SRL.H | Vector Shift Right Logical (halfword) |
3907 * | SRL.W | Vector Shift Right Logical (word) |
3908 * | SRL.D | Vector Shift Right Logical (doubleword) |
3909 * | SRLR.B | Vector Shift Right Logical Rounded (byte) |
3910 * | SRLR.H | Vector Shift Right Logical Rounded (halfword) |
3911 * | SRLR.W | Vector Shift Right Logical Rounded (word) |
3912 * | SRLR.D | Vector Shift Right Logical Rounded (doubleword) |
3913 * +---------------+----------------------------------------------------------+
3914 */
3915
3916
3917 static inline int64_t msa_sll_df(uint32_t df, int64_t arg1, int64_t arg2)
3918 {
3919 int32_t b_arg2 = BIT_POSITION(arg2, df);
3920 return arg1 << b_arg2;
3921 }
3922
3923 void helper_msa_sll_b(CPUMIPSState *env,
3924 uint32_t wd, uint32_t ws, uint32_t wt)
3925 {
3926 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3927 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3928 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3929
3930 pwd->b[0] = msa_sll_df(DF_BYTE, pws->b[0], pwt->b[0]);
3931 pwd->b[1] = msa_sll_df(DF_BYTE, pws->b[1], pwt->b[1]);
3932 pwd->b[2] = msa_sll_df(DF_BYTE, pws->b[2], pwt->b[2]);
3933 pwd->b[3] = msa_sll_df(DF_BYTE, pws->b[3], pwt->b[3]);
3934 pwd->b[4] = msa_sll_df(DF_BYTE, pws->b[4], pwt->b[4]);
3935 pwd->b[5] = msa_sll_df(DF_BYTE, pws->b[5], pwt->b[5]);
3936 pwd->b[6] = msa_sll_df(DF_BYTE, pws->b[6], pwt->b[6]);
3937 pwd->b[7] = msa_sll_df(DF_BYTE, pws->b[7], pwt->b[7]);
3938 pwd->b[8] = msa_sll_df(DF_BYTE, pws->b[8], pwt->b[8]);
3939 pwd->b[9] = msa_sll_df(DF_BYTE, pws->b[9], pwt->b[9]);
3940 pwd->b[10] = msa_sll_df(DF_BYTE, pws->b[10], pwt->b[10]);
3941 pwd->b[11] = msa_sll_df(DF_BYTE, pws->b[11], pwt->b[11]);
3942 pwd->b[12] = msa_sll_df(DF_BYTE, pws->b[12], pwt->b[12]);
3943 pwd->b[13] = msa_sll_df(DF_BYTE, pws->b[13], pwt->b[13]);
3944 pwd->b[14] = msa_sll_df(DF_BYTE, pws->b[14], pwt->b[14]);
3945 pwd->b[15] = msa_sll_df(DF_BYTE, pws->b[15], pwt->b[15]);
3946 }
3947
3948 void helper_msa_sll_h(CPUMIPSState *env,
3949 uint32_t wd, uint32_t ws, uint32_t wt)
3950 {
3951 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3952 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3953 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3954
3955 pwd->h[0] = msa_sll_df(DF_HALF, pws->h[0], pwt->h[0]);
3956 pwd->h[1] = msa_sll_df(DF_HALF, pws->h[1], pwt->h[1]);
3957 pwd->h[2] = msa_sll_df(DF_HALF, pws->h[2], pwt->h[2]);
3958 pwd->h[3] = msa_sll_df(DF_HALF, pws->h[3], pwt->h[3]);
3959 pwd->h[4] = msa_sll_df(DF_HALF, pws->h[4], pwt->h[4]);
3960 pwd->h[5] = msa_sll_df(DF_HALF, pws->h[5], pwt->h[5]);
3961 pwd->h[6] = msa_sll_df(DF_HALF, pws->h[6], pwt->h[6]);
3962 pwd->h[7] = msa_sll_df(DF_HALF, pws->h[7], pwt->h[7]);
3963 }
3964
3965 void helper_msa_sll_w(CPUMIPSState *env,
3966 uint32_t wd, uint32_t ws, uint32_t wt)
3967 {
3968 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3969 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3970 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3971
3972 pwd->w[0] = msa_sll_df(DF_WORD, pws->w[0], pwt->w[0]);
3973 pwd->w[1] = msa_sll_df(DF_WORD, pws->w[1], pwt->w[1]);
3974 pwd->w[2] = msa_sll_df(DF_WORD, pws->w[2], pwt->w[2]);
3975 pwd->w[3] = msa_sll_df(DF_WORD, pws->w[3], pwt->w[3]);
3976 }
3977
3978 void helper_msa_sll_d(CPUMIPSState *env,
3979 uint32_t wd, uint32_t ws, uint32_t wt)
3980 {
3981 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3982 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3983 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3984
3985 pwd->d[0] = msa_sll_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3986 pwd->d[1] = msa_sll_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3987 }
3988
3989
3990 static inline int64_t msa_sra_df(uint32_t df, int64_t arg1, int64_t arg2)
3991 {
3992 int32_t b_arg2 = BIT_POSITION(arg2, df);
3993 return arg1 >> b_arg2;
3994 }
3995
3996 void helper_msa_sra_b(CPUMIPSState *env,
3997 uint32_t wd, uint32_t ws, uint32_t wt)
3998 {
3999 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4000 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4001 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4002
4003 pwd->b[0] = msa_sra_df(DF_BYTE, pws->b[0], pwt->b[0]);
4004 pwd->b[1] = msa_sra_df(DF_BYTE, pws->b[1], pwt->b[1]);
4005 pwd->b[2] = msa_sra_df(DF_BYTE, pws->b[2], pwt->b[2]);
4006 pwd->b[3] = msa_sra_df(DF_BYTE, pws->b[3], pwt->b[3]);
4007 pwd->b[4] = msa_sra_df(DF_BYTE, pws->b[4], pwt->b[4]);
4008 pwd->b[5] = msa_sra_df(DF_BYTE, pws->b[5], pwt->b[5]);
4009 pwd->b[6] = msa_sra_df(DF_BYTE, pws->b[6], pwt->b[6]);
4010 pwd->b[7] = msa_sra_df(DF_BYTE, pws->b[7], pwt->b[7]);
4011 pwd->b[8] = msa_sra_df(DF_BYTE, pws->b[8], pwt->b[8]);
4012 pwd->b[9] = msa_sra_df(DF_BYTE, pws->b[9], pwt->b[9]);
4013 pwd->b[10] = msa_sra_df(DF_BYTE, pws->b[10], pwt->b[10]);
4014 pwd->b[11] = msa_sra_df(DF_BYTE, pws->b[11], pwt->b[11]);
4015 pwd->b[12] = msa_sra_df(DF_BYTE, pws->b[12], pwt->b[12]);
4016 pwd->b[13] = msa_sra_df(DF_BYTE, pws->b[13], pwt->b[13]);
4017 pwd->b[14] = msa_sra_df(DF_BYTE, pws->b[14], pwt->b[14]);
4018 pwd->b[15] = msa_sra_df(DF_BYTE, pws->b[15], pwt->b[15]);
4019 }
4020
4021 void helper_msa_sra_h(CPUMIPSState *env,
4022 uint32_t wd, uint32_t ws, uint32_t wt)
4023 {
4024 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4025 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4026 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4027
4028 pwd->h[0] = msa_sra_df(DF_HALF, pws->h[0], pwt->h[0]);
4029 pwd->h[1] = msa_sra_df(DF_HALF, pws->h[1], pwt->h[1]);
4030 pwd->h[2] = msa_sra_df(DF_HALF, pws->h[2], pwt->h[2]);
4031 pwd->h[3] = msa_sra_df(DF_HALF, pws->h[3], pwt->h[3]);
4032 pwd->h[4] = msa_sra_df(DF_HALF, pws->h[4], pwt->h[4]);
4033 pwd->h[5] = msa_sra_df(DF_HALF, pws->h[5], pwt->h[5]);
4034 pwd->h[6] = msa_sra_df(DF_HALF, pws->h[6], pwt->h[6]);
4035 pwd->h[7] = msa_sra_df(DF_HALF, pws->h[7], pwt->h[7]);
4036 }
4037
4038 void helper_msa_sra_w(CPUMIPSState *env,
4039 uint32_t wd, uint32_t ws, uint32_t wt)
4040 {
4041 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4042 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4043 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4044
4045 pwd->w[0] = msa_sra_df(DF_WORD, pws->w[0], pwt->w[0]);
4046 pwd->w[1] = msa_sra_df(DF_WORD, pws->w[1], pwt->w[1]);
4047 pwd->w[2] = msa_sra_df(DF_WORD, pws->w[2], pwt->w[2]);
4048 pwd->w[3] = msa_sra_df(DF_WORD, pws->w[3], pwt->w[3]);
4049 }
4050
4051 void helper_msa_sra_d(CPUMIPSState *env,
4052 uint32_t wd, uint32_t ws, uint32_t wt)
4053 {
4054 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4055 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4056 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4057
4058 pwd->d[0] = msa_sra_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4059 pwd->d[1] = msa_sra_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4060 }
4061
4062
4063 static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2)
4064 {
4065 int32_t b_arg2 = BIT_POSITION(arg2, df);
4066 if (b_arg2 == 0) {
4067 return arg1;
4068 } else {
4069 int64_t r_bit = (arg1 >> (b_arg2 - 1)) & 1;
4070 return (arg1 >> b_arg2) + r_bit;
4071 }
4072 }
4073
4074 void helper_msa_srar_b(CPUMIPSState *env,
4075 uint32_t wd, uint32_t ws, uint32_t wt)
4076 {
4077 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4078 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4079 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4080
4081 pwd->b[0] = msa_srar_df(DF_BYTE, pws->b[0], pwt->b[0]);
4082 pwd->b[1] = msa_srar_df(DF_BYTE, pws->b[1], pwt->b[1]);
4083 pwd->b[2] = msa_srar_df(DF_BYTE, pws->b[2], pwt->b[2]);
4084 pwd->b[3] = msa_srar_df(DF_BYTE, pws->b[3], pwt->b[3]);
4085 pwd->b[4] = msa_srar_df(DF_BYTE, pws->b[4], pwt->b[4]);
4086 pwd->b[5] = msa_srar_df(DF_BYTE, pws->b[5], pwt->b[5]);
4087 pwd->b[6] = msa_srar_df(DF_BYTE, pws->b[6], pwt->b[6]);
4088 pwd->b[7] = msa_srar_df(DF_BYTE, pws->b[7], pwt->b[7]);
4089 pwd->b[8] = msa_srar_df(DF_BYTE, pws->b[8], pwt->b[8]);
4090 pwd->b[9] = msa_srar_df(DF_BYTE, pws->b[9], pwt->b[9]);
4091 pwd->b[10] = msa_srar_df(DF_BYTE, pws->b[10], pwt->b[10]);
4092 pwd->b[11] = msa_srar_df(DF_BYTE, pws->b[11], pwt->b[11]);
4093 pwd->b[12] = msa_srar_df(DF_BYTE, pws->b[12], pwt->b[12]);
4094 pwd->b[13] = msa_srar_df(DF_BYTE, pws->b[13], pwt->b[13]);
4095 pwd->b[14] = msa_srar_df(DF_BYTE, pws->b[14], pwt->b[14]);
4096 pwd->b[15] = msa_srar_df(DF_BYTE, pws->b[15], pwt->b[15]);
4097 }
4098
4099 void helper_msa_srar_h(CPUMIPSState *env,
4100 uint32_t wd, uint32_t ws, uint32_t wt)
4101 {
4102 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4103 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4104 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4105
4106 pwd->h[0] = msa_srar_df(DF_HALF, pws->h[0], pwt->h[0]);
4107 pwd->h[1] = msa_srar_df(DF_HALF, pws->h[1], pwt->h[1]);
4108 pwd->h[2] = msa_srar_df(DF_HALF, pws->h[2], pwt->h[2]);
4109 pwd->h[3] = msa_srar_df(DF_HALF, pws->h[3], pwt->h[3]);
4110 pwd->h[4] = msa_srar_df(DF_HALF, pws->h[4], pwt->h[4]);
4111 pwd->h[5] = msa_srar_df(DF_HALF, pws->h[5], pwt->h[5]);
4112 pwd->h[6] = msa_srar_df(DF_HALF, pws->h[6], pwt->h[6]);
4113 pwd->h[7] = msa_srar_df(DF_HALF, pws->h[7], pwt->h[7]);
4114 }
4115
4116 void helper_msa_srar_w(CPUMIPSState *env,
4117 uint32_t wd, uint32_t ws, uint32_t wt)
4118 {
4119 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4120 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4121 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4122
4123 pwd->w[0] = msa_srar_df(DF_WORD, pws->w[0], pwt->w[0]);
4124 pwd->w[1] = msa_srar_df(DF_WORD, pws->w[1], pwt->w[1]);
4125 pwd->w[2] = msa_srar_df(DF_WORD, pws->w[2], pwt->w[2]);
4126 pwd->w[3] = msa_srar_df(DF_WORD, pws->w[3], pwt->w[3]);
4127 }
4128
4129 void helper_msa_srar_d(CPUMIPSState *env,
4130 uint32_t wd, uint32_t ws, uint32_t wt)
4131 {
4132 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4133 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4134 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4135
4136 pwd->d[0] = msa_srar_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4137 pwd->d[1] = msa_srar_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4138 }
4139
4140
4141 static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2)
4142 {
4143 uint64_t u_arg1 = UNSIGNED(arg1, df);
4144 int32_t b_arg2 = BIT_POSITION(arg2, df);
4145 return u_arg1 >> b_arg2;
4146 }
4147
4148 void helper_msa_srl_b(CPUMIPSState *env,
4149 uint32_t wd, uint32_t ws, uint32_t wt)
4150 {
4151 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4152 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4153 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4154
4155 pwd->b[0] = msa_srl_df(DF_BYTE, pws->b[0], pwt->b[0]);
4156 pwd->b[1] = msa_srl_df(DF_BYTE, pws->b[1], pwt->b[1]);
4157 pwd->b[2] = msa_srl_df(DF_BYTE, pws->b[2], pwt->b[2]);
4158 pwd->b[3] = msa_srl_df(DF_BYTE, pws->b[3], pwt->b[3]);
4159 pwd->b[4] = msa_srl_df(DF_BYTE, pws->b[4], pwt->b[4]);
4160 pwd->b[5] = msa_srl_df(DF_BYTE, pws->b[5], pwt->b[5]);
4161 pwd->b[6] = msa_srl_df(DF_BYTE, pws->b[6], pwt->b[6]);
4162 pwd->b[7] = msa_srl_df(DF_BYTE, pws->b[7], pwt->b[7]);
4163 pwd->b[8] = msa_srl_df(DF_BYTE, pws->b[8], pwt->b[8]);
4164 pwd->b[9] = msa_srl_df(DF_BYTE, pws->b[9], pwt->b[9]);
4165 pwd->b[10] = msa_srl_df(DF_BYTE, pws->b[10], pwt->b[10]);
4166 pwd->b[11] = msa_srl_df(DF_BYTE, pws->b[11], pwt->b[11]);
4167 pwd->b[12] = msa_srl_df(DF_BYTE, pws->b[12], pwt->b[12]);
4168 pwd->b[13] = msa_srl_df(DF_BYTE, pws->b[13], pwt->b[13]);
4169 pwd->b[14] = msa_srl_df(DF_BYTE, pws->b[14], pwt->b[14]);
4170 pwd->b[15] = msa_srl_df(DF_BYTE, pws->b[15], pwt->b[15]);
4171 }
4172
4173 void helper_msa_srl_h(CPUMIPSState *env,
4174 uint32_t wd, uint32_t ws, uint32_t wt)
4175 {
4176 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4177 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4178 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4179
4180 pwd->h[0] = msa_srl_df(DF_HALF, pws->h[0], pwt->h[0]);
4181 pwd->h[1] = msa_srl_df(DF_HALF, pws->h[1], pwt->h[1]);
4182 pwd->h[2] = msa_srl_df(DF_HALF, pws->h[2], pwt->h[2]);
4183 pwd->h[3] = msa_srl_df(DF_HALF, pws->h[3], pwt->h[3]);
4184 pwd->h[4] = msa_srl_df(DF_HALF, pws->h[4], pwt->h[4]);
4185 pwd->h[5] = msa_srl_df(DF_HALF, pws->h[5], pwt->h[5]);
4186 pwd->h[6] = msa_srl_df(DF_HALF, pws->h[6], pwt->h[6]);
4187 pwd->h[7] = msa_srl_df(DF_HALF, pws->h[7], pwt->h[7]);
4188 }
4189
4190 void helper_msa_srl_w(CPUMIPSState *env,
4191 uint32_t wd, uint32_t ws, uint32_t wt)
4192 {
4193 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4194 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4195 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4196
4197 pwd->w[0] = msa_srl_df(DF_WORD, pws->w[0], pwt->w[0]);
4198 pwd->w[1] = msa_srl_df(DF_WORD, pws->w[1], pwt->w[1]);
4199 pwd->w[2] = msa_srl_df(DF_WORD, pws->w[2], pwt->w[2]);
4200 pwd->w[3] = msa_srl_df(DF_WORD, pws->w[3], pwt->w[3]);
4201 }
4202
4203 void helper_msa_srl_d(CPUMIPSState *env,
4204 uint32_t wd, uint32_t ws, uint32_t wt)
4205 {
4206 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4207 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4208 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4209
4210 pwd->d[0] = msa_srl_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4211 pwd->d[1] = msa_srl_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4212 }
4213
4214
4215 static inline int64_t msa_srlr_df(uint32_t df, int64_t arg1, int64_t arg2)
4216 {
4217 uint64_t u_arg1 = UNSIGNED(arg1, df);
4218 int32_t b_arg2 = BIT_POSITION(arg2, df);
4219 if (b_arg2 == 0) {
4220 return u_arg1;
4221 } else {
4222 uint64_t r_bit = (u_arg1 >> (b_arg2 - 1)) & 1;
4223 return (u_arg1 >> b_arg2) + r_bit;
4224 }
4225 }
4226
4227 void helper_msa_srlr_b(CPUMIPSState *env,
4228 uint32_t wd, uint32_t ws, uint32_t wt)
4229 {
4230 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4231 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4232 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4233
4234 pwd->b[0] = msa_srlr_df(DF_BYTE, pws->b[0], pwt->b[0]);
4235 pwd->b[1] = msa_srlr_df(DF_BYTE, pws->b[1], pwt->b[1]);
4236 pwd->b[2] = msa_srlr_df(DF_BYTE, pws->b[2], pwt->b[2]);
4237 pwd->b[3] = msa_srlr_df(DF_BYTE, pws->b[3], pwt->b[3]);
4238 pwd->b[4] = msa_srlr_df(DF_BYTE, pws->b[4], pwt->b[4]);
4239 pwd->b[5] = msa_srlr_df(DF_BYTE, pws->b[5], pwt->b[5]);
4240 pwd->b[6] = msa_srlr_df(DF_BYTE, pws->b[6], pwt->b[6]);
4241 pwd->b[7] = msa_srlr_df(DF_BYTE, pws->b[7], pwt->b[7]);
4242 pwd->b[8] = msa_srlr_df(DF_BYTE, pws->b[8], pwt->b[8]);
4243 pwd->b[9] = msa_srlr_df(DF_BYTE, pws->b[9], pwt->b[9]);
4244 pwd->b[10] = msa_srlr_df(DF_BYTE, pws->b[10], pwt->b[10]);
4245 pwd->b[11] = msa_srlr_df(DF_BYTE, pws->b[11], pwt->b[11]);
4246 pwd->b[12] = msa_srlr_df(DF_BYTE, pws->b[12], pwt->b[12]);
4247 pwd->b[13] = msa_srlr_df(DF_BYTE, pws->b[13], pwt->b[13]);
4248 pwd->b[14] = msa_srlr_df(DF_BYTE, pws->b[14], pwt->b[14]);
4249 pwd->b[15] = msa_srlr_df(DF_BYTE, pws->b[15], pwt->b[15]);
4250 }
4251
4252 void helper_msa_srlr_h(CPUMIPSState *env,
4253 uint32_t wd, uint32_t ws, uint32_t wt)
4254 {
4255 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4256 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4257 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4258
4259 pwd->h[0] = msa_srlr_df(DF_HALF, pws->h[0], pwt->h[0]);
4260 pwd->h[1] = msa_srlr_df(DF_HALF, pws->h[1], pwt->h[1]);
4261 pwd->h[2] = msa_srlr_df(DF_HALF, pws->h[2], pwt->h[2]);
4262 pwd->h[3] = msa_srlr_df(DF_HALF, pws->h[3], pwt->h[3]);
4263 pwd->h[4] = msa_srlr_df(DF_HALF, pws->h[4], pwt->h[4]);
4264 pwd->h[5] = msa_srlr_df(DF_HALF, pws->h[5], pwt->h[5]);
4265 pwd->h[6] = msa_srlr_df(DF_HALF, pws->h[6], pwt->h[6]);
4266 pwd->h[7] = msa_srlr_df(DF_HALF, pws->h[7], pwt->h[7]);
4267 }
4268
4269 void helper_msa_srlr_w(CPUMIPSState *env,
4270 uint32_t wd, uint32_t ws, uint32_t wt)
4271 {
4272 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4273 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4274 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4275
4276 pwd->w[0] = msa_srlr_df(DF_WORD, pws->w[0], pwt->w[0]);
4277 pwd->w[1] = msa_srlr_df(DF_WORD, pws->w[1], pwt->w[1]);
4278 pwd->w[2] = msa_srlr_df(DF_WORD, pws->w[2], pwt->w[2]);
4279 pwd->w[3] = msa_srlr_df(DF_WORD, pws->w[3], pwt->w[3]);
4280 }
4281
4282 void helper_msa_srlr_d(CPUMIPSState *env,
4283 uint32_t wd, uint32_t ws, uint32_t wt)
4284 {
4285 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4286 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4287 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4288
4289 pwd->d[0] = msa_srlr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4290 pwd->d[1] = msa_srlr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4291 }
4292
4293
4294 #define MSA_FN_IMM8(FUNC, DEST, OPERATION) \
4295 void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \
4296 uint32_t i8) \
4297 { \
4298 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
4299 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
4300 uint32_t i; \
4301 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
4302 DEST = OPERATION; \
4303 } \
4304 }
4305
4306 MSA_FN_IMM8(andi_b, pwd->b[i], pws->b[i] & i8)
4307 MSA_FN_IMM8(ori_b, pwd->b[i], pws->b[i] | i8)
4308 MSA_FN_IMM8(nori_b, pwd->b[i], ~(pws->b[i] | i8))
4309 MSA_FN_IMM8(xori_b, pwd->b[i], pws->b[i] ^ i8)
4310
4311 #define BIT_MOVE_IF_NOT_ZERO(dest, arg1, arg2, df) \
4312 UNSIGNED(((dest & (~arg2)) | (arg1 & arg2)), df)
4313 MSA_FN_IMM8(bmnzi_b, pwd->b[i],
4314 BIT_MOVE_IF_NOT_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
4315
4316 #define BIT_MOVE_IF_ZERO(dest, arg1, arg2, df) \
4317 UNSIGNED((dest & arg2) | (arg1 & (~arg2)), df)
4318 MSA_FN_IMM8(bmzi_b, pwd->b[i],
4319 BIT_MOVE_IF_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
4320
4321 #define BIT_SELECT(dest, arg1, arg2, df) \
4322 UNSIGNED((arg1 & (~dest)) | (arg2 & dest), df)
4323 MSA_FN_IMM8(bseli_b, pwd->b[i],
4324 BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE))
4325
4326 #undef BIT_SELECT
4327 #undef BIT_MOVE_IF_ZERO
4328 #undef BIT_MOVE_IF_NOT_ZERO
4329 #undef MSA_FN_IMM8
4330
4331 #define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03))
4332
4333 void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
4334 uint32_t ws, uint32_t imm)
4335 {
4336 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4337 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4338 wr_t wx, *pwx = &wx;
4339 uint32_t i;
4340
4341 switch (df) {
4342 case DF_BYTE:
4343 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
4344 pwx->b[i] = pws->b[SHF_POS(i, imm)];
4345 }
4346 break;
4347 case DF_HALF:
4348 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
4349 pwx->h[i] = pws->h[SHF_POS(i, imm)];
4350 }
4351 break;
4352 case DF_WORD:
4353 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
4354 pwx->w[i] = pws->w[SHF_POS(i, imm)];
4355 }
4356 break;
4357 default:
4358 assert(0);
4359 }
4360 msa_move_v(pwd, pwx);
4361 }
4362
4363 static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2)
4364 {
4365 return arg1 - arg2;
4366 }
4367
4368 #define MSA_BINOP_IMM_DF(helper, func) \
4369 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
4370 uint32_t wd, uint32_t ws, int32_t u5) \
4371 { \
4372 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
4373 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
4374 uint32_t i; \
4375 \
4376 switch (df) { \
4377 case DF_BYTE: \
4378 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
4379 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
4380 } \
4381 break; \
4382 case DF_HALF: \
4383 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
4384 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
4385 } \
4386 break; \
4387 case DF_WORD: \
4388 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
4389 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
4390 } \
4391 break; \
4392 case DF_DOUBLE: \
4393 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
4394 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
4395 } \
4396 break; \
4397 default: \
4398 assert(0); \
4399 } \
4400 }
4401
4402 MSA_BINOP_IMM_DF(addvi, addv)
4403 MSA_BINOP_IMM_DF(subvi, subv)
4404 MSA_BINOP_IMM_DF(ceqi, ceq)
4405 MSA_BINOP_IMM_DF(clei_s, cle_s)
4406 MSA_BINOP_IMM_DF(clei_u, cle_u)
4407 MSA_BINOP_IMM_DF(clti_s, clt_s)
4408 MSA_BINOP_IMM_DF(clti_u, clt_u)
4409 MSA_BINOP_IMM_DF(maxi_s, max_s)
4410 MSA_BINOP_IMM_DF(maxi_u, max_u)
4411 MSA_BINOP_IMM_DF(mini_s, min_s)
4412 MSA_BINOP_IMM_DF(mini_u, min_u)
4413 #undef MSA_BINOP_IMM_DF
4414
4415 void helper_msa_ldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
4416 int32_t s10)
4417 {
4418 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4419 uint32_t i;
4420
4421 switch (df) {
4422 case DF_BYTE:
4423 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
4424 pwd->b[i] = (int8_t)s10;
4425 }
4426 break;
4427 case DF_HALF:
4428 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
4429 pwd->h[i] = (int16_t)s10;
4430 }
4431 break;
4432 case DF_WORD:
4433 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
4434 pwd->w[i] = (int32_t)s10;
4435 }
4436 break;
4437 case DF_DOUBLE:
4438 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
4439 pwd->d[i] = (int64_t)s10;
4440 }
4441 break;
4442 default:
4443 assert(0);
4444 }
4445 }
4446
4447 static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
4448 {
4449 return arg < M_MIN_INT(m + 1) ? M_MIN_INT(m + 1) :
4450 arg > M_MAX_INT(m + 1) ? M_MAX_INT(m + 1) :
4451 arg;
4452 }
4453
4454 static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m)
4455 {
4456 uint64_t u_arg = UNSIGNED(arg, df);
4457 return u_arg < M_MAX_UINT(m + 1) ? u_arg :
4458 M_MAX_UINT(m + 1);
4459 }
4460
4461 #define MSA_BINOP_IMMU_DF(helper, func) \
4462 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
4463 uint32_t ws, uint32_t u5) \
4464 { \
4465 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
4466 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
4467 uint32_t i; \
4468 \
4469 switch (df) { \
4470 case DF_BYTE: \
4471 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
4472 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
4473 } \
4474 break; \
4475 case DF_HALF: \
4476 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
4477 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
4478 } \
4479 break; \
4480 case DF_WORD: \
4481 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
4482 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
4483 } \
4484 break; \
4485 case DF_DOUBLE: \
4486 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
4487 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
4488 } \
4489 break; \
4490 default: \
4491 assert(0); \
4492 } \
4493 }
4494
4495 MSA_BINOP_IMMU_DF(slli, sll)
4496 MSA_BINOP_IMMU_DF(srai, sra)
4497 MSA_BINOP_IMMU_DF(srli, srl)
4498 MSA_BINOP_IMMU_DF(bclri, bclr)
4499 MSA_BINOP_IMMU_DF(bseti, bset)
4500 MSA_BINOP_IMMU_DF(bnegi, bneg)
4501 MSA_BINOP_IMMU_DF(sat_s, sat_s)
4502 MSA_BINOP_IMMU_DF(sat_u, sat_u)
4503 MSA_BINOP_IMMU_DF(srari, srar)
4504 MSA_BINOP_IMMU_DF(srlri, srlr)
4505 #undef MSA_BINOP_IMMU_DF
4506
4507 #define MSA_TEROP_IMMU_DF(helper, func) \
4508 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
4509 uint32_t wd, uint32_t ws, uint32_t u5) \
4510 { \
4511 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
4512 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
4513 uint32_t i; \
4514 \
4515 switch (df) { \
4516 case DF_BYTE: \
4517 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
4518 pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i], \
4519 u5); \
4520 } \
4521 break; \
4522 case DF_HALF: \
4523 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
4524 pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i], \
4525 u5); \
4526 } \
4527 break; \
4528 case DF_WORD: \
4529 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
4530 pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i], \
4531 u5); \
4532 } \
4533 break; \
4534 case DF_DOUBLE: \
4535 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
4536 pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i], \
4537 u5); \
4538 } \
4539 break; \
4540 default: \
4541 assert(0); \
4542 } \
4543 }
4544
4545 MSA_TEROP_IMMU_DF(binsli, binsl)
4546 MSA_TEROP_IMMU_DF(binsri, binsr)
4547 #undef MSA_TEROP_IMMU_DF
4548
4549 static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
4550 {
4551 int64_t max_int = DF_MAX_INT(df);
4552 int64_t min_int = DF_MIN_INT(df);
4553 if (arg2 > 0) {
4554 return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
4555 } else {
4556 return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
4557 }
4558 }
4559
4560 static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
4561 {
4562 uint64_t u_arg1 = UNSIGNED(arg1, df);
4563 uint64_t u_arg2 = UNSIGNED(arg2, df);
4564 return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
4565 }
4566
4567 static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2)
4568 {
4569 uint64_t u_arg1 = UNSIGNED(arg1, df);
4570 uint64_t max_uint = DF_MAX_UINT(df);
4571 if (arg2 >= 0) {
4572 uint64_t u_arg2 = (uint64_t)arg2;
4573 return (u_arg1 > u_arg2) ?
4574 (int64_t)(u_arg1 - u_arg2) :
4575 0;
4576 } else {
4577 uint64_t u_arg2 = (uint64_t)(-arg2);
4578 return (u_arg1 < max_uint - u_arg2) ?
4579 (int64_t)(u_arg1 + u_arg2) :
4580 (int64_t)max_uint;
4581 }
4582 }
4583
4584 static inline int64_t msa_subsuu_s_df(uint32_t df, int64_t arg1, int64_t arg2)
4585 {
4586 uint64_t u_arg1 = UNSIGNED(arg1, df);
4587 uint64_t u_arg2 = UNSIGNED(arg2, df);
4588 int64_t max_int = DF_MAX_INT(df);
4589 int64_t min_int = DF_MIN_INT(df);
4590 if (u_arg1 > u_arg2) {
4591 return u_arg1 - u_arg2 < (uint64_t)max_int ?
4592 (int64_t)(u_arg1 - u_arg2) :
4593 max_int;
4594 } else {
4595 return u_arg2 - u_arg1 < (uint64_t)(-min_int) ?
4596 (int64_t)(u_arg1 - u_arg2) :
4597 min_int;
4598 }
4599 }
4600
4601 static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2)
4602 {
4603 return arg1 * arg2;
4604 }
4605
4606 #define SIGNED_EXTRACT(e, o, a, df) \
4607 do { \
4608 e = SIGNED_EVEN(a, df); \
4609 o = SIGNED_ODD(a, df); \
4610 } while (0)
4611
4612 #define UNSIGNED_EXTRACT(e, o, a, df) \
4613 do { \
4614 e = UNSIGNED_EVEN(a, df); \
4615 o = UNSIGNED_ODD(a, df); \
4616 } while (0)
4617
4618 static inline int64_t msa_dotp_s_df(uint32_t df, int64_t arg1, int64_t arg2)
4619 {
4620 int64_t even_arg1;
4621 int64_t even_arg2;
4622 int64_t odd_arg1;
4623 int64_t odd_arg2;
4624 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
4625 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
4626 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
4627 }
4628
4629 static inline int64_t msa_dotp_u_df(uint32_t df, int64_t arg1, int64_t arg2)
4630 {
4631 int64_t even_arg1;
4632 int64_t even_arg2;
4633 int64_t odd_arg1;
4634 int64_t odd_arg2;
4635 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
4636 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
4637 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
4638 }
4639
4640 #define CONCATENATE_AND_SLIDE(s, k) \
4641 do { \
4642 for (i = 0; i < s; i++) { \
4643 v[i] = pws->b[s * k + i]; \
4644 v[i + s] = pwd->b[s * k + i]; \
4645 } \
4646 for (i = 0; i < s; i++) { \
4647 pwd->b[s * k + i] = v[i + n]; \
4648 } \
4649 } while (0)
4650
4651 static inline void msa_sld_df(uint32_t df, wr_t *pwd,
4652 wr_t *pws, target_ulong rt)
4653 {
4654 uint32_t n = rt % DF_ELEMENTS(df);
4655 uint8_t v[64];
4656 uint32_t i, k;
4657
4658 switch (df) {
4659 case DF_BYTE:
4660 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_BYTE), 0);
4661 break;
4662 case DF_HALF:
4663 for (k = 0; k < 2; k++) {
4664 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_HALF), k);
4665 }
4666 break;
4667 case DF_WORD:
4668 for (k = 0; k < 4; k++) {
4669 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_WORD), k);
4670 }
4671 break;
4672 case DF_DOUBLE:
4673 for (k = 0; k < 8; k++) {
4674 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_DOUBLE), k);
4675 }
4676 break;
4677 default:
4678 assert(0);
4679 }
4680 }
4681
4682 static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2)
4683 {
4684 int64_t q_min = DF_MIN_INT(df);
4685 int64_t q_max = DF_MAX_INT(df);
4686
4687 if (arg1 == q_min && arg2 == q_min) {
4688 return q_max;
4689 }
4690 return (arg1 * arg2) >> (DF_BITS(df) - 1);
4691 }
4692
4693 static inline int64_t msa_mulr_q_df(uint32_t df, int64_t arg1, int64_t arg2)
4694 {
4695 int64_t q_min = DF_MIN_INT(df);
4696 int64_t q_max = DF_MAX_INT(df);
4697 int64_t r_bit = 1 << (DF_BITS(df) - 2);
4698
4699 if (arg1 == q_min && arg2 == q_min) {
4700 return q_max;
4701 }
4702 return (arg1 * arg2 + r_bit) >> (DF_BITS(df) - 1);
4703 }
4704
4705 #define MSA_BINOP_DF(func) \
4706 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
4707 uint32_t wd, uint32_t ws, uint32_t wt) \
4708 { \
4709 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
4710 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
4711 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
4712 \
4713 switch (df) { \
4714 case DF_BYTE: \
4715 pwd->b[0] = msa_ ## func ## _df(df, pws->b[0], pwt->b[0]); \
4716 pwd->b[1] = msa_ ## func ## _df(df, pws->b[1], pwt->b[1]); \
4717 pwd->b[2] = msa_ ## func ## _df(df, pws->b[2], pwt->b[2]); \
4718 pwd->b[3] = msa_ ## func ## _df(df, pws->b[3], pwt->b[3]); \
4719 pwd->b[4] = msa_ ## func ## _df(df, pws->b[4], pwt->b[4]); \
4720 pwd->b[5] = msa_ ## func ## _df(df, pws->b[5], pwt->b[5]); \
4721 pwd->b[6] = msa_ ## func ## _df(df, pws->b[6], pwt->b[6]); \
4722 pwd->b[7] = msa_ ## func ## _df(df, pws->b[7], pwt->b[7]); \
4723 pwd->b[8] = msa_ ## func ## _df(df, pws->b[8], pwt->b[8]); \
4724 pwd->b[9] = msa_ ## func ## _df(df, pws->b[9], pwt->b[9]); \
4725 pwd->b[10] = msa_ ## func ## _df(df, pws->b[10], pwt->b[10]); \
4726 pwd->b[11] = msa_ ## func ## _df(df, pws->b[11], pwt->b[11]); \
4727 pwd->b[12] = msa_ ## func ## _df(df, pws->b[12], pwt->b[12]); \
4728 pwd->b[13] = msa_ ## func ## _df(df, pws->b[13], pwt->b[13]); \
4729 pwd->b[14] = msa_ ## func ## _df(df, pws->b[14], pwt->b[14]); \
4730 pwd->b[15] = msa_ ## func ## _df(df, pws->b[15], pwt->b[15]); \
4731 break; \
4732 case DF_HALF: \
4733 pwd->h[0] = msa_ ## func ## _df(df, pws->h[0], pwt->h[0]); \
4734 pwd->h[1] = msa_ ## func ## _df(df, pws->h[1], pwt->h[1]); \
4735 pwd->h[2] = msa_ ## func ## _df(df, pws->h[2], pwt->h[2]); \
4736 pwd->h[3] = msa_ ## func ## _df(df, pws->h[3], pwt->h[3]); \
4737 pwd->h[4] = msa_ ## func ## _df(df, pws->h[4], pwt->h[4]); \
4738 pwd->h[5] = msa_ ## func ## _df(df, pws->h[5], pwt->h[5]); \
4739 pwd->h[6] = msa_ ## func ## _df(df, pws->h[6], pwt->h[6]); \
4740 pwd->h[7] = msa_ ## func ## _df(df, pws->h[7], pwt->h[7]); \
4741 break; \
4742 case DF_WORD: \
4743 pwd->w[0] = msa_ ## func ## _df(df, pws->w[0], pwt->w[0]); \
4744 pwd->w[1] = msa_ ## func ## _df(df, pws->w[1], pwt->w[1]); \
4745 pwd->w[2] = msa_ ## func ## _df(df, pws->w[2], pwt->w[2]); \
4746 pwd->w[3] = msa_ ## func ## _df(df, pws->w[3], pwt->w[3]); \
4747 break; \
4748 case DF_DOUBLE: \
4749 pwd->d[0] = msa_ ## func ## _df(df, pws->d[0], pwt->d[0]); \
4750 pwd->d[1] = msa_ ## func ## _df(df, pws->d[1], pwt->d[1]); \
4751 break; \
4752 default: \
4753 assert(0); \
4754 } \
4755 }
4756
4757 MSA_BINOP_DF(subv)
4758 MSA_BINOP_DF(subs_s)
4759 MSA_BINOP_DF(subs_u)
4760 MSA_BINOP_DF(subsus_u)
4761 MSA_BINOP_DF(subsuu_s)
4762 MSA_BINOP_DF(mulv)
4763 MSA_BINOP_DF(dotp_s)
4764 MSA_BINOP_DF(dotp_u)
4765
4766 MSA_BINOP_DF(mul_q)
4767 MSA_BINOP_DF(mulr_q)
4768 #undef MSA_BINOP_DF
4769
4770 void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
4771 uint32_t ws, uint32_t rt)
4772 {
4773 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4774 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4775
4776 msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]);
4777 }
4778
4779 static inline int64_t msa_maddv_df(uint32_t df, int64_t dest, int64_t arg1,
4780 int64_t arg2)
4781 {
4782 return dest + arg1 * arg2;
4783 }
4784
4785 static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
4786 int64_t arg2)
4787 {
4788 return dest - arg1 * arg2;
4789 }
4790
4791 static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1,
4792 int64_t arg2)
4793 {
4794 int64_t even_arg1;
4795 int64_t even_arg2;
4796 int64_t odd_arg1;
4797 int64_t odd_arg2;
4798 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
4799 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
4800 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
4801 }
4802
4803 static inline int64_t msa_dpadd_u_df(uint32_t df, int64_t dest, int64_t arg1,
4804 int64_t arg2)
4805 {
4806 int64_t even_arg1;
4807 int64_t even_arg2;
4808 int64_t odd_arg1;
4809 int64_t odd_arg2;
4810 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
4811 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
4812 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
4813 }
4814
4815 static inline int64_t msa_dpsub_s_df(uint32_t df, int64_t dest, int64_t arg1,
4816 int64_t arg2)
4817 {
4818 int64_t even_arg1;
4819 int64_t even_arg2;
4820 int64_t odd_arg1;
4821 int64_t odd_arg2;
4822 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
4823 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
4824 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
4825 }
4826
4827 static inline int64_t msa_dpsub_u_df(uint32_t df, int64_t dest, int64_t arg1,
4828 int64_t arg2)
4829 {
4830 int64_t even_arg1;
4831 int64_t even_arg2;
4832 int64_t odd_arg1;
4833 int64_t odd_arg2;
4834 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
4835 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
4836 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
4837 }
4838
4839 static inline int64_t msa_madd_q_df(uint32_t df, int64_t dest, int64_t arg1,
4840 int64_t arg2)
4841 {
4842 int64_t q_prod, q_ret;
4843
4844 int64_t q_max = DF_MAX_INT(df);
4845 int64_t q_min = DF_MIN_INT(df);
4846
4847 q_prod = arg1 * arg2;
4848 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod) >> (DF_BITS(df) - 1);
4849
4850 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
4851 }
4852
4853 static inline int64_t msa_msub_q_df(uint32_t df, int64_t dest, int64_t arg1,
4854 int64_t arg2)
4855 {
4856 int64_t q_prod, q_ret;
4857
4858 int64_t q_max = DF_MAX_INT(df);
4859 int64_t q_min = DF_MIN_INT(df);
4860
4861 q_prod = arg1 * arg2;
4862 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod) >> (DF_BITS(df) - 1);
4863
4864 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
4865 }
4866
4867 static inline int64_t msa_maddr_q_df(uint32_t df, int64_t dest, int64_t arg1,
4868 int64_t arg2)
4869 {
4870 int64_t q_prod, q_ret;
4871
4872 int64_t q_max = DF_MAX_INT(df);
4873 int64_t q_min = DF_MIN_INT(df);
4874 int64_t r_bit = 1 << (DF_BITS(df) - 2);
4875
4876 q_prod = arg1 * arg2;
4877 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod + r_bit) >> (DF_BITS(df) - 1);
4878
4879 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
4880 }
4881
4882 static inline int64_t msa_msubr_q_df(uint32_t df, int64_t dest, int64_t arg1,
4883 int64_t arg2)
4884 {
4885 int64_t q_prod, q_ret;
4886
4887 int64_t q_max = DF_MAX_INT(df);
4888 int64_t q_min = DF_MIN_INT(df);
4889 int64_t r_bit = 1 << (DF_BITS(df) - 2);
4890
4891 q_prod = arg1 * arg2;
4892 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod + r_bit) >> (DF_BITS(df) - 1);
4893
4894 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
4895 }
4896
4897 #define MSA_TEROP_DF(func) \
4898 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
4899 uint32_t ws, uint32_t wt) \
4900 { \
4901 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
4902 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
4903 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
4904 \
4905 switch (df) { \
4906 case DF_BYTE: \
4907 pwd->b[0] = msa_ ## func ## _df(df, pwd->b[0], pws->b[0], \
4908 pwt->b[0]); \
4909 pwd->b[1] = msa_ ## func ## _df(df, pwd->b[1], pws->b[1], \
4910 pwt->b[1]); \
4911 pwd->b[2] = msa_ ## func ## _df(df, pwd->b[2], pws->b[2], \
4912 pwt->b[2]); \
4913 pwd->b[3] = msa_ ## func ## _df(df, pwd->b[3], pws->b[3], \
4914 pwt->b[3]); \
4915 pwd->b[4] = msa_ ## func ## _df(df, pwd->b[4], pws->b[4], \
4916 pwt->b[4]); \
4917 pwd->b[5] = msa_ ## func ## _df(df, pwd->b[5], pws->b[5], \
4918 pwt->b[5]); \
4919 pwd->b[6] = msa_ ## func ## _df(df, pwd->b[6], pws->b[6], \
4920 pwt->b[6]); \
4921 pwd->b[7] = msa_ ## func ## _df(df, pwd->b[7], pws->b[7], \
4922 pwt->b[7]); \
4923 pwd->b[8] = msa_ ## func ## _df(df, pwd->b[8], pws->b[8], \
4924 pwt->b[8]); \
4925 pwd->b[9] = msa_ ## func ## _df(df, pwd->b[9], pws->b[9], \
4926 pwt->b[9]); \
4927 pwd->b[10] = msa_ ## func ## _df(df, pwd->b[10], pws->b[10], \
4928 pwt->b[10]); \
4929 pwd->b[11] = msa_ ## func ## _df(df, pwd->b[11], pws->b[11], \
4930 pwt->b[11]); \
4931 pwd->b[12] = msa_ ## func ## _df(df, pwd->b[12], pws->b[12], \
4932 pwt->b[12]); \
4933 pwd->b[13] = msa_ ## func ## _df(df, pwd->b[13], pws->b[13], \
4934 pwt->b[13]); \
4935 pwd->b[14] = msa_ ## func ## _df(df, pwd->b[14], pws->b[14], \
4936 pwt->b[14]); \
4937 pwd->b[15] = msa_ ## func ## _df(df, pwd->b[15], pws->b[15], \
4938 pwt->b[15]); \
4939 break; \
4940 case DF_HALF: \
4941 pwd->h[0] = msa_ ## func ## _df(df, pwd->h[0], pws->h[0], pwt->h[0]); \
4942 pwd->h[1] = msa_ ## func ## _df(df, pwd->h[1], pws->h[1], pwt->h[1]); \
4943 pwd->h[2] = msa_ ## func ## _df(df, pwd->h[2], pws->h[2], pwt->h[2]); \
4944 pwd->h[3] = msa_ ## func ## _df(df, pwd->h[3], pws->h[3], pwt->h[3]); \
4945 pwd->h[4] = msa_ ## func ## _df(df, pwd->h[4], pws->h[4], pwt->h[4]); \
4946 pwd->h[5] = msa_ ## func ## _df(df, pwd->h[5], pws->h[5], pwt->h[5]); \
4947 pwd->h[6] = msa_ ## func ## _df(df, pwd->h[6], pws->h[6], pwt->h[6]); \
4948 pwd->h[7] = msa_ ## func ## _df(df, pwd->h[7], pws->h[7], pwt->h[7]); \
4949 break; \
4950 case DF_WORD: \
4951 pwd->w[0] = msa_ ## func ## _df(df, pwd->w[0], pws->w[0], pwt->w[0]); \
4952 pwd->w[1] = msa_ ## func ## _df(df, pwd->w[1], pws->w[1], pwt->w[1]); \
4953 pwd->w[2] = msa_ ## func ## _df(df, pwd->w[2], pws->w[2], pwt->w[2]); \
4954 pwd->w[3] = msa_ ## func ## _df(df, pwd->w[3], pws->w[3], pwt->w[3]); \
4955 break; \
4956 case DF_DOUBLE: \
4957 pwd->d[0] = msa_ ## func ## _df(df, pwd->d[0], pws->d[0], pwt->d[0]); \
4958 pwd->d[1] = msa_ ## func ## _df(df, pwd->d[1], pws->d[1], pwt->d[1]); \
4959 break; \
4960 default: \
4961 assert(0); \
4962 } \
4963 }
4964
4965 MSA_TEROP_DF(maddv)
4966 MSA_TEROP_DF(msubv)
4967 MSA_TEROP_DF(dpadd_s)
4968 MSA_TEROP_DF(dpadd_u)
4969 MSA_TEROP_DF(dpsub_s)
4970 MSA_TEROP_DF(dpsub_u)
4971 MSA_TEROP_DF(binsl)
4972 MSA_TEROP_DF(binsr)
4973 MSA_TEROP_DF(madd_q)
4974 MSA_TEROP_DF(msub_q)
4975 MSA_TEROP_DF(maddr_q)
4976 MSA_TEROP_DF(msubr_q)
4977 #undef MSA_TEROP_DF
4978
4979 static inline void msa_splat_df(uint32_t df, wr_t *pwd,
4980 wr_t *pws, target_ulong rt)
4981 {
4982 uint32_t n = rt % DF_ELEMENTS(df);
4983 uint32_t i;
4984
4985 switch (df) {
4986 case DF_BYTE:
4987 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
4988 pwd->b[i] = pws->b[n];
4989 }
4990 break;
4991 case DF_HALF:
4992 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
4993 pwd->h[i] = pws->h[n];
4994 }
4995 break;
4996 case DF_WORD:
4997 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
4998 pwd->w[i] = pws->w[n];
4999 }
5000 break;
5001 case DF_DOUBLE:
5002 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5003 pwd->d[i] = pws->d[n];
5004 }
5005 break;
5006 default:
5007 assert(0);
5008 }
5009 }
5010
5011 void helper_msa_splat_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5012 uint32_t ws, uint32_t rt)
5013 {
5014 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5015 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5016
5017 msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]);
5018 }
5019
5020 #define MSA_DO_B MSA_DO(b)
5021 #define MSA_DO_H MSA_DO(h)
5022 #define MSA_DO_W MSA_DO(w)
5023 #define MSA_DO_D MSA_DO(d)
5024
5025 #define MSA_LOOP_B MSA_LOOP(B)
5026 #define MSA_LOOP_H MSA_LOOP(H)
5027 #define MSA_LOOP_W MSA_LOOP(W)
5028 #define MSA_LOOP_D MSA_LOOP(D)
5029
5030 #define MSA_LOOP_COND_B MSA_LOOP_COND(DF_BYTE)
5031 #define MSA_LOOP_COND_H MSA_LOOP_COND(DF_HALF)
5032 #define MSA_LOOP_COND_W MSA_LOOP_COND(DF_WORD)
5033 #define MSA_LOOP_COND_D MSA_LOOP_COND(DF_DOUBLE)
5034
5035 #define MSA_LOOP(DF) \
5036 do { \
5037 for (i = 0; i < (MSA_LOOP_COND_ ## DF) ; i++) { \
5038 MSA_DO_ ## DF; \
5039 } \
5040 } while (0)
5041
5042 #define MSA_FN_DF(FUNC) \
5043 void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5044 uint32_t ws, uint32_t wt) \
5045 { \
5046 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5047 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5048 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5049 wr_t wx, *pwx = &wx; \
5050 uint32_t i; \
5051 switch (df) { \
5052 case DF_BYTE: \
5053 MSA_LOOP_B; \
5054 break; \
5055 case DF_HALF: \
5056 MSA_LOOP_H; \
5057 break; \
5058 case DF_WORD: \
5059 MSA_LOOP_W; \
5060 break; \
5061 case DF_DOUBLE: \
5062 MSA_LOOP_D; \
5063 break; \
5064 default: \
5065 assert(0); \
5066 } \
5067 msa_move_v(pwd, pwx); \
5068 }
5069
5070 #define MSA_LOOP_COND(DF) \
5071 (DF_ELEMENTS(DF) / 2)
5072
5073 #define Rb(pwr, i) (pwr->b[i])
5074 #define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE) / 2])
5075 #define Rh(pwr, i) (pwr->h[i])
5076 #define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF) / 2])
5077 #define Rw(pwr, i) (pwr->w[i])
5078 #define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD) / 2])
5079 #define Rd(pwr, i) (pwr->d[i])
5080 #define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE) / 2])
5081
5082 #undef MSA_LOOP_COND
5083
5084 #define MSA_LOOP_COND(DF) \
5085 (DF_ELEMENTS(DF))
5086
5087 #define MSA_DO(DF) \
5088 do { \
5089 uint32_t n = DF_ELEMENTS(df); \
5090 uint32_t k = (pwd->DF[i] & 0x3f) % (2 * n); \
5091 pwx->DF[i] = \
5092 (pwd->DF[i] & 0xc0) ? 0 : k < n ? pwt->DF[k] : pws->DF[k - n]; \
5093 } while (0)
5094 MSA_FN_DF(vshf_df)
5095 #undef MSA_DO
5096 #undef MSA_LOOP_COND
5097 #undef MSA_FN_DF
5098
5099
5100 void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5101 uint32_t ws, uint32_t n)
5102 {
5103 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5104 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5105
5106 msa_sld_df(df, pwd, pws, n);
5107 }
5108
5109 void helper_msa_splati_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5110 uint32_t ws, uint32_t n)
5111 {
5112 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5113 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5114
5115 msa_splat_df(df, pwd, pws, n);
5116 }
5117
5118 void helper_msa_copy_s_b(CPUMIPSState *env, uint32_t rd,
5119 uint32_t ws, uint32_t n)
5120 {
5121 n %= 16;
5122 #if defined(HOST_WORDS_BIGENDIAN)
5123 if (n < 8) {
5124 n = 8 - n - 1;
5125 } else {
5126 n = 24 - n - 1;
5127 }
5128 #endif
5129 env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n];
5130 }
5131
5132 void helper_msa_copy_s_h(CPUMIPSState *env, uint32_t rd,
5133 uint32_t ws, uint32_t n)
5134 {
5135 n %= 8;
5136 #if defined(HOST_WORDS_BIGENDIAN)
5137 if (n < 4) {
5138 n = 4 - n - 1;
5139 } else {
5140 n = 12 - n - 1;
5141 }
5142 #endif
5143 env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n];
5144 }
5145
5146 void helper_msa_copy_s_w(CPUMIPSState *env, uint32_t rd,
5147 uint32_t ws, uint32_t n)
5148 {
5149 n %= 4;
5150 #if defined(HOST_WORDS_BIGENDIAN)
5151 if (n < 2) {
5152 n = 2 - n - 1;
5153 } else {
5154 n = 6 - n - 1;
5155 }
5156 #endif
5157 env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n];
5158 }
5159
5160 void helper_msa_copy_s_d(CPUMIPSState *env, uint32_t rd,
5161 uint32_t ws, uint32_t n)
5162 {
5163 n %= 2;
5164 env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n];
5165 }
5166
5167 void helper_msa_copy_u_b(CPUMIPSState *env, uint32_t rd,
5168 uint32_t ws, uint32_t n)
5169 {
5170 n %= 16;
5171 #if defined(HOST_WORDS_BIGENDIAN)
5172 if (n < 8) {
5173 n = 8 - n - 1;
5174 } else {
5175 n = 24 - n - 1;
5176 }
5177 #endif
5178 env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n];
5179 }
5180
5181 void helper_msa_copy_u_h(CPUMIPSState *env, uint32_t rd,
5182 uint32_t ws, uint32_t n)
5183 {
5184 n %= 8;
5185 #if defined(HOST_WORDS_BIGENDIAN)
5186 if (n < 4) {
5187 n = 4 - n - 1;
5188 } else {
5189 n = 12 - n - 1;
5190 }
5191 #endif
5192 env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n];
5193 }
5194
5195 void helper_msa_copy_u_w(CPUMIPSState *env, uint32_t rd,
5196 uint32_t ws, uint32_t n)
5197 {
5198 n %= 4;
5199 #if defined(HOST_WORDS_BIGENDIAN)
5200 if (n < 2) {
5201 n = 2 - n - 1;
5202 } else {
5203 n = 6 - n - 1;
5204 }
5205 #endif
5206 env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];
5207 }
5208
5209 void helper_msa_insert_b(CPUMIPSState *env, uint32_t wd,
5210 uint32_t rs_num, uint32_t n)
5211 {
5212 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5213 target_ulong rs = env->active_tc.gpr[rs_num];
5214 n %= 16;
5215 #if defined(HOST_WORDS_BIGENDIAN)
5216 if (n < 8) {
5217 n = 8 - n - 1;
5218 } else {
5219 n = 24 - n - 1;
5220 }
5221 #endif
5222 pwd->b[n] = (int8_t)rs;
5223 }
5224
5225 void helper_msa_insert_h(CPUMIPSState *env, uint32_t wd,
5226 uint32_t rs_num, uint32_t n)
5227 {
5228 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5229 target_ulong rs = env->active_tc.gpr[rs_num];
5230 n %= 8;
5231 #if defined(HOST_WORDS_BIGENDIAN)
5232 if (n < 4) {
5233 n = 4 - n - 1;
5234 } else {
5235 n = 12 - n - 1;
5236 }
5237 #endif
5238 pwd->h[n] = (int16_t)rs;
5239 }
5240
5241 void helper_msa_insert_w(CPUMIPSState *env, uint32_t wd,
5242 uint32_t rs_num, uint32_t n)
5243 {
5244 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5245 target_ulong rs = env->active_tc.gpr[rs_num];
5246 n %= 4;
5247 #if defined(HOST_WORDS_BIGENDIAN)
5248 if (n < 2) {
5249 n = 2 - n - 1;
5250 } else {
5251 n = 6 - n - 1;
5252 }
5253 #endif
5254 pwd->w[n] = (int32_t)rs;
5255 }
5256
5257 void helper_msa_insert_d(CPUMIPSState *env, uint32_t wd,
5258 uint32_t rs_num, uint32_t n)
5259 {
5260 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5261 target_ulong rs = env->active_tc.gpr[rs_num];
5262 n %= 2;
5263 pwd->d[n] = (int64_t)rs;
5264 }
5265
5266 void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5267 uint32_t ws, uint32_t n)
5268 {
5269 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5270 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5271
5272 switch (df) {
5273 case DF_BYTE:
5274 pwd->b[n] = (int8_t)pws->b[0];
5275 break;
5276 case DF_HALF:
5277 pwd->h[n] = (int16_t)pws->h[0];
5278 break;
5279 case DF_WORD:
5280 pwd->w[n] = (int32_t)pws->w[0];
5281 break;
5282 case DF_DOUBLE:
5283 pwd->d[n] = (int64_t)pws->d[0];
5284 break;
5285 default:
5286 assert(0);
5287 }
5288 }
5289
5290 void helper_msa_ctcmsa(CPUMIPSState *env, target_ulong elm, uint32_t cd)
5291 {
5292 switch (cd) {
5293 case 0:
5294 break;
5295 case 1:
5296 env->active_tc.msacsr = (int32_t)elm & MSACSR_MASK;
5297 restore_msa_fp_status(env);
5298 /* check exception */
5299 if ((GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)
5300 & GET_FP_CAUSE(env->active_tc.msacsr)) {
5301 do_raise_exception(env, EXCP_MSAFPE, GETPC());
5302 }
5303 break;
5304 }
5305 }
5306
5307 target_ulong helper_msa_cfcmsa(CPUMIPSState *env, uint32_t cs)
5308 {
5309 switch (cs) {
5310 case 0:
5311 return env->msair;
5312 case 1:
5313 return env->active_tc.msacsr & MSACSR_MASK;
5314 }
5315 return 0;
5316 }
5317
5318 void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5319 uint32_t rs)
5320 {
5321 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5322 uint32_t i;
5323
5324 switch (df) {
5325 case DF_BYTE:
5326 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5327 pwd->b[i] = (int8_t)env->active_tc.gpr[rs];
5328 }
5329 break;
5330 case DF_HALF:
5331 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5332 pwd->h[i] = (int16_t)env->active_tc.gpr[rs];
5333 }
5334 break;
5335 case DF_WORD:
5336 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5337 pwd->w[i] = (int32_t)env->active_tc.gpr[rs];
5338 }
5339 break;
5340 case DF_DOUBLE:
5341 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5342 pwd->d[i] = (int64_t)env->active_tc.gpr[rs];
5343 }
5344 break;
5345 default:
5346 assert(0);
5347 }
5348 }
5349
5350
5351 #define FLOAT_ONE32 make_float32(0x3f8 << 20)
5352 #define FLOAT_ONE64 make_float64(0x3ffULL << 52)
5353
5354 #define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220)
5355 /* 0x7c20 */
5356 #define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020)
5357 /* 0x7f800020 */
5358 #define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL)
5359 /* 0x7ff0000000000020 */
5360
5361 static inline void clear_msacsr_cause(CPUMIPSState *env)
5362 {
5363 SET_FP_CAUSE(env->active_tc.msacsr, 0);
5364 }
5365
5366 static inline void check_msacsr_cause(CPUMIPSState *env, uintptr_t retaddr)
5367 {
5368 if ((GET_FP_CAUSE(env->active_tc.msacsr) &
5369 (GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)) == 0) {
5370 UPDATE_FP_FLAGS(env->active_tc.msacsr,
5371 GET_FP_CAUSE(env->active_tc.msacsr));
5372 } else {
5373 do_raise_exception(env, EXCP_MSAFPE, retaddr);
5374 }
5375 }
5376
5377 /* Flush-to-zero use cases for update_msacsr() */
5378 #define CLEAR_FS_UNDERFLOW 1
5379 #define CLEAR_IS_INEXACT 2
5380 #define RECIPROCAL_INEXACT 4
5381
5382 static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
5383 {
5384 int ieee_ex;
5385
5386 int c;
5387 int cause;
5388 int enable;
5389
5390 ieee_ex = get_float_exception_flags(&env->active_tc.msa_fp_status);
5391
5392 /* QEMU softfloat does not signal all underflow cases */
5393 if (denormal) {
5394 ieee_ex |= float_flag_underflow;
5395 }
5396
5397 c = ieee_ex_to_mips(ieee_ex);
5398 enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
5399
5400 /* Set Inexact (I) when flushing inputs to zero */
5401 if ((ieee_ex & float_flag_input_denormal) &&
5402 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
5403 if (action & CLEAR_IS_INEXACT) {
5404 c &= ~FP_INEXACT;
5405 } else {
5406 c |= FP_INEXACT;
5407 }
5408 }
5409
5410 /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
5411 if ((ieee_ex & float_flag_output_denormal) &&
5412 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
5413 c |= FP_INEXACT;
5414 if (action & CLEAR_FS_UNDERFLOW) {
5415 c &= ~FP_UNDERFLOW;
5416 } else {
5417 c |= FP_UNDERFLOW;
5418 }
5419 }
5420
5421 /* Set Inexact (I) when Overflow (O) is not enabled */
5422 if ((c & FP_OVERFLOW) != 0 && (enable & FP_OVERFLOW) == 0) {
5423 c |= FP_INEXACT;
5424 }
5425
5426 /* Clear Exact Underflow when Underflow (U) is not enabled */
5427 if ((c & FP_UNDERFLOW) != 0 && (enable & FP_UNDERFLOW) == 0 &&
5428 (c & FP_INEXACT) == 0) {
5429 c &= ~FP_UNDERFLOW;
5430 }
5431
5432 /*
5433 * Reciprocal operations set only Inexact when valid and not
5434 * divide by zero
5435 */
5436 if ((action & RECIPROCAL_INEXACT) &&
5437 (c & (FP_INVALID | FP_DIV0)) == 0) {
5438 c = FP_INEXACT;
5439 }
5440
5441 cause = c & enable; /* all current enabled exceptions */
5442
5443 if (cause == 0) {
5444 /*
5445 * No enabled exception, update the MSACSR Cause
5446 * with all current exceptions
5447 */
5448 SET_FP_CAUSE(env->active_tc.msacsr,
5449 (GET_FP_CAUSE(env->active_tc.msacsr) | c));
5450 } else {
5451 /* Current exceptions are enabled */
5452 if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
5453 /*
5454 * Exception(s) will trap, update MSACSR Cause
5455 * with all enabled exceptions
5456 */
5457 SET_FP_CAUSE(env->active_tc.msacsr,
5458 (GET_FP_CAUSE(env->active_tc.msacsr) | c));
5459 }
5460 }
5461
5462 return c;
5463 }
5464
5465 static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
5466 {
5467 int enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
5468 return c & enable;
5469 }
5470
5471 static inline float16 float16_from_float32(int32_t a, flag ieee,
5472 float_status *status)
5473 {
5474 float16 f_val;
5475
5476 f_val = float32_to_float16((float32)a, ieee, status);
5477
5478 return a < 0 ? (f_val | (1 << 15)) : f_val;
5479 }
5480
5481 static inline float32 float32_from_float64(int64_t a, float_status *status)
5482 {
5483 float32 f_val;
5484
5485 f_val = float64_to_float32((float64)a, status);
5486
5487 return a < 0 ? (f_val | (1 << 31)) : f_val;
5488 }
5489
5490 static inline float32 float32_from_float16(int16_t a, flag ieee,
5491 float_status *status)
5492 {
5493 float32 f_val;
5494
5495 f_val = float16_to_float32((float16)a, ieee, status);
5496
5497 return a < 0 ? (f_val | (1 << 31)) : f_val;
5498 }
5499
5500 static inline float64 float64_from_float32(int32_t a, float_status *status)
5501 {
5502 float64 f_val;
5503
5504 f_val = float32_to_float64((float64)a, status);
5505
5506 return a < 0 ? (f_val | (1ULL << 63)) : f_val;
5507 }
5508
5509 static inline float32 float32_from_q16(int16_t a, float_status *status)
5510 {
5511 float32 f_val;
5512
5513 /* conversion as integer and scaling */
5514 f_val = int32_to_float32(a, status);
5515 f_val = float32_scalbn(f_val, -15, status);
5516
5517 return f_val;
5518 }
5519
5520 static inline float64 float64_from_q32(int32_t a, float_status *status)
5521 {
5522 float64 f_val;
5523
5524 /* conversion as integer and scaling */
5525 f_val = int32_to_float64(a, status);
5526 f_val = float64_scalbn(f_val, -31, status);
5527
5528 return f_val;
5529 }
5530
5531 static inline int16_t float32_to_q16(float32 a, float_status *status)
5532 {
5533 int32_t q_val;
5534 int32_t q_min = 0xffff8000;
5535 int32_t q_max = 0x00007fff;
5536
5537 int ieee_ex;
5538
5539 if (float32_is_any_nan(a)) {
5540 float_raise(float_flag_invalid, status);
5541 return 0;
5542 }
5543
5544 /* scaling */
5545 a = float32_scalbn(a, 15, status);
5546
5547 ieee_ex = get_float_exception_flags(status);
5548 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
5549 , status);
5550
5551 if (ieee_ex & float_flag_overflow) {
5552 float_raise(float_flag_inexact, status);
5553 return (int32_t)a < 0 ? q_min : q_max;
5554 }
5555
5556 /* conversion to int */
5557 q_val = float32_to_int32(a, status);
5558
5559 ieee_ex = get_float_exception_flags(status);
5560 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
5561 , status);
5562
5563 if (ieee_ex & float_flag_invalid) {
5564 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
5565 , status);
5566 float_raise(float_flag_overflow | float_flag_inexact, status);
5567 return (int32_t)a < 0 ? q_min : q_max;
5568 }
5569
5570 if (q_val < q_min) {
5571 float_raise(float_flag_overflow | float_flag_inexact, status);
5572 return (int16_t)q_min;
5573 }
5574
5575 if (q_max < q_val) {
5576 float_raise(float_flag_overflow | float_flag_inexact, status);
5577 return (int16_t)q_max;
5578 }
5579
5580 return (int16_t)q_val;
5581 }
5582
5583 static inline int32_t float64_to_q32(float64 a, float_status *status)
5584 {
5585 int64_t q_val;
5586 int64_t q_min = 0xffffffff80000000LL;
5587 int64_t q_max = 0x000000007fffffffLL;
5588
5589 int ieee_ex;
5590
5591 if (float64_is_any_nan(a)) {
5592 float_raise(float_flag_invalid, status);
5593 return 0;
5594 }
5595
5596 /* scaling */
5597 a = float64_scalbn(a, 31, status);
5598
5599 ieee_ex = get_float_exception_flags(status);
5600 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
5601 , status);
5602
5603 if (ieee_ex & float_flag_overflow) {
5604 float_raise(float_flag_inexact, status);
5605 return (int64_t)a < 0 ? q_min : q_max;
5606 }
5607
5608 /* conversion to integer */
5609 q_val = float64_to_int64(a, status);
5610
5611 ieee_ex = get_float_exception_flags(status);
5612 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
5613 , status);
5614
5615 if (ieee_ex & float_flag_invalid) {
5616 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
5617 , status);
5618 float_raise(float_flag_overflow | float_flag_inexact, status);
5619 return (int64_t)a < 0 ? q_min : q_max;
5620 }
5621
5622 if (q_val < q_min) {
5623 float_raise(float_flag_overflow | float_flag_inexact, status);
5624 return (int32_t)q_min;
5625 }
5626
5627 if (q_max < q_val) {
5628 float_raise(float_flag_overflow | float_flag_inexact, status);
5629 return (int32_t)q_max;
5630 }
5631
5632 return (int32_t)q_val;
5633 }
5634
5635 #define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \
5636 do { \
5637 float_status *status = &env->active_tc.msa_fp_status; \
5638 int c; \
5639 int64_t cond; \
5640 set_float_exception_flags(0, status); \
5641 if (!QUIET) { \
5642 cond = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
5643 } else { \
5644 cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status); \
5645 } \
5646 DEST = cond ? M_MAX_UINT(BITS) : 0; \
5647 c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \
5648 \
5649 if (get_enabled_exceptions(env, c)) { \
5650 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
5651 } \
5652 } while (0)
5653
5654 #define MSA_FLOAT_AF(DEST, ARG1, ARG2, BITS, QUIET) \
5655 do { \
5656 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
5657 if ((DEST & M_MAX_UINT(BITS)) == M_MAX_UINT(BITS)) { \
5658 DEST = 0; \
5659 } \
5660 } while (0)
5661
5662 #define MSA_FLOAT_UEQ(DEST, ARG1, ARG2, BITS, QUIET) \
5663 do { \
5664 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
5665 if (DEST == 0) { \
5666 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
5667 } \
5668 } while (0)
5669
5670 #define MSA_FLOAT_NE(DEST, ARG1, ARG2, BITS, QUIET) \
5671 do { \
5672 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
5673 if (DEST == 0) { \
5674 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
5675 } \
5676 } while (0)
5677
5678 #define MSA_FLOAT_UNE(DEST, ARG1, ARG2, BITS, QUIET) \
5679 do { \
5680 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
5681 if (DEST == 0) { \
5682 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
5683 if (DEST == 0) { \
5684 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
5685 } \
5686 } \
5687 } while (0)
5688
5689 #define MSA_FLOAT_ULE(DEST, ARG1, ARG2, BITS, QUIET) \
5690 do { \
5691 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
5692 if (DEST == 0) { \
5693 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
5694 } \
5695 } while (0)
5696
5697 #define MSA_FLOAT_ULT(DEST, ARG1, ARG2, BITS, QUIET) \
5698 do { \
5699 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
5700 if (DEST == 0) { \
5701 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
5702 } \
5703 } while (0)
5704
5705 #define MSA_FLOAT_OR(DEST, ARG1, ARG2, BITS, QUIET) \
5706 do { \
5707 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
5708 if (DEST == 0) { \
5709 MSA_FLOAT_COND(DEST, le, ARG2, ARG1, BITS, QUIET); \
5710 } \
5711 } while (0)
5712
5713 static inline void compare_af(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5714 wr_t *pwt, uint32_t df, int quiet,
5715 uintptr_t retaddr)
5716 {
5717 wr_t wx, *pwx = &wx;
5718 uint32_t i;
5719
5720 clear_msacsr_cause(env);
5721
5722 switch (df) {
5723 case DF_WORD:
5724 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5725 MSA_FLOAT_AF(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
5726 }
5727 break;
5728 case DF_DOUBLE:
5729 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5730 MSA_FLOAT_AF(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
5731 }
5732 break;
5733 default:
5734 assert(0);
5735 }
5736
5737 check_msacsr_cause(env, retaddr);
5738
5739 msa_move_v(pwd, pwx);
5740 }
5741
5742 static inline void compare_un(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5743 wr_t *pwt, uint32_t df, int quiet,
5744 uintptr_t retaddr)
5745 {
5746 wr_t wx, *pwx = &wx;
5747 uint32_t i;
5748
5749 clear_msacsr_cause(env);
5750
5751 switch (df) {
5752 case DF_WORD:
5753 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5754 MSA_FLOAT_COND(pwx->w[i], unordered, pws->w[i], pwt->w[i], 32,
5755 quiet);
5756 }
5757 break;
5758 case DF_DOUBLE:
5759 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5760 MSA_FLOAT_COND(pwx->d[i], unordered, pws->d[i], pwt->d[i], 64,
5761 quiet);
5762 }
5763 break;
5764 default:
5765 assert(0);
5766 }
5767
5768 check_msacsr_cause(env, retaddr);
5769
5770 msa_move_v(pwd, pwx);
5771 }
5772
5773 static inline void compare_eq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5774 wr_t *pwt, uint32_t df, int quiet,
5775 uintptr_t retaddr)
5776 {
5777 wr_t wx, *pwx = &wx;
5778 uint32_t i;
5779
5780 clear_msacsr_cause(env);
5781
5782 switch (df) {
5783 case DF_WORD:
5784 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5785 MSA_FLOAT_COND(pwx->w[i], eq, pws->w[i], pwt->w[i], 32, quiet);
5786 }
5787 break;
5788 case DF_DOUBLE:
5789 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5790 MSA_FLOAT_COND(pwx->d[i], eq, pws->d[i], pwt->d[i], 64, quiet);
5791 }
5792 break;
5793 default:
5794 assert(0);
5795 }
5796
5797 check_msacsr_cause(env, retaddr);
5798
5799 msa_move_v(pwd, pwx);
5800 }
5801
5802 static inline void compare_ueq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5803 wr_t *pwt, uint32_t df, int quiet,
5804 uintptr_t retaddr)
5805 {
5806 wr_t wx, *pwx = &wx;
5807 uint32_t i;
5808
5809 clear_msacsr_cause(env);
5810
5811 switch (df) {
5812 case DF_WORD:
5813 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5814 MSA_FLOAT_UEQ(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
5815 }
5816 break;
5817 case DF_DOUBLE:
5818 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5819 MSA_FLOAT_UEQ(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
5820 }
5821 break;
5822 default:
5823 assert(0);
5824 }
5825
5826 check_msacsr_cause(env, retaddr);
5827
5828 msa_move_v(pwd, pwx);
5829 }
5830
5831 static inline void compare_lt(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5832 wr_t *pwt, uint32_t df, int quiet,
5833 uintptr_t retaddr)
5834 {
5835 wr_t wx, *pwx = &wx;
5836 uint32_t i;
5837
5838 clear_msacsr_cause(env);
5839
5840 switch (df) {
5841 case DF_WORD:
5842 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5843 MSA_FLOAT_COND(pwx->w[i], lt, pws->w[i], pwt->w[i], 32, quiet);
5844 }
5845 break;
5846 case DF_DOUBLE:
5847 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5848 MSA_FLOAT_COND(pwx->d[i], lt, pws->d[i], pwt->d[i], 64, quiet);
5849 }
5850 break;
5851 default:
5852 assert(0);
5853 }
5854
5855 check_msacsr_cause(env, retaddr);
5856
5857 msa_move_v(pwd, pwx);
5858 }
5859
5860 static inline void compare_ult(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5861 wr_t *pwt, uint32_t df, int quiet,
5862 uintptr_t retaddr)
5863 {
5864 wr_t wx, *pwx = &wx;
5865 uint32_t i;
5866
5867 clear_msacsr_cause(env);
5868
5869 switch (df) {
5870 case DF_WORD:
5871 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5872 MSA_FLOAT_ULT(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
5873 }
5874 break;
5875 case DF_DOUBLE:
5876 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5877 MSA_FLOAT_ULT(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
5878 }
5879 break;
5880 default:
5881 assert(0);
5882 }
5883
5884 check_msacsr_cause(env, retaddr);
5885
5886 msa_move_v(pwd, pwx);
5887 }
5888
5889 static inline void compare_le(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5890 wr_t *pwt, uint32_t df, int quiet,
5891 uintptr_t retaddr)
5892 {
5893 wr_t wx, *pwx = &wx;
5894 uint32_t i;
5895
5896 clear_msacsr_cause(env);
5897
5898 switch (df) {
5899 case DF_WORD:
5900 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5901 MSA_FLOAT_COND(pwx->w[i], le, pws->w[i], pwt->w[i], 32, quiet);
5902 }
5903 break;
5904 case DF_DOUBLE:
5905 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5906 MSA_FLOAT_COND(pwx->d[i], le, pws->d[i], pwt->d[i], 64, quiet);
5907 }
5908 break;
5909 default:
5910 assert(0);
5911 }
5912
5913 check_msacsr_cause(env, retaddr);
5914
5915 msa_move_v(pwd, pwx);
5916 }
5917
5918 static inline void compare_ule(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5919 wr_t *pwt, uint32_t df, int quiet,
5920 uintptr_t retaddr)
5921 {
5922 wr_t wx, *pwx = &wx;
5923 uint32_t i;
5924
5925 clear_msacsr_cause(env);
5926
5927 switch (df) {
5928 case DF_WORD:
5929 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5930 MSA_FLOAT_ULE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
5931 }
5932 break;
5933 case DF_DOUBLE:
5934 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5935 MSA_FLOAT_ULE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
5936 }
5937 break;
5938 default:
5939 assert(0);
5940 }
5941
5942 check_msacsr_cause(env, retaddr);
5943
5944 msa_move_v(pwd, pwx);
5945 }
5946
5947 static inline void compare_or(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5948 wr_t *pwt, uint32_t df, int quiet,
5949 uintptr_t retaddr)
5950 {
5951 wr_t wx, *pwx = &wx;
5952 uint32_t i;
5953
5954 clear_msacsr_cause(env);
5955
5956 switch (df) {
5957 case DF_WORD:
5958 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5959 MSA_FLOAT_OR(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
5960 }
5961 break;
5962 case DF_DOUBLE:
5963 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5964 MSA_FLOAT_OR(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
5965 }
5966 break;
5967 default:
5968 assert(0);
5969 }
5970
5971 check_msacsr_cause(env, retaddr);
5972
5973 msa_move_v(pwd, pwx);
5974 }
5975
5976 static inline void compare_une(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
5977 wr_t *pwt, uint32_t df, int quiet,
5978 uintptr_t retaddr)
5979 {
5980 wr_t wx, *pwx = &wx;
5981 uint32_t i;
5982
5983 clear_msacsr_cause(env);
5984
5985 switch (df) {
5986 case DF_WORD:
5987 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5988 MSA_FLOAT_UNE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
5989 }
5990 break;
5991 case DF_DOUBLE:
5992 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5993 MSA_FLOAT_UNE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
5994 }
5995 break;
5996 default:
5997 assert(0);
5998 }
5999
6000 check_msacsr_cause(env, retaddr);
6001
6002 msa_move_v(pwd, pwx);
6003 }
6004
6005 static inline void compare_ne(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6006 wr_t *pwt, uint32_t df, int quiet,
6007 uintptr_t retaddr)
6008 {
6009 wr_t wx, *pwx = &wx;
6010 uint32_t i;
6011
6012 clear_msacsr_cause(env);
6013
6014 switch (df) {
6015 case DF_WORD:
6016 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6017 MSA_FLOAT_NE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6018 }
6019 break;
6020 case DF_DOUBLE:
6021 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6022 MSA_FLOAT_NE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6023 }
6024 break;
6025 default:
6026 assert(0);
6027 }
6028
6029 check_msacsr_cause(env, retaddr);
6030
6031 msa_move_v(pwd, pwx);
6032 }
6033
6034 void helper_msa_fcaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6035 uint32_t ws, uint32_t wt)
6036 {
6037 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6038 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6039 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6040 compare_af(env, pwd, pws, pwt, df, 1, GETPC());
6041 }
6042
6043 void helper_msa_fcun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6044 uint32_t ws, uint32_t wt)
6045 {
6046 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6047 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6048 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6049 compare_un(env, pwd, pws, pwt, df, 1, GETPC());
6050 }
6051
6052 void helper_msa_fceq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6053 uint32_t ws, uint32_t wt)
6054 {
6055 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6056 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6057 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6058 compare_eq(env, pwd, pws, pwt, df, 1, GETPC());
6059 }
6060
6061 void helper_msa_fcueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6062 uint32_t ws, uint32_t wt)
6063 {
6064 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6065 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6066 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6067 compare_ueq(env, pwd, pws, pwt, df, 1, GETPC());
6068 }
6069
6070 void helper_msa_fclt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6071 uint32_t ws, uint32_t wt)
6072 {
6073 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6074 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6075 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6076 compare_lt(env, pwd, pws, pwt, df, 1, GETPC());
6077 }
6078
6079 void helper_msa_fcult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6080 uint32_t ws, uint32_t wt)
6081 {
6082 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6083 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6084 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6085 compare_ult(env, pwd, pws, pwt, df, 1, GETPC());
6086 }
6087
6088 void helper_msa_fcle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6089 uint32_t ws, uint32_t wt)
6090 {
6091 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6092 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6093 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6094 compare_le(env, pwd, pws, pwt, df, 1, GETPC());
6095 }
6096
6097 void helper_msa_fcule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6098 uint32_t ws, uint32_t wt)
6099 {
6100 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6101 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6102 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6103 compare_ule(env, pwd, pws, pwt, df, 1, GETPC());
6104 }
6105
6106 void helper_msa_fsaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6107 uint32_t ws, uint32_t wt)
6108 {
6109 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6110 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6111 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6112 compare_af(env, pwd, pws, pwt, df, 0, GETPC());
6113 }
6114
6115 void helper_msa_fsun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6116 uint32_t ws, uint32_t wt)
6117 {
6118 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6119 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6120 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6121 compare_un(env, pwd, pws, pwt, df, 0, GETPC());
6122 }
6123
6124 void helper_msa_fseq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6125 uint32_t ws, uint32_t wt)
6126 {
6127 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6128 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6129 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6130 compare_eq(env, pwd, pws, pwt, df, 0, GETPC());
6131 }
6132
6133 void helper_msa_fsueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6134 uint32_t ws, uint32_t wt)
6135 {
6136 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6137 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6138 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6139 compare_ueq(env, pwd, pws, pwt, df, 0, GETPC());
6140 }
6141
6142 void helper_msa_fslt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6143 uint32_t ws, uint32_t wt)
6144 {
6145 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6146 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6147 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6148 compare_lt(env, pwd, pws, pwt, df, 0, GETPC());
6149 }
6150
6151 void helper_msa_fsult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6152 uint32_t ws, uint32_t wt)
6153 {
6154 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6155 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6156 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6157 compare_ult(env, pwd, pws, pwt, df, 0, GETPC());
6158 }
6159
6160 void helper_msa_fsle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6161 uint32_t ws, uint32_t wt)
6162 {
6163 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6164 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6165 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6166 compare_le(env, pwd, pws, pwt, df, 0, GETPC());
6167 }
6168
6169 void helper_msa_fsule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6170 uint32_t ws, uint32_t wt)
6171 {
6172 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6173 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6174 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6175 compare_ule(env, pwd, pws, pwt, df, 0, GETPC());
6176 }
6177
6178 void helper_msa_fcor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6179 uint32_t ws, uint32_t wt)
6180 {
6181 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6182 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6183 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6184 compare_or(env, pwd, pws, pwt, df, 1, GETPC());
6185 }
6186
6187 void helper_msa_fcune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6188 uint32_t ws, uint32_t wt)
6189 {
6190 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6191 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6192 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6193 compare_une(env, pwd, pws, pwt, df, 1, GETPC());
6194 }
6195
6196 void helper_msa_fcne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6197 uint32_t ws, uint32_t wt)
6198 {
6199 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6200 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6201 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6202 compare_ne(env, pwd, pws, pwt, df, 1, GETPC());
6203 }
6204
6205 void helper_msa_fsor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6206 uint32_t ws, uint32_t wt)
6207 {
6208 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6209 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6210 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6211 compare_or(env, pwd, pws, pwt, df, 0, GETPC());
6212 }
6213
6214 void helper_msa_fsune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6215 uint32_t ws, uint32_t wt)
6216 {
6217 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6218 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6219 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6220 compare_une(env, pwd, pws, pwt, df, 0, GETPC());
6221 }
6222
6223 void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6224 uint32_t ws, uint32_t wt)
6225 {
6226 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6227 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6228 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6229 compare_ne(env, pwd, pws, pwt, df, 0, GETPC());
6230 }
6231
6232 #define float16_is_zero(ARG) 0
6233 #define float16_is_zero_or_denormal(ARG) 0
6234
6235 #define IS_DENORMAL(ARG, BITS) \
6236 (!float ## BITS ## _is_zero(ARG) \
6237 && float ## BITS ## _is_zero_or_denormal(ARG))
6238
6239 #define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \
6240 do { \
6241 float_status *status = &env->active_tc.msa_fp_status; \
6242 int c; \
6243 \
6244 set_float_exception_flags(0, status); \
6245 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
6246 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
6247 \
6248 if (get_enabled_exceptions(env, c)) { \
6249 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6250 } \
6251 } while (0)
6252
6253 void helper_msa_fadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6254 uint32_t ws, uint32_t wt)
6255 {
6256 wr_t wx, *pwx = &wx;
6257 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6258 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6259 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6260 uint32_t i;
6261
6262 clear_msacsr_cause(env);
6263
6264 switch (df) {
6265 case DF_WORD:
6266 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6267 MSA_FLOAT_BINOP(pwx->w[i], add, pws->w[i], pwt->w[i], 32);
6268 }
6269 break;
6270 case DF_DOUBLE:
6271 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6272 MSA_FLOAT_BINOP(pwx->d[i], add, pws->d[i], pwt->d[i], 64);
6273 }
6274 break;
6275 default:
6276 assert(0);
6277 }
6278
6279 check_msacsr_cause(env, GETPC());
6280 msa_move_v(pwd, pwx);
6281 }
6282
6283 void helper_msa_fsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6284 uint32_t ws, uint32_t wt)
6285 {
6286 wr_t wx, *pwx = &wx;
6287 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6288 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6289 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6290 uint32_t i;
6291
6292 clear_msacsr_cause(env);
6293
6294 switch (df) {
6295 case DF_WORD:
6296 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6297 MSA_FLOAT_BINOP(pwx->w[i], sub, pws->w[i], pwt->w[i], 32);
6298 }
6299 break;
6300 case DF_DOUBLE:
6301 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6302 MSA_FLOAT_BINOP(pwx->d[i], sub, pws->d[i], pwt->d[i], 64);
6303 }
6304 break;
6305 default:
6306 assert(0);
6307 }
6308
6309 check_msacsr_cause(env, GETPC());
6310 msa_move_v(pwd, pwx);
6311 }
6312
6313 void helper_msa_fmul_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6314 uint32_t ws, uint32_t wt)
6315 {
6316 wr_t wx, *pwx = &wx;
6317 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6318 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6319 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6320 uint32_t i;
6321
6322 clear_msacsr_cause(env);
6323
6324 switch (df) {
6325 case DF_WORD:
6326 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6327 MSA_FLOAT_BINOP(pwx->w[i], mul, pws->w[i], pwt->w[i], 32);
6328 }
6329 break;
6330 case DF_DOUBLE:
6331 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6332 MSA_FLOAT_BINOP(pwx->d[i], mul, pws->d[i], pwt->d[i], 64);
6333 }
6334 break;
6335 default:
6336 assert(0);
6337 }
6338
6339 check_msacsr_cause(env, GETPC());
6340
6341 msa_move_v(pwd, pwx);
6342 }
6343
6344 void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6345 uint32_t ws, uint32_t wt)
6346 {
6347 wr_t wx, *pwx = &wx;
6348 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6349 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6350 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6351 uint32_t i;
6352
6353 clear_msacsr_cause(env);
6354
6355 switch (df) {
6356 case DF_WORD:
6357 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6358 MSA_FLOAT_BINOP(pwx->w[i], div, pws->w[i], pwt->w[i], 32);
6359 }
6360 break;
6361 case DF_DOUBLE:
6362 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6363 MSA_FLOAT_BINOP(pwx->d[i], div, pws->d[i], pwt->d[i], 64);
6364 }
6365 break;
6366 default:
6367 assert(0);
6368 }
6369
6370 check_msacsr_cause(env, GETPC());
6371
6372 msa_move_v(pwd, pwx);
6373 }
6374
6375 #define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS) \
6376 do { \
6377 float_status *status = &env->active_tc.msa_fp_status; \
6378 int c; \
6379 \
6380 set_float_exception_flags(0, status); \
6381 DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status); \
6382 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
6383 \
6384 if (get_enabled_exceptions(env, c)) { \
6385 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6386 } \
6387 } while (0)
6388
6389 void helper_msa_fmadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6390 uint32_t ws, uint32_t wt)
6391 {
6392 wr_t wx, *pwx = &wx;
6393 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6394 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6395 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6396 uint32_t i;
6397
6398 clear_msacsr_cause(env);
6399
6400 switch (df) {
6401 case DF_WORD:
6402 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6403 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
6404 pws->w[i], pwt->w[i], 0, 32);
6405 }
6406 break;
6407 case DF_DOUBLE:
6408 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6409 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
6410 pws->d[i], pwt->d[i], 0, 64);
6411 }
6412 break;
6413 default:
6414 assert(0);
6415 }
6416
6417 check_msacsr_cause(env, GETPC());
6418
6419 msa_move_v(pwd, pwx);
6420 }
6421
6422 void helper_msa_fmsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6423 uint32_t ws, uint32_t wt)
6424 {
6425 wr_t wx, *pwx = &wx;
6426 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6427 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6428 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6429 uint32_t i;
6430
6431 clear_msacsr_cause(env);
6432
6433 switch (df) {
6434 case DF_WORD:
6435 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6436 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
6437 pws->w[i], pwt->w[i],
6438 float_muladd_negate_product, 32);
6439 }
6440 break;
6441 case DF_DOUBLE:
6442 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6443 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
6444 pws->d[i], pwt->d[i],
6445 float_muladd_negate_product, 64);
6446 }
6447 break;
6448 default:
6449 assert(0);
6450 }
6451
6452 check_msacsr_cause(env, GETPC());
6453
6454 msa_move_v(pwd, pwx);
6455 }
6456
6457 void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6458 uint32_t ws, uint32_t wt)
6459 {
6460 wr_t wx, *pwx = &wx;
6461 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6462 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6463 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6464 uint32_t i;
6465
6466 clear_msacsr_cause(env);
6467
6468 switch (df) {
6469 case DF_WORD:
6470 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6471 MSA_FLOAT_BINOP(pwx->w[i], scalbn, pws->w[i],
6472 pwt->w[i] > 0x200 ? 0x200 :
6473 pwt->w[i] < -0x200 ? -0x200 : pwt->w[i],
6474 32);
6475 }
6476 break;
6477 case DF_DOUBLE:
6478 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6479 MSA_FLOAT_BINOP(pwx->d[i], scalbn, pws->d[i],
6480 pwt->d[i] > 0x1000 ? 0x1000 :
6481 pwt->d[i] < -0x1000 ? -0x1000 : pwt->d[i],
6482 64);
6483 }
6484 break;
6485 default:
6486 assert(0);
6487 }
6488
6489 check_msacsr_cause(env, GETPC());
6490
6491 msa_move_v(pwd, pwx);
6492 }
6493
6494 #define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS) \
6495 do { \
6496 float_status *status = &env->active_tc.msa_fp_status; \
6497 int c; \
6498 \
6499 set_float_exception_flags(0, status); \
6500 DEST = float ## BITS ## _ ## OP(ARG, status); \
6501 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
6502 \
6503 if (get_enabled_exceptions(env, c)) { \
6504 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6505 } \
6506 } while (0)
6507
6508 void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6509 uint32_t ws, uint32_t wt)
6510 {
6511 wr_t wx, *pwx = &wx;
6512 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6513 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6514 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6515 uint32_t i;
6516
6517 clear_msacsr_cause(env);
6518
6519 switch (df) {
6520 case DF_WORD:
6521 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6522 /*
6523 * Half precision floats come in two formats: standard
6524 * IEEE and "ARM" format. The latter gains extra exponent
6525 * range by omitting the NaN/Inf encodings.
6526 */
6527 flag ieee = 1;
6528
6529 MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
6530 MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16);
6531 }
6532 break;
6533 case DF_DOUBLE:
6534 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6535 MSA_FLOAT_UNOP(Lw(pwx, i), from_float64, pws->d[i], 32);
6536 MSA_FLOAT_UNOP(Rw(pwx, i), from_float64, pwt->d[i], 32);
6537 }
6538 break;
6539 default:
6540 assert(0);
6541 }
6542
6543 check_msacsr_cause(env, GETPC());
6544 msa_move_v(pwd, pwx);
6545 }
6546
6547 #define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS) \
6548 do { \
6549 float_status *status = &env->active_tc.msa_fp_status; \
6550 int c; \
6551 \
6552 set_float_exception_flags(0, status); \
6553 DEST = float ## BITS ## _ ## OP(ARG, status); \
6554 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
6555 \
6556 if (get_enabled_exceptions(env, c)) { \
6557 DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c; \
6558 } \
6559 } while (0)
6560
6561 void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6562 uint32_t ws, uint32_t wt)
6563 {
6564 wr_t wx, *pwx = &wx;
6565 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6566 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6567 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6568 uint32_t i;
6569
6570 clear_msacsr_cause(env);
6571
6572 switch (df) {
6573 case DF_WORD:
6574 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6575 MSA_FLOAT_UNOP_XD(Lh(pwx, i), to_q16, pws->w[i], 32, 16);
6576 MSA_FLOAT_UNOP_XD(Rh(pwx, i), to_q16, pwt->w[i], 32, 16);
6577 }
6578 break;
6579 case DF_DOUBLE:
6580 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6581 MSA_FLOAT_UNOP_XD(Lw(pwx, i), to_q32, pws->d[i], 64, 32);
6582 MSA_FLOAT_UNOP_XD(Rw(pwx, i), to_q32, pwt->d[i], 64, 32);
6583 }
6584 break;
6585 default:
6586 assert(0);
6587 }
6588
6589 check_msacsr_cause(env, GETPC());
6590
6591 msa_move_v(pwd, pwx);
6592 }
6593
6594 #define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS) \
6595 !float ## BITS ## _is_any_nan(ARG1) \
6596 && float ## BITS ## _is_quiet_nan(ARG2, STATUS)
6597
6598 #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \
6599 do { \
6600 float_status *status = &env->active_tc.msa_fp_status; \
6601 int c; \
6602 \
6603 set_float_exception_flags(0, status); \
6604 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
6605 c = update_msacsr(env, 0, 0); \
6606 \
6607 if (get_enabled_exceptions(env, c)) { \
6608 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6609 } \
6610 } while (0)
6611
6612 #define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \
6613 do { \
6614 uint## BITS ##_t S = _S, T = _T; \
6615 uint## BITS ##_t as, at, xs, xt, xd; \
6616 if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \
6617 T = S; \
6618 } \
6619 else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) { \
6620 S = T; \
6621 } \
6622 as = float## BITS ##_abs(S); \
6623 at = float## BITS ##_abs(T); \
6624 MSA_FLOAT_MAXOP(xs, F, S, T, BITS); \
6625 MSA_FLOAT_MAXOP(xt, G, S, T, BITS); \
6626 MSA_FLOAT_MAXOP(xd, F, as, at, BITS); \
6627 X = (as == at || xd == float## BITS ##_abs(xs)) ? xs : xt; \
6628 } while (0)
6629
6630 void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6631 uint32_t ws, uint32_t wt)
6632 {
6633 float_status *status = &env->active_tc.msa_fp_status;
6634 wr_t wx, *pwx = &wx;
6635 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6636 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6637 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6638
6639 clear_msacsr_cause(env);
6640
6641 if (df == DF_WORD) {
6642
6643 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
6644 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pws->w[0], 32);
6645 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
6646 MSA_FLOAT_MAXOP(pwx->w[0], min, pwt->w[0], pwt->w[0], 32);
6647 } else {
6648 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pwt->w[0], 32);
6649 }
6650
6651 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
6652 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pws->w[1], 32);
6653 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
6654 MSA_FLOAT_MAXOP(pwx->w[1], min, pwt->w[1], pwt->w[1], 32);
6655 } else {
6656 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pwt->w[1], 32);
6657 }
6658
6659 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
6660 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pws->w[2], 32);
6661 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
6662 MSA_FLOAT_MAXOP(pwx->w[2], min, pwt->w[2], pwt->w[2], 32);
6663 } else {
6664 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pwt->w[2], 32);
6665 }
6666
6667 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
6668 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pws->w[3], 32);
6669 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
6670 MSA_FLOAT_MAXOP(pwx->w[3], min, pwt->w[3], pwt->w[3], 32);
6671 } else {
6672 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pwt->w[3], 32);
6673 }
6674
6675 } else if (df == DF_DOUBLE) {
6676
6677 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
6678 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pws->d[0], 64);
6679 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
6680 MSA_FLOAT_MAXOP(pwx->d[0], min, pwt->d[0], pwt->d[0], 64);
6681 } else {
6682 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pwt->d[0], 64);
6683 }
6684
6685 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
6686 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pws->d[1], 64);
6687 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
6688 MSA_FLOAT_MAXOP(pwx->d[1], min, pwt->d[1], pwt->d[1], 64);
6689 } else {
6690 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pwt->d[1], 64);
6691 }
6692
6693 } else {
6694
6695 assert(0);
6696
6697 }
6698
6699 check_msacsr_cause(env, GETPC());
6700
6701 msa_move_v(pwd, pwx);
6702 }
6703
6704 void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6705 uint32_t ws, uint32_t wt)
6706 {
6707 float_status *status = &env->active_tc.msa_fp_status;
6708 wr_t wx, *pwx = &wx;
6709 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6710 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6711 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6712
6713 clear_msacsr_cause(env);
6714
6715 if (df == DF_WORD) {
6716 FMAXMIN_A(min, max, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
6717 FMAXMIN_A(min, max, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
6718 FMAXMIN_A(min, max, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
6719 FMAXMIN_A(min, max, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
6720 } else if (df == DF_DOUBLE) {
6721 FMAXMIN_A(min, max, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
6722 FMAXMIN_A(min, max, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
6723 } else {
6724 assert(0);
6725 }
6726
6727 check_msacsr_cause(env, GETPC());
6728
6729 msa_move_v(pwd, pwx);
6730 }
6731
6732 void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6733 uint32_t ws, uint32_t wt)
6734 {
6735 float_status *status = &env->active_tc.msa_fp_status;
6736 wr_t wx, *pwx = &wx;
6737 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6738 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6739 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6740
6741 clear_msacsr_cause(env);
6742
6743 if (df == DF_WORD) {
6744
6745 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
6746 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pws->w[0], 32);
6747 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
6748 MSA_FLOAT_MAXOP(pwx->w[0], max, pwt->w[0], pwt->w[0], 32);
6749 } else {
6750 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pwt->w[0], 32);
6751 }
6752
6753 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
6754 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pws->w[1], 32);
6755 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
6756 MSA_FLOAT_MAXOP(pwx->w[1], max, pwt->w[1], pwt->w[1], 32);
6757 } else {
6758 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pwt->w[1], 32);
6759 }
6760
6761 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
6762 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pws->w[2], 32);
6763 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
6764 MSA_FLOAT_MAXOP(pwx->w[2], max, pwt->w[2], pwt->w[2], 32);
6765 } else {
6766 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pwt->w[2], 32);
6767 }
6768
6769 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
6770 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pws->w[3], 32);
6771 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
6772 MSA_FLOAT_MAXOP(pwx->w[3], max, pwt->w[3], pwt->w[3], 32);
6773 } else {
6774 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pwt->w[3], 32);
6775 }
6776
6777 } else if (df == DF_DOUBLE) {
6778
6779 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
6780 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pws->d[0], 64);
6781 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
6782 MSA_FLOAT_MAXOP(pwx->d[0], max, pwt->d[0], pwt->d[0], 64);
6783 } else {
6784 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pwt->d[0], 64);
6785 }
6786
6787 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
6788 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pws->d[1], 64);
6789 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
6790 MSA_FLOAT_MAXOP(pwx->d[1], max, pwt->d[1], pwt->d[1], 64);
6791 } else {
6792 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pwt->d[1], 64);
6793 }
6794
6795 } else {
6796
6797 assert(0);
6798
6799 }
6800
6801 check_msacsr_cause(env, GETPC());
6802
6803 msa_move_v(pwd, pwx);
6804 }
6805
6806 void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6807 uint32_t ws, uint32_t wt)
6808 {
6809 float_status *status = &env->active_tc.msa_fp_status;
6810 wr_t wx, *pwx = &wx;
6811 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6812 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6813 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6814
6815 clear_msacsr_cause(env);
6816
6817 if (df == DF_WORD) {
6818 FMAXMIN_A(max, min, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
6819 FMAXMIN_A(max, min, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
6820 FMAXMIN_A(max, min, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
6821 FMAXMIN_A(max, min, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
6822 } else if (df == DF_DOUBLE) {
6823 FMAXMIN_A(max, min, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
6824 FMAXMIN_A(max, min, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
6825 } else {
6826 assert(0);
6827 }
6828
6829 check_msacsr_cause(env, GETPC());
6830
6831 msa_move_v(pwd, pwx);
6832 }
6833
6834 void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
6835 uint32_t wd, uint32_t ws)
6836 {
6837 float_status *status = &env->active_tc.msa_fp_status;
6838
6839 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6840 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6841 if (df == DF_WORD) {
6842 pwd->w[0] = float_class_s(pws->w[0], status);
6843 pwd->w[1] = float_class_s(pws->w[1], status);
6844 pwd->w[2] = float_class_s(pws->w[2], status);
6845 pwd->w[3] = float_class_s(pws->w[3], status);
6846 } else if (df == DF_DOUBLE) {
6847 pwd->d[0] = float_class_d(pws->d[0], status);
6848 pwd->d[1] = float_class_d(pws->d[1], status);
6849 } else {
6850 assert(0);
6851 }
6852 }
6853
6854 #define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS) \
6855 do { \
6856 float_status *status = &env->active_tc.msa_fp_status; \
6857 int c; \
6858 \
6859 set_float_exception_flags(0, status); \
6860 DEST = float ## BITS ## _ ## OP(ARG, status); \
6861 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
6862 \
6863 if (get_enabled_exceptions(env, c)) { \
6864 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6865 } else if (float ## BITS ## _is_any_nan(ARG)) { \
6866 DEST = 0; \
6867 } \
6868 } while (0)
6869
6870 void helper_msa_ftrunc_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6871 uint32_t ws)
6872 {
6873 wr_t wx, *pwx = &wx;
6874 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6875 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6876 uint32_t i;
6877
6878 clear_msacsr_cause(env);
6879
6880 switch (df) {
6881 case DF_WORD:
6882 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6883 MSA_FLOAT_UNOP0(pwx->w[i], to_int32_round_to_zero, pws->w[i], 32);
6884 }
6885 break;
6886 case DF_DOUBLE:
6887 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6888 MSA_FLOAT_UNOP0(pwx->d[i], to_int64_round_to_zero, pws->d[i], 64);
6889 }
6890 break;
6891 default:
6892 assert(0);
6893 }
6894
6895 check_msacsr_cause(env, GETPC());
6896
6897 msa_move_v(pwd, pwx);
6898 }
6899
6900 void helper_msa_ftrunc_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6901 uint32_t ws)
6902 {
6903 wr_t wx, *pwx = &wx;
6904 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6905 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6906 uint32_t i;
6907
6908 clear_msacsr_cause(env);
6909
6910 switch (df) {
6911 case DF_WORD:
6912 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6913 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32_round_to_zero, pws->w[i], 32);
6914 }
6915 break;
6916 case DF_DOUBLE:
6917 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6918 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64_round_to_zero, pws->d[i], 64);
6919 }
6920 break;
6921 default:
6922 assert(0);
6923 }
6924
6925 check_msacsr_cause(env, GETPC());
6926
6927 msa_move_v(pwd, pwx);
6928 }
6929
6930 void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6931 uint32_t ws)
6932 {
6933 wr_t wx, *pwx = &wx;
6934 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6935 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6936 uint32_t i;
6937
6938 clear_msacsr_cause(env);
6939
6940 switch (df) {
6941 case DF_WORD:
6942 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6943 MSA_FLOAT_UNOP(pwx->w[i], sqrt, pws->w[i], 32);
6944 }
6945 break;
6946 case DF_DOUBLE:
6947 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6948 MSA_FLOAT_UNOP(pwx->d[i], sqrt, pws->d[i], 64);
6949 }
6950 break;
6951 default:
6952 assert(0);
6953 }
6954
6955 check_msacsr_cause(env, GETPC());
6956
6957 msa_move_v(pwd, pwx);
6958 }
6959
6960 #define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS) \
6961 do { \
6962 float_status *status = &env->active_tc.msa_fp_status; \
6963 int c; \
6964 \
6965 set_float_exception_flags(0, status); \
6966 DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \
6967 c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \
6968 float ## BITS ## _is_quiet_nan(DEST, status) ? \
6969 0 : RECIPROCAL_INEXACT, \
6970 IS_DENORMAL(DEST, BITS)); \
6971 \
6972 if (get_enabled_exceptions(env, c)) { \
6973 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6974 } \
6975 } while (0)
6976
6977 void helper_msa_frsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6978 uint32_t ws)
6979 {
6980 wr_t wx, *pwx = &wx;
6981 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6982 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6983 uint32_t i;
6984
6985 clear_msacsr_cause(env);
6986
6987 switch (df) {
6988 case DF_WORD:
6989 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6990 MSA_FLOAT_RECIPROCAL(pwx->w[i], float32_sqrt(pws->w[i],
6991 &env->active_tc.msa_fp_status), 32);
6992 }
6993 break;
6994 case DF_DOUBLE:
6995 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6996 MSA_FLOAT_RECIPROCAL(pwx->d[i], float64_sqrt(pws->d[i],
6997 &env->active_tc.msa_fp_status), 64);
6998 }
6999 break;
7000 default:
7001 assert(0);
7002 }
7003
7004 check_msacsr_cause(env, GETPC());
7005
7006 msa_move_v(pwd, pwx);
7007 }
7008
7009 void helper_msa_frcp_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7010 uint32_t ws)
7011 {
7012 wr_t wx, *pwx = &wx;
7013 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7014 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7015 uint32_t i;
7016
7017 clear_msacsr_cause(env);
7018
7019 switch (df) {
7020 case DF_WORD:
7021 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7022 MSA_FLOAT_RECIPROCAL(pwx->w[i], pws->w[i], 32);
7023 }
7024 break;
7025 case DF_DOUBLE:
7026 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7027 MSA_FLOAT_RECIPROCAL(pwx->d[i], pws->d[i], 64);
7028 }
7029 break;
7030 default:
7031 assert(0);
7032 }
7033
7034 check_msacsr_cause(env, GETPC());
7035
7036 msa_move_v(pwd, pwx);
7037 }
7038
7039 void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7040 uint32_t ws)
7041 {
7042 wr_t wx, *pwx = &wx;
7043 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7044 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7045 uint32_t i;
7046
7047 clear_msacsr_cause(env);
7048
7049 switch (df) {
7050 case DF_WORD:
7051 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7052 MSA_FLOAT_UNOP(pwx->w[i], round_to_int, pws->w[i], 32);
7053 }
7054 break;
7055 case DF_DOUBLE:
7056 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7057 MSA_FLOAT_UNOP(pwx->d[i], round_to_int, pws->d[i], 64);
7058 }
7059 break;
7060 default:
7061 assert(0);
7062 }
7063
7064 check_msacsr_cause(env, GETPC());
7065
7066 msa_move_v(pwd, pwx);
7067 }
7068
7069 #define MSA_FLOAT_LOGB(DEST, ARG, BITS) \
7070 do { \
7071 float_status *status = &env->active_tc.msa_fp_status; \
7072 int c; \
7073 \
7074 set_float_exception_flags(0, status); \
7075 set_float_rounding_mode(float_round_down, status); \
7076 DEST = float ## BITS ## _ ## log2(ARG, status); \
7077 DEST = float ## BITS ## _ ## round_to_int(DEST, status); \
7078 set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr & \
7079 MSACSR_RM_MASK) >> MSACSR_RM], \
7080 status); \
7081 \
7082 set_float_exception_flags(get_float_exception_flags(status) & \
7083 (~float_flag_inexact), \
7084 status); \
7085 \
7086 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7087 \
7088 if (get_enabled_exceptions(env, c)) { \
7089 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7090 } \
7091 } while (0)
7092
7093 void helper_msa_flog2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7094 uint32_t ws)
7095 {
7096 wr_t wx, *pwx = &wx;
7097 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7098 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7099 uint32_t i;
7100
7101 clear_msacsr_cause(env);
7102
7103 switch (df) {
7104 case DF_WORD:
7105 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7106 MSA_FLOAT_LOGB(pwx->w[i], pws->w[i], 32);
7107 }
7108 break;
7109 case DF_DOUBLE:
7110 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7111 MSA_FLOAT_LOGB(pwx->d[i], pws->d[i], 64);
7112 }
7113 break;
7114 default:
7115 assert(0);
7116 }
7117
7118 check_msacsr_cause(env, GETPC());
7119
7120 msa_move_v(pwd, pwx);
7121 }
7122
7123 void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7124 uint32_t ws)
7125 {
7126 wr_t wx, *pwx = &wx;
7127 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7128 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7129 uint32_t i;
7130
7131 clear_msacsr_cause(env);
7132
7133 switch (df) {
7134 case DF_WORD:
7135 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7136 /*
7137 * Half precision floats come in two formats: standard
7138 * IEEE and "ARM" format. The latter gains extra exponent
7139 * range by omitting the NaN/Inf encodings.
7140 */
7141 flag ieee = 1;
7142
7143 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
7144 }
7145 break;
7146 case DF_DOUBLE:
7147 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7148 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Lw(pws, i), 64);
7149 }
7150 break;
7151 default:
7152 assert(0);
7153 }
7154
7155 check_msacsr_cause(env, GETPC());
7156 msa_move_v(pwd, pwx);
7157 }
7158
7159 void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7160 uint32_t ws)
7161 {
7162 wr_t wx, *pwx = &wx;
7163 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7164 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7165 uint32_t i;
7166
7167 clear_msacsr_cause(env);
7168
7169 switch (df) {
7170 case DF_WORD:
7171 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7172 /*
7173 * Half precision floats come in two formats: standard
7174 * IEEE and "ARM" format. The latter gains extra exponent
7175 * range by omitting the NaN/Inf encodings.
7176 */
7177 flag ieee = 1;
7178
7179 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);
7180 }
7181 break;
7182 case DF_DOUBLE:
7183 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7184 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Rw(pws, i), 64);
7185 }
7186 break;
7187 default:
7188 assert(0);
7189 }
7190
7191 check_msacsr_cause(env, GETPC());
7192 msa_move_v(pwd, pwx);
7193 }
7194
7195 void helper_msa_ffql_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7196 uint32_t ws)
7197 {
7198 wr_t wx, *pwx = &wx;
7199 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7200 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7201 uint32_t i;
7202
7203 switch (df) {
7204 case DF_WORD:
7205 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7206 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Lh(pws, i), 32);
7207 }
7208 break;
7209 case DF_DOUBLE:
7210 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7211 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Lw(pws, i), 64);
7212 }
7213 break;
7214 default:
7215 assert(0);
7216 }
7217
7218 msa_move_v(pwd, pwx);
7219 }
7220
7221 void helper_msa_ffqr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7222 uint32_t ws)
7223 {
7224 wr_t wx, *pwx = &wx;
7225 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7226 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7227 uint32_t i;
7228
7229 switch (df) {
7230 case DF_WORD:
7231 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7232 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Rh(pws, i), 32);
7233 }
7234 break;
7235 case DF_DOUBLE:
7236 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7237 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Rw(pws, i), 64);
7238 }
7239 break;
7240 default:
7241 assert(0);
7242 }
7243
7244 msa_move_v(pwd, pwx);
7245 }
7246
7247 void helper_msa_ftint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7248 uint32_t ws)
7249 {
7250 wr_t wx, *pwx = &wx;
7251 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7252 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7253 uint32_t i;
7254
7255 clear_msacsr_cause(env);
7256
7257 switch (df) {
7258 case DF_WORD:
7259 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7260 MSA_FLOAT_UNOP0(pwx->w[i], to_int32, pws->w[i], 32);
7261 }
7262 break;
7263 case DF_DOUBLE:
7264 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7265 MSA_FLOAT_UNOP0(pwx->d[i], to_int64, pws->d[i], 64);
7266 }
7267 break;
7268 default:
7269 assert(0);
7270 }
7271
7272 check_msacsr_cause(env, GETPC());
7273
7274 msa_move_v(pwd, pwx);
7275 }
7276
7277 void helper_msa_ftint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7278 uint32_t ws)
7279 {
7280 wr_t wx, *pwx = &wx;
7281 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7282 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7283 uint32_t i;
7284
7285 clear_msacsr_cause(env);
7286
7287 switch (df) {
7288 case DF_WORD:
7289 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7290 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32, pws->w[i], 32);
7291 }
7292 break;
7293 case DF_DOUBLE:
7294 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7295 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64, pws->d[i], 64);
7296 }
7297 break;
7298 default:
7299 assert(0);
7300 }
7301
7302 check_msacsr_cause(env, GETPC());
7303
7304 msa_move_v(pwd, pwx);
7305 }
7306
7307 #define float32_from_int32 int32_to_float32
7308 #define float32_from_uint32 uint32_to_float32
7309
7310 #define float64_from_int64 int64_to_float64
7311 #define float64_from_uint64 uint64_to_float64
7312
7313 void helper_msa_ffint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7314 uint32_t ws)
7315 {
7316 wr_t wx, *pwx = &wx;
7317 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7318 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7319 uint32_t i;
7320
7321 clear_msacsr_cause(env);
7322
7323 switch (df) {
7324 case DF_WORD:
7325 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7326 MSA_FLOAT_UNOP(pwx->w[i], from_int32, pws->w[i], 32);
7327 }
7328 break;
7329 case DF_DOUBLE:
7330 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7331 MSA_FLOAT_UNOP(pwx->d[i], from_int64, pws->d[i], 64);
7332 }
7333 break;
7334 default:
7335 assert(0);
7336 }
7337
7338 check_msacsr_cause(env, GETPC());
7339
7340 msa_move_v(pwd, pwx);
7341 }
7342
7343 void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7344 uint32_t ws)
7345 {
7346 wr_t wx, *pwx = &wx;
7347 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7348 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7349 uint32_t i;
7350
7351 clear_msacsr_cause(env);
7352
7353 switch (df) {
7354 case DF_WORD:
7355 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7356 MSA_FLOAT_UNOP(pwx->w[i], from_uint32, pws->w[i], 32);
7357 }
7358 break;
7359 case DF_DOUBLE:
7360 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7361 MSA_FLOAT_UNOP(pwx->d[i], from_uint64, pws->d[i], 64);
7362 }
7363 break;
7364 default:
7365 assert(0);
7366 }
7367
7368 check_msacsr_cause(env, GETPC());
7369
7370 msa_move_v(pwd, pwx);
7371 }
AR7 emulation for QEMU