hw/misc/ivshmem.c

   1 /*
   2  * Inter-VM Shared Memory PCI device.
   3  *
   4  * Author:
   5  *      Cam Macdonell <cam@cs.ualberta.ca>
   6  *
   7  * Based On: cirrus_vga.c
   8  *          Copyright (c) 2004 Fabrice Bellard
   9  *          Copyright (c) 2004 Makoto Suzuki (suzu)
  10  *
  11  *      and rtl8139.c
  12  *          Copyright (c) 2006 Igor Kovalenko
  13  *
  14  * This code is licensed under the GNU GPL v2.
  15  *
  16  * Contributions after 2012-01-13 are licensed under the terms of the
  17  * GNU GPL, version 2 or (at your option) any later version.
  18  */
  19 #include "qemu/osdep.h"
  20 #include "qapi/error.h"
  21 #include "qemu/cutils.h"
  22 #include "hw/hw.h"
  23 #include "hw/i386/pc.h"
  24 #include "hw/pci/pci.h"
  25 #include "hw/pci/msi.h"
  26 #include "hw/pci/msix.h"
  27 #include "sysemu/kvm.h"
  28 #include "migration/migration.h"
  29 #include "qemu/error-report.h"
  30 #include "qemu/event_notifier.h"
  31 #include "qemu/fifo8.h"
  32 #include "sysemu/char.h"
  33 #include "sysemu/hostmem.h"
  34 #include "qapi/visitor.h"
  35 #include "exec/ram_addr.h"
  36
  37 #include "hw/misc/ivshmem.h"
  38
  39 #include <sys/mman.h>
  40
  41 #define PCI_VENDOR_ID_IVSHMEM   PCI_VENDOR_ID_REDHAT_QUMRANET
  42 #define PCI_DEVICE_ID_IVSHMEM   0x1110
  43
  44 #define IVSHMEM_MAX_PEERS G_MAXUINT16
  45 #define IVSHMEM_IOEVENTFD   0
  46 #define IVSHMEM_MSI     1
  47
  48 #define IVSHMEM_PEER    0
  49 #define IVSHMEM_MASTER  1
  50
  51 #define IVSHMEM_REG_BAR_SIZE 0x100
  52
  53 //#define DEBUG_IVSHMEM
  54 #ifdef DEBUG_IVSHMEM
  55 #define IVSHMEM_DPRINTF(fmt, ...)        \
  56     do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0)
  57 #else
  58 #define IVSHMEM_DPRINTF(fmt, ...)
  59 #endif
  60
  61 #define TYPE_IVSHMEM "ivshmem"
  62 #define IVSHMEM(obj) \
  63     OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
  64
  65 typedef struct Peer {
  66     int nb_eventfds;
  67     EventNotifier *eventfds;
  68 } Peer;
  69
  70 typedef struct MSIVector {
  71     PCIDevice *pdev;
  72     int virq;
  73 } MSIVector;
  74
  75 typedef struct IVShmemState {
  76     /*< private >*/
  77     PCIDevice parent_obj;
  78     /*< public >*/
  79
  80     HostMemoryBackend *hostmem;
  81     uint32_t intrmask;
  82     uint32_t intrstatus;
  83
  84     CharDriverState **eventfd_chr;
  85     CharDriverState *server_chr;
  86     Fifo8 incoming_fifo;
  87     MemoryRegion ivshmem_mmio;
  88
  89     /* We might need to register the BAR before we actually have the memory.
  90      * So prepare a container MemoryRegion for the BAR immediately and
  91      * add a subregion when we have the memory.
  92      */
  93     MemoryRegion bar;
  94     MemoryRegion ivshmem;
  95     uint64_t ivshmem_size; /* size of shared memory region */
  96     uint32_t ivshmem_64bit;
  97
  98     Peer *peers;
  99     int nb_peers; /* how many peers we have space for */
 100
 101     int vm_id;
 102     uint32_t vectors;
 103     uint32_t features;
 104     MSIVector *msi_vectors;
 105
 106     Error *migration_blocker;
 107
 108     char * shmobj;
 109     char * sizearg;
 110     char * role;
 111     int role_val;   /* scalar to avoid multiple string comparisons */
 112 } IVShmemState;
 113
 114 /* registers for the Inter-VM shared memory device */
 115 enum ivshmem_registers {
 116     INTRMASK = 0,
 117     INTRSTATUS = 4,
 118     IVPOSITION = 8,
 119     DOORBELL = 12,
 120 };
 121
 122 static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
 123                                                     unsigned int feature) {
 124     return (ivs->features & (1 << feature));
 125 }
 126
 127 /* accessing registers - based on rtl8139 */
 128 static void ivshmem_update_irq(IVShmemState *s)
 129 {
 130     PCIDevice *d = PCI_DEVICE(s);
 131     int isr;
 132     isr = (s->intrstatus & s->intrmask) & 0xffffffff;
 133
 134     /* don't print ISR resets */
 135     if (isr) {
 136         IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
 137                         isr ? 1 : 0, s->intrstatus, s->intrmask);
 138     }
 139
 140     pci_set_irq(d, (isr != 0));
 141 }
 142
 143 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
 144 {
 145     IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
 146
 147     s->intrmask = val;
 148
 149     ivshmem_update_irq(s);
 150 }
 151
 152 static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
 153 {
 154     uint32_t ret = s->intrmask;
 155
 156     IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
 157
 158     return ret;
 159 }
 160
 161 static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
 162 {
 163     IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
 164
 165     s->intrstatus = val;
 166
 167     ivshmem_update_irq(s);
 168 }
 169
 170 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
 171 {
 172     uint32_t ret = s->intrstatus;
 173
 174     /* reading ISR clears all interrupts */
 175     s->intrstatus = 0;
 176
 177     ivshmem_update_irq(s);
 178
 179     return ret;
 180 }
 181
 182 static void ivshmem_io_write(void *opaque, hwaddr addr,
 183                              uint64_t val, unsigned size)
 184 {
 185     IVShmemState *s = opaque;
 186
 187     uint16_t dest = val >> 16;
 188     uint16_t vector = val & 0xff;
 189
 190     addr &= 0xfc;
 191
 192     IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
 193     switch (addr)
 194     {
 195         case INTRMASK:
 196             ivshmem_IntrMask_write(s, val);
 197             break;
 198
 199         case INTRSTATUS:
 200             ivshmem_IntrStatus_write(s, val);
 201             break;
 202
 203         case DOORBELL:
 204             /* check that dest VM ID is reasonable */
 205             if (dest >= s->nb_peers) {
 206                 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
 207                 break;
 208             }
 209
 210             /* check doorbell range */
 211             if (vector < s->peers[dest].nb_eventfds) {
 212                 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
 213                 event_notifier_set(&s->peers[dest].eventfds[vector]);
 214             } else {
 215                 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
 216                                 vector, dest);
 217             }
 218             break;
 219         default:
 220             IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr);
 221     }
 222 }
 223
 224 static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
 225                                 unsigned size)
 226 {
 227
 228     IVShmemState *s = opaque;
 229     uint32_t ret;
 230
 231     switch (addr)
 232     {
 233         case INTRMASK:
 234             ret = ivshmem_IntrMask_read(s);
 235             break;
 236
 237         case INTRSTATUS:
 238             ret = ivshmem_IntrStatus_read(s);
 239             break;
 240
 241         case IVPOSITION:
 242             /* return my VM ID if the memory is mapped */
 243             if (memory_region_is_mapped(&s->ivshmem)) {
 244                 ret = s->vm_id;
 245             } else {
 246                 ret = -1;
 247             }
 248             break;
 249
 250         default:
 251             IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
 252             ret = 0;
 253     }
 254
 255     return ret;
 256 }
 257
 258 static const MemoryRegionOps ivshmem_mmio_ops = {
 259     .read = ivshmem_io_read,
 260     .write = ivshmem_io_write,
 261     .endianness = DEVICE_NATIVE_ENDIAN,
 262     .impl = {
 263         .min_access_size = 4,
 264         .max_access_size = 4,
 265     },
 266 };
 267
 268 static int ivshmem_can_receive(void * opaque)
 269 {
 270     return sizeof(int64_t);
 271 }
 272
 273 static void ivshmem_event(void *opaque, int event)
 274 {
 275     IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
 276 }
 277
 278 static void ivshmem_vector_notify(void *opaque)
 279 {
 280     MSIVector *entry = opaque;
 281     PCIDevice *pdev = entry->pdev;
 282     IVShmemState *s = IVSHMEM(pdev);
 283     int vector = entry - s->msi_vectors;
 284     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 285
 286     if (!event_notifier_test_and_clear(n)) {
 287         return;
 288     }
 289
 290     IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector);
 291     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 292         msix_notify(pdev, vector);
 293     } else {
 294         ivshmem_IntrStatus_write(s, 1);
 295     }
 296 }
 297
 298 static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector,
 299                                  MSIMessage msg)
 300 {
 301     IVShmemState *s = IVSHMEM(dev);
 302     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 303     MSIVector *v = &s->msi_vectors[vector];
 304     int ret;
 305
 306     IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector);
 307
 308     ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev);
 309     if (ret < 0) {
 310         return ret;
 311     }
 312
 313     return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq);
 314 }
 315
 316 static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector)
 317 {
 318     IVShmemState *s = IVSHMEM(dev);
 319     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 320     int ret;
 321
 322     IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector);
 323
 324     ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n,
 325                                                 s->msi_vectors[vector].virq);
 326     if (ret != 0) {
 327         error_report("remove_irqfd_notifier_gsi failed");
 328     }
 329 }
 330
 331 static void ivshmem_vector_poll(PCIDevice *dev,
 332                                 unsigned int vector_start,
 333                                 unsigned int vector_end)
 334 {
 335     IVShmemState *s = IVSHMEM(dev);
 336     unsigned int vector;
 337
 338     IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end);
 339
 340     vector_end = MIN(vector_end, s->vectors);
 341
 342     for (vector = vector_start; vector < vector_end; vector++) {
 343         EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector];
 344
 345         if (!msix_is_masked(dev, vector)) {
 346             continue;
 347         }
 348
 349         if (event_notifier_test_and_clear(notifier)) {
 350             msix_set_pending(dev, vector);
 351         }
 352     }
 353 }
 354
 355 static void watch_vector_notifier(IVShmemState *s, EventNotifier *n,
 356                                  int vector)
 357 {
 358     int eventfd = event_notifier_get_fd(n);
 359
 360     /* if MSI is supported we need multiple interrupts */
 361     s->msi_vectors[vector].pdev = PCI_DEVICE(s);
 362
 363     qemu_set_fd_handler(eventfd, ivshmem_vector_notify,
 364                         NULL, &s->msi_vectors[vector]);
 365 }
 366
 367 static int check_shm_size(IVShmemState *s, int fd, Error **errp)
 368 {
 369     /* check that the guest isn't going to try and map more memory than the
 370      * the object has allocated return -1 to indicate error */
 371
 372     struct stat buf;
 373
 374     if (fstat(fd, &buf) < 0) {
 375         error_setg(errp, "exiting: fstat on fd %d failed: %s",
 376                    fd, strerror(errno));
 377         return -1;
 378     }
 379
 380     if (s->ivshmem_size > buf.st_size) {
 381         error_setg(errp, "Requested memory size greater"
 382                    " than shared object size (%" PRIu64 " > %" PRIu64")",
 383                    s->ivshmem_size, (uint64_t)buf.st_size);
 384         return -1;
 385     } else {
 386         return 0;
 387     }
 388 }
 389
 390 /* create the shared memory BAR when we are not using the server, so we can
 391  * create the BAR and map the memory immediately */
 392 static int create_shared_memory_BAR(IVShmemState *s, int fd, uint8_t attr,
 393                                     Error **errp)
 394 {
 395     void * ptr;
 396
 397     ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
 398     if (ptr == MAP_FAILED) {
 399         error_setg_errno(errp, errno, "Failed to mmap shared memory");
 400         return -1;
 401     }
 402
 403     memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s), "ivshmem.bar2",
 404                                s->ivshmem_size, ptr);
 405     qemu_set_ram_fd(memory_region_get_ram_addr(&s->ivshmem), fd);
 406     vmstate_register_ram(&s->ivshmem, DEVICE(s));
 407     memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
 408
 409     /* region for shared memory */
 410     pci_register_bar(PCI_DEVICE(s), 2, attr, &s->bar);
 411
 412     return 0;
 413 }
 414
 415 static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
 416 {
 417     memory_region_add_eventfd(&s->ivshmem_mmio,
 418                               DOORBELL,
 419                               4,
 420                               true,
 421                               (posn << 16) | i,
 422                               &s->peers[posn].eventfds[i]);
 423 }
 424
 425 static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
 426 {
 427     memory_region_del_eventfd(&s->ivshmem_mmio,
 428                               DOORBELL,
 429                               4,
 430                               true,
 431                               (posn << 16) | i,
 432                               &s->peers[posn].eventfds[i]);
 433 }
 434
 435 static void close_peer_eventfds(IVShmemState *s, int posn)
 436 {
 437     int i, n;
 438
 439     if (!ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
 440         return;
 441     }
 442     if (posn < 0 || posn >= s->nb_peers) {
 443         error_report("invalid peer %d", posn);
 444         return;
 445     }
 446
 447     n = s->peers[posn].nb_eventfds;
 448
 449     memory_region_transaction_begin();
 450     for (i = 0; i < n; i++) {
 451         ivshmem_del_eventfd(s, posn, i);
 452     }
 453     memory_region_transaction_commit();
 454     for (i = 0; i < n; i++) {
 455         event_notifier_cleanup(&s->peers[posn].eventfds[i]);
 456     }
 457
 458     g_free(s->peers[posn].eventfds);
 459     s->peers[posn].nb_eventfds = 0;
 460 }
 461
 462 /* this function increase the dynamic storage need to store data about other
 463  * peers */
 464 static int resize_peers(IVShmemState *s, int new_min_size)
 465 {
 466
 467     int j, old_size;
 468
 469     /* limit number of max peers */
 470     if (new_min_size <= 0 || new_min_size > IVSHMEM_MAX_PEERS) {
 471         return -1;
 472     }
 473     if (new_min_size <= s->nb_peers) {
 474         return 0;
 475     }
 476
 477     old_size = s->nb_peers;
 478     s->nb_peers = new_min_size;
 479
 480     IVSHMEM_DPRINTF("bumping storage to %d peers\n", s->nb_peers);
 481
 482     s->peers = g_realloc(s->peers, s->nb_peers * sizeof(Peer));
 483
 484     for (j = old_size; j < s->nb_peers; j++) {
 485         s->peers[j].eventfds = g_new0(EventNotifier, s->vectors);
 486         s->peers[j].nb_eventfds = 0;
 487     }
 488
 489     return 0;
 490 }
 491
 492 static bool fifo_update_and_get(IVShmemState *s, const uint8_t *buf, int size,
 493                                 void *data, size_t len)
 494 {
 495     const uint8_t *p;
 496     uint32_t num;
 497
 498     assert(len <= sizeof(int64_t)); /* limitation of the fifo */
 499     if (fifo8_is_empty(&s->incoming_fifo) && size == len) {
 500         memcpy(data, buf, size);
 501         return true;
 502     }
 503
 504     IVSHMEM_DPRINTF("short read of %d bytes\n", size);
 505
 506     num = MIN(size, sizeof(int64_t) - fifo8_num_used(&s->incoming_fifo));
 507     fifo8_push_all(&s->incoming_fifo, buf, num);
 508
 509     if (fifo8_num_used(&s->incoming_fifo) < len) {
 510         assert(num == 0);
 511         return false;
 512     }
 513
 514     size -= num;
 515     buf += num;
 516     p = fifo8_pop_buf(&s->incoming_fifo, len, &num);
 517     assert(num == len);
 518
 519     memcpy(data, p, len);
 520
 521     if (size > 0) {
 522         fifo8_push_all(&s->incoming_fifo, buf, size);
 523     }
 524
 525     return true;
 526 }
 527
 528 static bool fifo_update_and_get_i64(IVShmemState *s,
 529                                     const uint8_t *buf, int size, int64_t *i64)
 530 {
 531     if (fifo_update_and_get(s, buf, size, i64, sizeof(*i64))) {
 532         *i64 = GINT64_FROM_LE(*i64);
 533         return true;
 534     }
 535
 536     return false;
 537 }
 538
 539 static int ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector)
 540 {
 541     PCIDevice *pdev = PCI_DEVICE(s);
 542     MSIMessage msg = msix_get_message(pdev, vector);
 543     int ret;
 544
 545     IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector);
 546
 547     if (s->msi_vectors[vector].pdev != NULL) {
 548         return 0;
 549     }
 550
 551     ret = kvm_irqchip_add_msi_route(kvm_state, msg, pdev);
 552     if (ret < 0) {
 553         error_report("ivshmem: kvm_irqchip_add_msi_route failed");
 554         return -1;
 555     }
 556
 557     s->msi_vectors[vector].virq = ret;
 558     s->msi_vectors[vector].pdev = pdev;
 559
 560     return 0;
 561 }
 562
 563 static void setup_interrupt(IVShmemState *s, int vector)
 564 {
 565     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 566     bool with_irqfd = kvm_msi_via_irqfd_enabled() &&
 567         ivshmem_has_feature(s, IVSHMEM_MSI);
 568     PCIDevice *pdev = PCI_DEVICE(s);
 569
 570     IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector);
 571
 572     if (!with_irqfd) {
 573         IVSHMEM_DPRINTF("with eventfd");
 574         watch_vector_notifier(s, n, vector);
 575     } else if (msix_enabled(pdev)) {
 576         IVSHMEM_DPRINTF("with irqfd");
 577         if (ivshmem_add_kvm_msi_virq(s, vector) < 0) {
 578             return;
 579         }
 580
 581         if (!msix_is_masked(pdev, vector)) {
 582             kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL,
 583                                                s->msi_vectors[vector].virq);
 584         }
 585     } else {
 586         /* it will be delayed until msix is enabled, in write_config */
 587         IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled");
 588     }
 589 }
 590
 591 static void ivshmem_read(void *opaque, const uint8_t *buf, int size)
 592 {
 593     IVShmemState *s = opaque;
 594     int incoming_fd;
 595     int new_eventfd;
 596     int64_t incoming_posn;
 597     Error *err = NULL;
 598     Peer *peer;
 599
 600     if (!fifo_update_and_get_i64(s, buf, size, &incoming_posn)) {
 601         return;
 602     }
 603
 604     if (incoming_posn < -1) {
 605         IVSHMEM_DPRINTF("invalid incoming_posn %" PRId64 "\n", incoming_posn);
 606         return;
 607     }
 608
 609     /* pick off s->server_chr->msgfd and store it, posn should accompany msg */
 610     incoming_fd = qemu_chr_fe_get_msgfd(s->server_chr);
 611     IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n",
 612                     incoming_posn, incoming_fd);
 613
 614     /* make sure we have enough space for this peer */
 615     if (incoming_posn >= s->nb_peers) {
 616         if (resize_peers(s, incoming_posn + 1) < 0) {
 617             error_report("failed to resize peers array");
 618             if (incoming_fd != -1) {
 619                 close(incoming_fd);
 620             }
 621             return;
 622         }
 623     }
 624
 625     peer = &s->peers[incoming_posn];
 626
 627     if (incoming_fd == -1) {
 628         /* if posn is positive and unseen before then this is our posn*/
 629         if (incoming_posn >= 0 && s->vm_id == -1) {
 630             /* receive our posn */
 631             s->vm_id = incoming_posn;
 632         } else {
 633             /* otherwise an fd == -1 means an existing peer has gone away */
 634             IVSHMEM_DPRINTF("posn %" PRId64 " has gone away\n", incoming_posn);
 635             close_peer_eventfds(s, incoming_posn);
 636         }
 637         return;
 638     }
 639
 640     /* if the position is -1, then it's shared memory region fd */
 641     if (incoming_posn == -1) {
 642         void * map_ptr;
 643
 644         if (memory_region_is_mapped(&s->ivshmem)) {
 645             error_report("shm already initialized");
 646             close(incoming_fd);
 647             return;
 648         }
 649
 650         if (check_shm_size(s, incoming_fd, &err) == -1) {
 651             error_report_err(err);
 652             close(incoming_fd);
 653             return;
 654         }
 655
 656         /* mmap the region and map into the BAR2 */
 657         map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
 658                                                             incoming_fd, 0);
 659         if (map_ptr == MAP_FAILED) {
 660             error_report("Failed to mmap shared memory %s", strerror(errno));
 661             close(incoming_fd);
 662             return;
 663         }
 664         memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s),
 665                                    "ivshmem.bar2", s->ivshmem_size, map_ptr);
 666         qemu_set_ram_fd(memory_region_get_ram_addr(&s->ivshmem),
 667                         incoming_fd);
 668         vmstate_register_ram(&s->ivshmem, DEVICE(s));
 669
 670         IVSHMEM_DPRINTF("guest h/w addr = %p, size = %" PRIu64 "\n",
 671                         map_ptr, s->ivshmem_size);
 672
 673         memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
 674
 675         return;
 676     }
 677
 678     /* each peer has an associated array of eventfds, and we keep
 679      * track of how many eventfds received so far */
 680     /* get a new eventfd: */
 681     if (peer->nb_eventfds >= s->vectors) {
 682         error_report("Too many eventfd received, device has %d vectors",
 683                      s->vectors);
 684         close(incoming_fd);
 685         return;
 686     }
 687
 688     new_eventfd = peer->nb_eventfds++;
 689
 690     /* this is an eventfd for a particular peer VM */
 691     IVSHMEM_DPRINTF("eventfds[%" PRId64 "][%d] = %d\n", incoming_posn,
 692                     new_eventfd, incoming_fd);
 693     event_notifier_init_fd(&peer->eventfds[new_eventfd], incoming_fd);
 694     fcntl_setfl(incoming_fd, O_NONBLOCK); /* msix/irqfd poll non block */
 695
 696     if (incoming_posn == s->vm_id) {
 697         setup_interrupt(s, new_eventfd);
 698     }
 699
 700     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
 701         ivshmem_add_eventfd(s, incoming_posn, new_eventfd);
 702     }
 703 }
 704
 705 static void ivshmem_check_version(void *opaque, const uint8_t * buf, int size)
 706 {
 707     IVShmemState *s = opaque;
 708     int tmp;
 709     int64_t version;
 710
 711     if (!fifo_update_and_get_i64(s, buf, size, &version)) {
 712         return;
 713     }
 714
 715     tmp = qemu_chr_fe_get_msgfd(s->server_chr);
 716     if (tmp != -1 || version != IVSHMEM_PROTOCOL_VERSION) {
 717         fprintf(stderr, "incompatible version, you are connecting to a ivshmem-"
 718                 "server using a different protocol please check your setup\n");
 719         qemu_chr_delete(s->server_chr);
 720         s->server_chr = NULL;
 721         return;
 722     }
 723
 724     IVSHMEM_DPRINTF("version check ok, switch to real chardev handler\n");
 725     qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
 726                           ivshmem_event, s);
 727 }
 728
 729 /* Select the MSI-X vectors used by device.
 730  * ivshmem maps events to vectors statically, so
 731  * we just enable all vectors on init and after reset. */
 732 static void ivshmem_use_msix(IVShmemState * s)
 733 {
 734     PCIDevice *d = PCI_DEVICE(s);
 735     int i;
 736
 737     IVSHMEM_DPRINTF("%s, msix present: %d\n", __func__, msix_present(d));
 738     if (!msix_present(d)) {
 739         return;
 740     }
 741
 742     for (i = 0; i < s->vectors; i++) {
 743         msix_vector_use(d, i);
 744     }
 745 }
 746
 747 static void ivshmem_reset(DeviceState *d)
 748 {
 749     IVShmemState *s = IVSHMEM(d);
 750
 751     s->intrstatus = 0;
 752     s->intrmask = 0;
 753     ivshmem_use_msix(s);
 754 }
 755
 756 static int ivshmem_setup_interrupts(IVShmemState *s)
 757 {
 758     /* allocate QEMU callback data for receiving interrupts */
 759     s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector));
 760
 761     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 762         if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
 763             return -1;
 764         }
 765
 766         IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
 767         ivshmem_use_msix(s);
 768     }
 769
 770     return 0;
 771 }
 772
 773 static void ivshmem_enable_irqfd(IVShmemState *s)
 774 {
 775     PCIDevice *pdev = PCI_DEVICE(s);
 776     int i;
 777
 778     for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
 779         ivshmem_add_kvm_msi_virq(s, i);
 780     }
 781
 782     if (msix_set_vector_notifiers(pdev,
 783                                   ivshmem_vector_unmask,
 784                                   ivshmem_vector_mask,
 785                                   ivshmem_vector_poll)) {
 786         error_report("ivshmem: msix_set_vector_notifiers failed");
 787     }
 788 }
 789
 790 static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector)
 791 {
 792     IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector);
 793
 794     if (s->msi_vectors[vector].pdev == NULL) {
 795         return;
 796     }
 797
 798     /* it was cleaned when masked in the frontend. */
 799     kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq);
 800
 801     s->msi_vectors[vector].pdev = NULL;
 802 }
 803
 804 static void ivshmem_disable_irqfd(IVShmemState *s)
 805 {
 806     PCIDevice *pdev = PCI_DEVICE(s);
 807     int i;
 808
 809     for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
 810         ivshmem_remove_kvm_msi_virq(s, i);
 811     }
 812
 813     msix_unset_vector_notifiers(pdev);
 814 }
 815
 816 static void ivshmem_write_config(PCIDevice *pdev, uint32_t address,
 817                                  uint32_t val, int len)
 818 {
 819     IVShmemState *s = IVSHMEM(pdev);
 820     int is_enabled, was_enabled = msix_enabled(pdev);
 821
 822     pci_default_write_config(pdev, address, val, len);
 823     is_enabled = msix_enabled(pdev);
 824
 825     if (kvm_msi_via_irqfd_enabled() && s->vm_id != -1) {
 826         if (!was_enabled && is_enabled) {
 827             ivshmem_enable_irqfd(s);
 828         } else if (was_enabled && !is_enabled) {
 829             ivshmem_disable_irqfd(s);
 830         }
 831     }
 832 }
 833
 834 static void pci_ivshmem_realize(PCIDevice *dev, Error **errp)
 835 {
 836     IVShmemState *s = IVSHMEM(dev);
 837     uint8_t *pci_conf;
 838     uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
 839         PCI_BASE_ADDRESS_MEM_PREFETCH;
 840
 841     if (!!s->server_chr + !!s->shmobj + !!s->hostmem != 1) {
 842         error_setg(errp,
 843                    "You must specify either 'shm', 'chardev' or 'x-memdev'");
 844         return;
 845     }
 846
 847     if (s->hostmem) {
 848         MemoryRegion *mr;
 849
 850         if (s->sizearg) {
 851             g_warning("size argument ignored with hostmem");
 852         }
 853
 854         mr = host_memory_backend_get_memory(s->hostmem, errp);
 855         s->ivshmem_size = memory_region_size(mr);
 856     } else if (s->sizearg == NULL) {
 857         s->ivshmem_size = 4 << 20; /* 4 MB default */
 858     } else {
 859         char *end;
 860         int64_t size = qemu_strtosz(s->sizearg, &end);
 861         if (size < 0 || *end != '\0' || !is_power_of_2(size)) {
 862             error_setg(errp, "Invalid size %s", s->sizearg);
 863             return;
 864         }
 865         s->ivshmem_size = size;
 866     }
 867
 868     fifo8_create(&s->incoming_fifo, sizeof(int64_t));
 869
 870     /* IRQFD requires MSI */
 871     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
 872         !ivshmem_has_feature(s, IVSHMEM_MSI)) {
 873         error_setg(errp, "ioeventfd/irqfd requires MSI");
 874         return;
 875     }
 876
 877     /* check that role is reasonable */
 878     if (s->role) {
 879         if (strncmp(s->role, "peer", 5) == 0) {
 880             s->role_val = IVSHMEM_PEER;
 881         } else if (strncmp(s->role, "master", 7) == 0) {
 882             s->role_val = IVSHMEM_MASTER;
 883         } else {
 884             error_setg(errp, "'role' must be 'peer' or 'master'");
 885             return;
 886         }
 887     } else {
 888         s->role_val = IVSHMEM_MASTER; /* default */
 889     }
 890
 891     if (s->role_val == IVSHMEM_PEER) {
 892         error_setg(&s->migration_blocker,
 893                    "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
 894         migrate_add_blocker(s->migration_blocker);
 895     }
 896
 897     pci_conf = dev->config;
 898     pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
 899
 900     pci_config_set_interrupt_pin(pci_conf, 1);
 901
 902     memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
 903                           "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
 904
 905     /* region for registers*/
 906     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
 907                      &s->ivshmem_mmio);
 908
 909     memory_region_init(&s->bar, OBJECT(s), "ivshmem-bar2-container", s->ivshmem_size);
 910     if (s->ivshmem_64bit) {
 911         attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
 912     }
 913
 914     if (s->hostmem != NULL) {
 915         MemoryRegion *mr;
 916
 917         IVSHMEM_DPRINTF("using hostmem\n");
 918
 919         mr = host_memory_backend_get_memory(MEMORY_BACKEND(s->hostmem), errp);
 920         vmstate_register_ram(mr, DEVICE(s));
 921         memory_region_add_subregion(&s->bar, 0, mr);
 922         pci_register_bar(PCI_DEVICE(s), 2, attr, &s->bar);
 923     } else if (s->server_chr != NULL) {
 924         /* FIXME do not rely on what chr drivers put into filename */
 925         if (strncmp(s->server_chr->filename, "unix:", 5)) {
 926             error_setg(errp, "chardev is not a unix client socket");
 927             return;
 928         }
 929
 930         /* if we get a UNIX socket as the parameter we will talk
 931          * to the ivshmem server to receive the memory region */
 932
 933         IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
 934                         s->server_chr->filename);
 935
 936         if (ivshmem_setup_interrupts(s) < 0) {
 937             error_setg(errp, "failed to initialize interrupts");
 938             return;
 939         }
 940
 941         /* we allocate enough space for 16 peers and grow as needed */
 942         resize_peers(s, 16);
 943         s->vm_id = -1;
 944
 945         pci_register_bar(dev, 2, attr, &s->bar);
 946
 947         s->eventfd_chr = g_malloc0(s->vectors * sizeof(CharDriverState *));
 948
 949         qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive,
 950                               ivshmem_check_version, ivshmem_event, s);
 951     } else {
 952         /* just map the file immediately, we're not using a server */
 953         int fd;
 954
 955         IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
 956
 957         /* try opening with O_EXCL and if it succeeds zero the memory
 958          * by truncating to 0 */
 959         if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
 960                         S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
 961            /* truncate file to length PCI device's memory */
 962             if (ftruncate(fd, s->ivshmem_size) != 0) {
 963                 error_report("could not truncate shared file");
 964             }
 965
 966         } else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
 967                         S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
 968             error_setg(errp, "could not open shared file");
 969             return;
 970         }
 971
 972         if (check_shm_size(s, fd, errp) == -1) {
 973             return;
 974         }
 975
 976         create_shared_memory_BAR(s, fd, attr, errp);
 977     }
 978 }
 979
 980 static void pci_ivshmem_exit(PCIDevice *dev)
 981 {
 982     IVShmemState *s = IVSHMEM(dev);
 983     int i;
 984
 985     fifo8_destroy(&s->incoming_fifo);
 986
 987     if (s->migration_blocker) {
 988         migrate_del_blocker(s->migration_blocker);
 989         error_free(s->migration_blocker);
 990     }
 991
 992     if (memory_region_is_mapped(&s->ivshmem)) {
 993         if (!s->hostmem) {
 994             void *addr = memory_region_get_ram_ptr(&s->ivshmem);
 995             int fd;
 996
 997             if (munmap(addr, s->ivshmem_size) == -1) {
 998                 error_report("Failed to munmap shared memory %s",
 999                              strerror(errno));
1000             }
1001
1002             fd = qemu_get_ram_fd(memory_region_get_ram_addr(&s->ivshmem));
1003             if (fd != -1) {
1004                 close(fd);
1005             }
1006         }
1007
1008         vmstate_unregister_ram(&s->ivshmem, DEVICE(dev));
1009         memory_region_del_subregion(&s->bar, &s->ivshmem);
1010     }
1011
1012     if (s->eventfd_chr) {
1013         for (i = 0; i < s->vectors; i++) {
1014             if (s->eventfd_chr[i]) {
1015                 qemu_chr_free(s->eventfd_chr[i]);
1016             }
1017         }
1018         g_free(s->eventfd_chr);
1019     }
1020
1021     if (s->peers) {
1022         for (i = 0; i < s->nb_peers; i++) {
1023             close_peer_eventfds(s, i);
1024         }
1025         g_free(s->peers);
1026     }
1027
1028     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1029         msix_uninit_exclusive_bar(dev);
1030     }
1031
1032     g_free(s->msi_vectors);
1033 }
1034
1035 static bool test_msix(void *opaque, int version_id)
1036 {
1037     IVShmemState *s = opaque;
1038
1039     return ivshmem_has_feature(s, IVSHMEM_MSI);
1040 }
1041
1042 static bool test_no_msix(void *opaque, int version_id)
1043 {
1044     return !test_msix(opaque, version_id);
1045 }
1046
1047 static int ivshmem_pre_load(void *opaque)
1048 {
1049     IVShmemState *s = opaque;
1050
1051     if (s->role_val == IVSHMEM_PEER) {
1052         error_report("'peer' devices are not migratable");
1053         return -EINVAL;
1054     }
1055
1056     return 0;
1057 }
1058
1059 static int ivshmem_post_load(void *opaque, int version_id)
1060 {
1061     IVShmemState *s = opaque;
1062
1063     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1064         ivshmem_use_msix(s);
1065     }
1066
1067     return 0;
1068 }
1069
1070 static int ivshmem_load_old(QEMUFile *f, void *opaque, int version_id)
1071 {
1072     IVShmemState *s = opaque;
1073     PCIDevice *pdev = PCI_DEVICE(s);
1074     int ret;
1075
1076     IVSHMEM_DPRINTF("ivshmem_load_old\n");
1077
1078     if (version_id != 0) {
1079         return -EINVAL;
1080     }
1081
1082     if (s->role_val == IVSHMEM_PEER) {
1083         error_report("'peer' devices are not migratable");
1084         return -EINVAL;
1085     }
1086
1087     ret = pci_device_load(pdev, f);
1088     if (ret) {
1089         return ret;
1090     }
1091
1092     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1093         msix_load(pdev, f);
1094         ivshmem_use_msix(s);
1095     } else {
1096         s->intrstatus = qemu_get_be32(f);
1097         s->intrmask = qemu_get_be32(f);
1098     }
1099
1100     return 0;
1101 }
1102
1103 static const VMStateDescription ivshmem_vmsd = {
1104     .name = "ivshmem",
1105     .version_id = 1,
1106     .minimum_version_id = 1,
1107     .pre_load = ivshmem_pre_load,
1108     .post_load = ivshmem_post_load,
1109     .fields = (VMStateField[]) {
1110         VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1111
1112         VMSTATE_MSIX_TEST(parent_obj, IVShmemState, test_msix),
1113         VMSTATE_UINT32_TEST(intrstatus, IVShmemState, test_no_msix),
1114         VMSTATE_UINT32_TEST(intrmask, IVShmemState, test_no_msix),
1115
1116         VMSTATE_END_OF_LIST()
1117     },
1118     .load_state_old = ivshmem_load_old,
1119     .minimum_version_id_old = 0
1120 };
1121
1122 static Property ivshmem_properties[] = {
1123     DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
1124     DEFINE_PROP_STRING("size", IVShmemState, sizearg),
1125     DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
1126     DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
1127     DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
1128     DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
1129     DEFINE_PROP_STRING("role", IVShmemState, role),
1130     DEFINE_PROP_UINT32("use64", IVShmemState, ivshmem_64bit, 1),
1131     DEFINE_PROP_END_OF_LIST(),
1132 };
1133
1134 static void ivshmem_class_init(ObjectClass *klass, void *data)
1135 {
1136     DeviceClass *dc = DEVICE_CLASS(klass);
1137     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1138
1139     k->realize = pci_ivshmem_realize;
1140     k->exit = pci_ivshmem_exit;
1141     k->config_write = ivshmem_write_config;
1142     k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
1143     k->device_id = PCI_DEVICE_ID_IVSHMEM;
1144     k->class_id = PCI_CLASS_MEMORY_RAM;
1145     dc->reset = ivshmem_reset;
1146     dc->props = ivshmem_properties;
1147     dc->vmsd = &ivshmem_vmsd;
1148     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
1149     dc->desc = "Inter-VM shared memory";
1150 }
1151
1152 static void ivshmem_check_memdev_is_busy(Object *obj, const char *name,
1153                                          Object *val, Error **errp)
1154 {
1155     MemoryRegion *mr;
1156
1157     mr = host_memory_backend_get_memory(MEMORY_BACKEND(val), errp);
1158     if (memory_region_is_mapped(mr)) {
1159         char *path = object_get_canonical_path_component(val);
1160         error_setg(errp, "can't use already busy memdev: %s", path);
1161         g_free(path);
1162     } else {
1163         qdev_prop_allow_set_link_before_realize(obj, name, val, errp);
1164     }
1165 }
1166
1167 static void ivshmem_init(Object *obj)
1168 {
1169     IVShmemState *s = IVSHMEM(obj);
1170
1171     object_property_add_link(obj, "x-memdev", TYPE_MEMORY_BACKEND,
1172                              (Object **)&s->hostmem,
1173                              ivshmem_check_memdev_is_busy,
1174                              OBJ_PROP_LINK_UNREF_ON_RELEASE,
1175                              &error_abort);
1176 }
1177
1178 static const TypeInfo ivshmem_info = {
1179     .name          = TYPE_IVSHMEM,
1180     .parent        = TYPE_PCI_DEVICE,
1181     .instance_size = sizeof(IVShmemState),
1182     .instance_init = ivshmem_init,
1183     .class_init    = ivshmem_class_init,
1184 };
1185
1186 static void ivshmem_register_types(void)
1187 {
1188     type_register_static(&ivshmem_info);
1189 }
1190
1191 type_init(ivshmem_register_types)