scsi: move host_status handling into SCSI drivers
[qemu/ar7.git] / target / hppa / cpu.c
blobd8fad52d1febd832778c4e77a456cc308c113be3
1 /*
2 * QEMU HPPA CPU
4 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu/qemu-print.h"
24 #include "cpu.h"
25 #include "qemu/module.h"
26 #include "exec/exec-all.h"
27 #include "fpu/softfloat.h"
30 static void hppa_cpu_set_pc(CPUState *cs, vaddr value)
32 HPPACPU *cpu = HPPA_CPU(cs);
34 cpu->env.iaoq_f = value;
35 cpu->env.iaoq_b = value + 4;
38 static void hppa_cpu_synchronize_from_tb(CPUState *cs,
39 const TranslationBlock *tb)
41 HPPACPU *cpu = HPPA_CPU(cs);
43 #ifdef CONFIG_USER_ONLY
44 cpu->env.iaoq_f = tb->pc;
45 cpu->env.iaoq_b = tb->cs_base;
46 #else
47 /* Recover the IAOQ values from the GVA + PRIV. */
48 uint32_t priv = (tb->flags >> TB_FLAG_PRIV_SHIFT) & 3;
49 target_ulong cs_base = tb->cs_base;
50 target_ulong iasq_f = cs_base & ~0xffffffffull;
51 int32_t diff = cs_base;
53 cpu->env.iasq_f = iasq_f;
54 cpu->env.iaoq_f = (tb->pc & ~iasq_f) + priv;
55 if (diff) {
56 cpu->env.iaoq_b = cpu->env.iaoq_f + diff;
58 #endif
60 cpu->env.psw_n = (tb->flags & PSW_N) != 0;
63 static bool hppa_cpu_has_work(CPUState *cs)
65 return cs->interrupt_request & CPU_INTERRUPT_HARD;
68 static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
70 info->mach = bfd_mach_hppa20;
71 info->print_insn = print_insn_hppa;
74 #ifndef CONFIG_USER_ONLY
75 static void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
76 MMUAccessType access_type,
77 int mmu_idx, uintptr_t retaddr)
79 HPPACPU *cpu = HPPA_CPU(cs);
80 CPUHPPAState *env = &cpu->env;
82 cs->exception_index = EXCP_UNALIGN;
83 if (env->psw & PSW_Q) {
84 /* ??? Needs tweaking for hppa64. */
85 env->cr[CR_IOR] = addr;
86 env->cr[CR_ISR] = addr >> 32;
89 cpu_loop_exit_restore(cs, retaddr);
91 #endif /* CONFIG_USER_ONLY */
93 static void hppa_cpu_realizefn(DeviceState *dev, Error **errp)
95 CPUState *cs = CPU(dev);
96 HPPACPUClass *acc = HPPA_CPU_GET_CLASS(dev);
97 Error *local_err = NULL;
99 cpu_exec_realizefn(cs, &local_err);
100 if (local_err != NULL) {
101 error_propagate(errp, local_err);
102 return;
105 qemu_init_vcpu(cs);
106 acc->parent_realize(dev, errp);
108 #ifndef CONFIG_USER_ONLY
110 HPPACPU *cpu = HPPA_CPU(cs);
111 cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
112 hppa_cpu_alarm_timer, cpu);
114 #endif
117 static void hppa_cpu_initfn(Object *obj)
119 CPUState *cs = CPU(obj);
120 HPPACPU *cpu = HPPA_CPU(obj);
121 CPUHPPAState *env = &cpu->env;
123 cpu_set_cpustate_pointers(cpu);
124 cs->exception_index = -1;
125 cpu_hppa_loaded_fr0(env);
126 cpu_hppa_put_psw(env, PSW_W);
129 static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
131 return object_class_by_name(TYPE_HPPA_CPU);
134 #include "hw/core/tcg-cpu-ops.h"
136 static struct TCGCPUOps hppa_tcg_ops = {
137 .initialize = hppa_translate_init,
138 .synchronize_from_tb = hppa_cpu_synchronize_from_tb,
139 .cpu_exec_interrupt = hppa_cpu_exec_interrupt,
140 .tlb_fill = hppa_cpu_tlb_fill,
142 #ifndef CONFIG_USER_ONLY
143 .do_interrupt = hppa_cpu_do_interrupt,
144 .do_unaligned_access = hppa_cpu_do_unaligned_access,
145 #endif /* !CONFIG_USER_ONLY */
148 static void hppa_cpu_class_init(ObjectClass *oc, void *data)
150 DeviceClass *dc = DEVICE_CLASS(oc);
151 CPUClass *cc = CPU_CLASS(oc);
152 HPPACPUClass *acc = HPPA_CPU_CLASS(oc);
154 device_class_set_parent_realize(dc, hppa_cpu_realizefn,
155 &acc->parent_realize);
157 cc->class_by_name = hppa_cpu_class_by_name;
158 cc->has_work = hppa_cpu_has_work;
159 cc->dump_state = hppa_cpu_dump_state;
160 cc->set_pc = hppa_cpu_set_pc;
161 cc->gdb_read_register = hppa_cpu_gdb_read_register;
162 cc->gdb_write_register = hppa_cpu_gdb_write_register;
163 #ifndef CONFIG_USER_ONLY
164 cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug;
165 dc->vmsd = &vmstate_hppa_cpu;
166 #endif
167 cc->disas_set_info = hppa_cpu_disas_set_info;
168 cc->gdb_num_core_regs = 128;
169 cc->tcg_ops = &hppa_tcg_ops;
172 static const TypeInfo hppa_cpu_type_info = {
173 .name = TYPE_HPPA_CPU,
174 .parent = TYPE_CPU,
175 .instance_size = sizeof(HPPACPU),
176 .instance_init = hppa_cpu_initfn,
177 .abstract = false,
178 .class_size = sizeof(HPPACPUClass),
179 .class_init = hppa_cpu_class_init,
182 static void hppa_cpu_register_types(void)
184 type_register_static(&hppa_cpu_type_info);
187 type_init(hppa_cpu_register_types)