scsi: move host_status handling into SCSI drivers
[qemu/ar7.git] / target / hexagon / opcodes.c
blob4eef5fc40f6dc289d596a8a531452fb6681cfcba
1 /*
2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 * opcodes.c
21 * data tables generated automatically
22 * Maybe some functions too
25 #include "qemu/osdep.h"
26 #include "attribs.h"
27 #include "decode.h"
29 #define VEC_DESCR(A, B, C) DESCR(A, B, C)
30 #define DONAME(X) #X
32 const char * const opcode_names[] = {
33 #define OPCODE(IID) DONAME(IID)
34 #include "opcodes_def_generated.h.inc"
35 NULL
36 #undef OPCODE
39 const char * const opcode_reginfo[] = {
40 #define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
41 #define REGINFO(TAG, REGINFO, RREGS, WREGS) REGINFO,
42 #include "op_regs_generated.h.inc"
43 NULL
44 #undef REGINFO
45 #undef IMMINFO
49 const char * const opcode_rregs[] = {
50 #define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
51 #define REGINFO(TAG, REGINFO, RREGS, WREGS) RREGS,
52 #include "op_regs_generated.h.inc"
53 NULL
54 #undef REGINFO
55 #undef IMMINFO
59 const char * const opcode_wregs[] = {
60 #define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
61 #define REGINFO(TAG, REGINFO, RREGS, WREGS) WREGS,
62 #include "op_regs_generated.h.inc"
63 NULL
64 #undef REGINFO
65 #undef IMMINFO
68 const char * const opcode_short_semantics[] = {
69 #define DEF_SHORTCODE(TAG, SHORTCODE) [TAG] = #SHORTCODE,
70 #include "shortcode_generated.h.inc"
71 #undef DEF_SHORTCODE
72 NULL
75 DECLARE_BITMAP(opcode_attribs[XX_LAST_OPCODE], A_ZZ_LASTATTRIB);
77 static void init_attribs(int tag, ...)
79 va_list ap;
80 int attr;
81 va_start(ap, tag);
82 while ((attr = va_arg(ap, int)) != 0) {
83 set_bit(attr, opcode_attribs[tag]);
87 const OpcodeEncoding opcode_encodings[] = {
88 #define DEF_ENC32(OPCODE, ENCSTR) \
89 [OPCODE] = { .encoding = ENCSTR },
91 #define DEF_ENC_SUBINSN(OPCODE, CLASS, ENCSTR) \
92 [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
94 #define DEF_EXT_ENC(OPCODE, CLASS, ENCSTR) \
95 [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
97 #include "imported/encode.def"
99 #undef DEF_ENC32
100 #undef DEF_ENC_SUBINSN
101 #undef DEF_EXT_ENC
104 void opcode_init(void)
106 init_attribs(0, 0);
108 #define ATTRIBS(...) , ## __VA_ARGS__, 0
109 #define OP_ATTRIB(TAG, ARGS) init_attribs(TAG ARGS);
110 #include "op_attribs_generated.h.inc"
111 #undef OP_ATTRIB
112 #undef ATTRIBS
114 decode_init();
118 #define NEEDLE "IMMEXT("
120 int opcode_which_immediate_is_extended(Opcode opcode)
122 const char *p;
124 g_assert(opcode < XX_LAST_OPCODE);
125 g_assert(GET_ATTRIB(opcode, A_EXTENDABLE));
127 p = opcode_short_semantics[opcode];
128 p = strstr(p, NEEDLE);
129 g_assert(p);
130 p += strlen(NEEDLE);
131 while (isspace(*p)) {
132 p++;
134 /* lower is always imm 0, upper always imm 1. */
135 if (islower(*p)) {
136 return 0;
137 } else if (isupper(*p)) {
138 return 1;
139 } else {
140 g_assert_not_reached();