target/hexagon/cpu.h

   1 /*
   2  *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
   3  *
   4  *  This program is free software; you can redistribute it and/or modify
   5  *  it under the terms of the GNU General Public License as published by
   6  *  the Free Software Foundation; either version 2 of the License, or
   7  *  (at your option) any later version.
   8  *
   9  *  This program is distributed in the hope that it will be useful,
  10  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  *  GNU General Public License for more details.
  13  *
  14  *  You should have received a copy of the GNU General Public License
  15  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef HEXAGON_CPU_H
  19 #define HEXAGON_CPU_H
  20
  21 /* Forward declaration needed by some of the header files */
  22 typedef struct CPUHexagonState CPUHexagonState;
  23
  24 #include "fpu/softfloat-types.h"
  25
  26 #include "qemu-common.h"
  27 #include "exec/cpu-defs.h"
  28 #include "hex_regs.h"
  29
  30 #define NUM_PREGS 4
  31 #define TOTAL_PER_THREAD_REGS 64
  32
  33 #define SLOTS_MAX 4
  34 #define STORES_MAX 2
  35 #define REG_WRITES_MAX 32
  36 #define PRED_WRITES_MAX 5                   /* 4 insns + endloop */
  37
  38 #define TYPE_HEXAGON_CPU "hexagon-cpu"
  39
  40 #define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU
  41 #define HEXAGON_CPU_TYPE_NAME(name) (name HEXAGON_CPU_TYPE_SUFFIX)
  42 #define CPU_RESOLVING_TYPE TYPE_HEXAGON_CPU
  43
  44 #define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
  45
  46 #define MMU_USER_IDX 0
  47
  48 typedef struct {
  49     target_ulong va;
  50     uint8_t width;
  51     uint32_t data32;
  52     uint64_t data64;
  53 } MemLog;
  54
  55 #define EXEC_STATUS_OK          0x0000
  56 #define EXEC_STATUS_STOP        0x0002
  57 #define EXEC_STATUS_REPLAY      0x0010
  58 #define EXEC_STATUS_LOCKED      0x0020
  59 #define EXEC_STATUS_EXCEPTION   0x0100
  60
  61
  62 #define EXCEPTION_DETECTED      (env->status & EXEC_STATUS_EXCEPTION)
  63 #define REPLAY_DETECTED         (env->status & EXEC_STATUS_REPLAY)
  64 #define CLEAR_EXCEPTION         (env->status &= (~EXEC_STATUS_EXCEPTION))
  65 #define SET_EXCEPTION           (env->status |= EXEC_STATUS_EXCEPTION)
  66
  67 struct CPUHexagonState {
  68     target_ulong gpr[TOTAL_PER_THREAD_REGS];
  69     target_ulong pred[NUM_PREGS];
  70     target_ulong branch_taken;
  71     target_ulong next_PC;
  72
  73     /* For comparing with LLDB on target - see adjust_stack_ptrs function */
  74     target_ulong last_pc_dumped;
  75     target_ulong stack_start;
  76
  77     uint8_t slot_cancelled;
  78     target_ulong new_value[TOTAL_PER_THREAD_REGS];
  79
  80     /*
  81      * Only used when HEX_DEBUG is on, but unconditionally included
  82      * to reduce recompile time when turning HEX_DEBUG on/off.
  83      */
  84     target_ulong this_PC;
  85     target_ulong reg_written[TOTAL_PER_THREAD_REGS];
  86
  87     target_ulong new_pred_value[NUM_PREGS];
  88     target_ulong pred_written;
  89
  90     MemLog mem_log_stores[STORES_MAX];
  91     target_ulong pkt_has_store_s1;
  92     target_ulong dczero_addr;
  93
  94     float_status fp_status;
  95
  96     target_ulong llsc_addr;
  97     target_ulong llsc_val;
  98     uint64_t     llsc_val_i64;
  99
 100     target_ulong is_gather_store_insn;
 101     target_ulong gather_issued;
 102 };
 103
 104 #define HEXAGON_CPU_CLASS(klass) \
 105     OBJECT_CLASS_CHECK(HexagonCPUClass, (klass), TYPE_HEXAGON_CPU)
 106 #define HEXAGON_CPU(obj) \
 107     OBJECT_CHECK(HexagonCPU, (obj), TYPE_HEXAGON_CPU)
 108 #define HEXAGON_CPU_GET_CLASS(obj) \
 109     OBJECT_GET_CLASS(HexagonCPUClass, (obj), TYPE_HEXAGON_CPU)
 110
 111 typedef struct HexagonCPUClass {
 112     /*< private >*/
 113     CPUClass parent_class;
 114     /*< public >*/
 115     DeviceRealize parent_realize;
 116     DeviceReset parent_reset;
 117 } HexagonCPUClass;
 118
 119 typedef struct HexagonCPU {
 120     /*< private >*/
 121     CPUState parent_obj;
 122     /*< public >*/
 123     CPUNegativeOffsetState neg;
 124     CPUHexagonState env;
 125
 126     bool lldb_compat;
 127     target_ulong lldb_stack_adjust;
 128 } HexagonCPU;
 129
 130 static inline HexagonCPU *hexagon_env_get_cpu(CPUHexagonState *env)
 131 {
 132     return container_of(env, HexagonCPU, env);
 133 }
 134
 135 #include "cpu_bits.h"
 136
 137 #define cpu_signal_handler cpu_hexagon_signal_handler
 138 int cpu_hexagon_signal_handler(int host_signum, void *pinfo, void *puc);
 139
 140 static inline void cpu_get_tb_cpu_state(CPUHexagonState *env, target_ulong *pc,
 141                                         target_ulong *cs_base, uint32_t *flags)
 142 {
 143     *pc = env->gpr[HEX_REG_PC];
 144     *cs_base = 0;
 145 #ifdef CONFIG_USER_ONLY
 146     *flags = 0;
 147 #else
 148 #error System mode not supported on Hexagon yet
 149 #endif
 150 }
 151
 152 typedef struct CPUHexagonState CPUArchState;
 153 typedef HexagonCPU ArchCPU;
 154
 155 void hexagon_translate_init(void);
 156
 157 #include "exec/cpu-all.h"
 158
 159 #endif /* HEXAGON_CPU_H */