2 * Global peripheral timer block for ARM A9MP
6 * Written by François LEGAL
7 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, see <http://www.gnu.org/licenses/>.
23 #include "qemu/osdep.h"
24 #include "hw/timer/a9gtimer.h"
25 #include "qapi/error.h"
26 #include "qemu/timer.h"
27 #include "qemu/bitops.h"
29 #include "qemu/module.h"
32 #ifndef A9_GTIMER_ERR_DEBUG
33 #define A9_GTIMER_ERR_DEBUG 0
36 #define DB_PRINT_L(level, ...) do { \
37 if (A9_GTIMER_ERR_DEBUG > (level)) { \
38 fprintf(stderr, ": %s: ", __func__); \
39 fprintf(stderr, ## __VA_ARGS__); \
43 #define DB_PRINT(...) DB_PRINT_L(0, ## __VA_ARGS__)
45 static inline int a9_gtimer_get_current_cpu(A9GTimerState
*s
)
47 if (current_cpu
->cpu_index
>= s
->num_cpu
) {
48 hw_error("a9gtimer: num-cpu %d but this cpu is %d!\n",
49 s
->num_cpu
, current_cpu
->cpu_index
);
51 return current_cpu
->cpu_index
;
54 static inline uint64_t a9_gtimer_get_conv(A9GTimerState
*s
)
56 uint64_t prescale
= extract32(s
->control
, R_CONTROL_PRESCALER_SHIFT
,
57 R_CONTROL_PRESCALER_LEN
);
59 return (prescale
+ 1) * 10;
62 static A9GTimerUpdate
a9_gtimer_get_update(A9GTimerState
*s
)
66 ret
.now
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
);
67 ret
.new = s
->ref_counter
+
68 (ret
.now
- s
->cpu_ref_time
) / a9_gtimer_get_conv(s
);
72 static void a9_gtimer_update(A9GTimerState
*s
, bool sync
)
75 A9GTimerUpdate update
= a9_gtimer_get_update(s
);
77 int64_t next_cdiff
= 0;
79 for (i
= 0; i
< s
->num_cpu
; ++i
) {
80 A9GTimerPerCPU
*gtb
= &s
->per_cpu
[i
];
83 if ((s
->control
& R_CONTROL_TIMER_ENABLE
) &&
84 (gtb
->control
& R_CONTROL_COMP_ENABLE
)) {
85 /* R2p0+, where the compare function is >= */
86 if (gtb
->compare
< update
.new) {
87 DB_PRINT("Compare event happened for CPU %d\n", i
);
89 if (gtb
->control
& R_CONTROL_AUTO_INCREMENT
&& gtb
->inc
) {
91 QEMU_ALIGN_UP(update
.new - gtb
->compare
, gtb
->inc
);
92 DB_PRINT("Auto incrementing timer compare by %"
97 cdiff
= (int64_t)gtb
->compare
- (int64_t)update
.new + 1;
98 if (cdiff
> 0 && (cdiff
< next_cdiff
|| !next_cdiff
)) {
103 qemu_set_irq(gtb
->irq
,
104 gtb
->status
&& (gtb
->control
& R_CONTROL_IRQ_ENABLE
));
109 DB_PRINT("scheduling qemu_timer to fire again in %"
110 PRIx64
" cycles\n", next_cdiff
);
111 timer_mod(s
->timer
, update
.now
+ next_cdiff
* a9_gtimer_get_conv(s
));
114 if (s
->control
& R_CONTROL_TIMER_ENABLE
) {
115 s
->counter
= update
.new;
119 s
->cpu_ref_time
= update
.now
;
120 s
->ref_counter
= s
->counter
;
124 static void a9_gtimer_update_no_sync(void *opaque
)
126 A9GTimerState
*s
= A9_GTIMER(opaque
);
128 a9_gtimer_update(s
, false);
131 static uint64_t a9_gtimer_read(void *opaque
, hwaddr addr
, unsigned size
)
133 A9GTimerPerCPU
*gtb
= (A9GTimerPerCPU
*)opaque
;
134 A9GTimerState
*s
= gtb
->parent
;
135 A9GTimerUpdate update
;
144 update
= a9_gtimer_get_update(s
);
145 ret
= extract64(update
.new, shift
, 32);
148 ret
= s
->control
| gtb
->control
;
150 case R_INTERRUPT_STATUS
:
153 case R_COMPARATOR_HI
:
156 case R_COMPARATOR_LO
:
157 ret
= extract64(gtb
->compare
, shift
, 32);
159 case R_AUTO_INCREMENT
:
163 qemu_log_mask(LOG_GUEST_ERROR
, "bad a9gtimer register: %x\n",
168 DB_PRINT("addr:%#x data:%#08" PRIx64
"\n", (unsigned)addr
, ret
);
172 static void a9_gtimer_write(void *opaque
, hwaddr addr
, uint64_t value
,
175 A9GTimerPerCPU
*gtb
= (A9GTimerPerCPU
*)opaque
;
176 A9GTimerState
*s
= gtb
->parent
;
179 DB_PRINT("addr:%#x data:%#08" PRIx64
"\n", (unsigned)addr
, value
);
187 * Keep it simple - ARM docco explicitly says to disable timer before
188 * modding it, so don't bother trying to do all the difficult on the fly
189 * timer modifications - (if they even work in real hardware??).
191 if (s
->control
& R_CONTROL_TIMER_ENABLE
) {
192 qemu_log_mask(LOG_GUEST_ERROR
, "Cannot mod running ARM gtimer\n");
195 s
->counter
= deposit64(s
->counter
, shift
, 32, value
);
198 a9_gtimer_update(s
, (value
^ s
->control
) & R_CONTROL_NEEDS_SYNC
);
199 gtb
->control
= value
& R_CONTROL_BANKED
;
200 s
->control
= value
& ~R_CONTROL_BANKED
;
202 case R_INTERRUPT_STATUS
:
203 a9_gtimer_update(s
, false);
204 gtb
->status
&= ~value
;
206 case R_COMPARATOR_HI
:
209 case R_COMPARATOR_LO
:
210 a9_gtimer_update(s
, false);
211 gtb
->compare
= deposit64(gtb
->compare
, shift
, 32, value
);
213 case R_AUTO_INCREMENT
:
220 a9_gtimer_update(s
, false);
223 /* Wrapper functions to implement the "read global timer for
224 * the current CPU" memory regions.
226 static uint64_t a9_gtimer_this_read(void *opaque
, hwaddr addr
,
229 A9GTimerState
*s
= A9_GTIMER(opaque
);
230 int id
= a9_gtimer_get_current_cpu(s
);
232 /* no \n so concatenates with message from read fn */
233 DB_PRINT("CPU:%d:", id
);
235 return a9_gtimer_read(&s
->per_cpu
[id
], addr
, size
);
238 static void a9_gtimer_this_write(void *opaque
, hwaddr addr
,
239 uint64_t value
, unsigned size
)
241 A9GTimerState
*s
= A9_GTIMER(opaque
);
242 int id
= a9_gtimer_get_current_cpu(s
);
244 /* no \n so concatenates with message from write fn */
245 DB_PRINT("CPU:%d:", id
);
247 a9_gtimer_write(&s
->per_cpu
[id
], addr
, value
, size
);
250 static const MemoryRegionOps a9_gtimer_this_ops
= {
251 .read
= a9_gtimer_this_read
,
252 .write
= a9_gtimer_this_write
,
254 .min_access_size
= 4,
255 .max_access_size
= 4,
257 .endianness
= DEVICE_NATIVE_ENDIAN
,
260 static const MemoryRegionOps a9_gtimer_ops
= {
261 .read
= a9_gtimer_read
,
262 .write
= a9_gtimer_write
,
264 .min_access_size
= 4,
265 .max_access_size
= 4,
267 .endianness
= DEVICE_NATIVE_ENDIAN
,
270 static void a9_gtimer_reset(DeviceState
*dev
)
272 A9GTimerState
*s
= A9_GTIMER(dev
);
278 for (i
= 0; i
< s
->num_cpu
; i
++) {
279 A9GTimerPerCPU
*gtb
= &s
->per_cpu
[i
];
286 a9_gtimer_update(s
, false);
289 static void a9_gtimer_realize(DeviceState
*dev
, Error
**errp
)
291 A9GTimerState
*s
= A9_GTIMER(dev
);
292 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
295 if (s
->num_cpu
< 1 || s
->num_cpu
> A9_GTIMER_MAX_CPUS
) {
296 error_setg(errp
, "%s: num-cpu must be between 1 and %d",
297 __func__
, A9_GTIMER_MAX_CPUS
);
301 memory_region_init_io(&s
->iomem
, OBJECT(dev
), &a9_gtimer_this_ops
, s
,
302 "a9gtimer shared", 0x20);
303 sysbus_init_mmio(sbd
, &s
->iomem
);
304 s
->timer
= timer_new_ns(QEMU_CLOCK_VIRTUAL
, a9_gtimer_update_no_sync
, s
);
306 for (i
= 0; i
< s
->num_cpu
; i
++) {
307 A9GTimerPerCPU
*gtb
= &s
->per_cpu
[i
];
310 sysbus_init_irq(sbd
, >b
->irq
);
311 memory_region_init_io(>b
->iomem
, OBJECT(dev
), &a9_gtimer_ops
, gtb
,
312 "a9gtimer per cpu", 0x20);
313 sysbus_init_mmio(sbd
, >b
->iomem
);
317 static const VMStateDescription vmstate_a9_gtimer_per_cpu
= {
318 .name
= "arm.cortex-a9-global-timer.percpu",
320 .minimum_version_id
= 1,
321 .fields
= (VMStateField
[]) {
322 VMSTATE_UINT32(control
, A9GTimerPerCPU
),
323 VMSTATE_UINT64(compare
, A9GTimerPerCPU
),
324 VMSTATE_UINT32(status
, A9GTimerPerCPU
),
325 VMSTATE_UINT32(inc
, A9GTimerPerCPU
),
326 VMSTATE_END_OF_LIST()
330 static const VMStateDescription vmstate_a9_gtimer
= {
331 .name
= "arm.cortex-a9-global-timer",
333 .minimum_version_id
= 1,
334 .fields
= (VMStateField
[]) {
335 VMSTATE_TIMER_PTR(timer
, A9GTimerState
),
336 VMSTATE_UINT64(counter
, A9GTimerState
),
337 VMSTATE_UINT64(ref_counter
, A9GTimerState
),
338 VMSTATE_UINT64(cpu_ref_time
, A9GTimerState
),
339 VMSTATE_STRUCT_VARRAY_UINT32(per_cpu
, A9GTimerState
, num_cpu
,
340 1, vmstate_a9_gtimer_per_cpu
,
342 VMSTATE_END_OF_LIST()
346 static Property a9_gtimer_properties
[] = {
347 DEFINE_PROP_UINT32("num-cpu", A9GTimerState
, num_cpu
, 0),
348 DEFINE_PROP_END_OF_LIST()
351 static void a9_gtimer_class_init(ObjectClass
*klass
, void *data
)
353 DeviceClass
*dc
= DEVICE_CLASS(klass
);
355 dc
->realize
= a9_gtimer_realize
;
356 dc
->vmsd
= &vmstate_a9_gtimer
;
357 dc
->reset
= a9_gtimer_reset
;
358 dc
->props
= a9_gtimer_properties
;
361 static const TypeInfo a9_gtimer_info
= {
362 .name
= TYPE_A9_GTIMER
,
363 .parent
= TYPE_SYS_BUS_DEVICE
,
364 .instance_size
= sizeof(A9GTimerState
),
365 .class_init
= a9_gtimer_class_init
,
368 static void a9_gtimer_register_types(void)
370 type_register_static(&a9_gtimer_info
);
373 type_init(a9_gtimer_register_types
)